1 // SPDX-License-Identifier: GPL-2.0
3 * An I2C driver for the PCF85063 RTC
4 * Copyright 2014 Rose Technology
6 * Author: Søren Andersen <san@rosetechnology.dk>
7 * Maintainers: http://www.nslu2-linux.org/
9 * Copyright (C) 2019 Micro Crystal AG
10 * Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
12 #include <linux/i2c.h>
13 #include <linux/bcd.h>
14 #include <linux/rtc.h>
15 #include <linux/module.h>
16 #include <linux/of_device.h>
17 #include <linux/pm_wakeirq.h>
18 #include <linux/regmap.h>
21 * Information for this driver was pulled from the following datasheets.
23 * http://www.nxp.com/documents/data_sheet/PCF85063A.pdf
24 * http://www.nxp.com/documents/data_sheet/PCF85063TP.pdf
26 * PCF85063A -- Rev. 6 — 18 November 2015
27 * PCF85063TP -- Rev. 4 — 6 May 2015
29 * https://www.microcrystal.com/fileadmin/Media/Products/RTC/App.Manual/RV-8263-C7_App-Manual.pdf
30 * RV8263 -- Rev. 1.0 — January 2019
33 #define PCF85063_REG_CTRL1 0x00 /* status */
34 #define PCF85063_REG_CTRL1_CAP_SEL BIT(0)
35 #define PCF85063_REG_CTRL1_STOP BIT(5)
37 #define PCF85063_REG_CTRL2 0x01
38 #define PCF85063_CTRL2_AF BIT(6)
39 #define PCF85063_CTRL2_AIE BIT(7)
41 #define PCF85063_REG_OFFSET 0x02
42 #define PCF85063_OFFSET_SIGN_BIT 6 /* 2's complement sign bit */
43 #define PCF85063_OFFSET_MODE BIT(7)
44 #define PCF85063_OFFSET_STEP0 4340
45 #define PCF85063_OFFSET_STEP1 4069
47 #define PCF85063_REG_RAM 0x03
49 #define PCF85063_REG_SC 0x04 /* datetime */
50 #define PCF85063_REG_SC_OS 0x80
52 #define PCF85063_REG_ALM_S 0x0b
53 #define PCF85063_AEN BIT(7)
55 struct pcf85063_config
{
56 struct regmap_config regmap
;
57 unsigned has_alarms
:1;
58 unsigned force_cap_7000
:1;
62 struct rtc_device
*rtc
;
63 struct regmap
*regmap
;
66 static int pcf85063_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
68 struct pcf85063
*pcf85063
= dev_get_drvdata(dev
);
73 * while reading, the time/date registers are blocked and not updated
74 * anymore until the access is finished. To not lose a second
75 * event, the access must be finished within one second. So, read all
76 * time/date registers in one turn.
78 rc
= regmap_bulk_read(pcf85063
->regmap
, PCF85063_REG_SC
, regs
,
83 /* if the clock has lost its power it makes no sense to use its time */
84 if (regs
[0] & PCF85063_REG_SC_OS
) {
85 dev_warn(&pcf85063
->rtc
->dev
, "Power loss detected, invalid time\n");
89 tm
->tm_sec
= bcd2bin(regs
[0] & 0x7F);
90 tm
->tm_min
= bcd2bin(regs
[1] & 0x7F);
91 tm
->tm_hour
= bcd2bin(regs
[2] & 0x3F); /* rtc hr 0-23 */
92 tm
->tm_mday
= bcd2bin(regs
[3] & 0x3F);
93 tm
->tm_wday
= regs
[4] & 0x07;
94 tm
->tm_mon
= bcd2bin(regs
[5] & 0x1F) - 1; /* rtc mn 1-12 */
95 tm
->tm_year
= bcd2bin(regs
[6]);
101 static int pcf85063_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
103 struct pcf85063
*pcf85063
= dev_get_drvdata(dev
);
108 * to accurately set the time, reset the divider chain and keep it in
109 * reset state until all time/date registers are written
111 rc
= regmap_update_bits(pcf85063
->regmap
, PCF85063_REG_CTRL1
,
112 PCF85063_REG_CTRL1_STOP
,
113 PCF85063_REG_CTRL1_STOP
);
117 /* hours, minutes and seconds */
118 regs
[0] = bin2bcd(tm
->tm_sec
) & 0x7F; /* clear OS flag */
120 regs
[1] = bin2bcd(tm
->tm_min
);
121 regs
[2] = bin2bcd(tm
->tm_hour
);
123 /* Day of month, 1 - 31 */
124 regs
[3] = bin2bcd(tm
->tm_mday
);
127 regs
[4] = tm
->tm_wday
& 0x07;
130 regs
[5] = bin2bcd(tm
->tm_mon
+ 1);
132 /* year and century */
133 regs
[6] = bin2bcd(tm
->tm_year
- 100);
135 /* write all registers at once */
136 rc
= regmap_bulk_write(pcf85063
->regmap
, PCF85063_REG_SC
,
142 * Write the control register as a separate action since the size of
143 * the register space is different between the PCF85063TP and
144 * PCF85063A devices. The rollover point can not be used.
146 return regmap_update_bits(pcf85063
->regmap
, PCF85063_REG_CTRL1
,
147 PCF85063_REG_CTRL1_STOP
, 0);
150 static int pcf85063_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
152 struct pcf85063
*pcf85063
= dev_get_drvdata(dev
);
157 ret
= regmap_bulk_read(pcf85063
->regmap
, PCF85063_REG_ALM_S
,
162 alrm
->time
.tm_sec
= bcd2bin(buf
[0]);
163 alrm
->time
.tm_min
= bcd2bin(buf
[1]);
164 alrm
->time
.tm_hour
= bcd2bin(buf
[2]);
165 alrm
->time
.tm_mday
= bcd2bin(buf
[3]);
167 ret
= regmap_read(pcf85063
->regmap
, PCF85063_REG_CTRL2
, &val
);
171 alrm
->enabled
= !!(val
& PCF85063_CTRL2_AIE
);
176 static int pcf85063_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
178 struct pcf85063
*pcf85063
= dev_get_drvdata(dev
);
182 buf
[0] = bin2bcd(alrm
->time
.tm_sec
);
183 buf
[1] = bin2bcd(alrm
->time
.tm_min
);
184 buf
[2] = bin2bcd(alrm
->time
.tm_hour
);
185 buf
[3] = bin2bcd(alrm
->time
.tm_mday
);
186 buf
[4] = PCF85063_AEN
; /* Do not match on week day */
188 ret
= regmap_update_bits(pcf85063
->regmap
, PCF85063_REG_CTRL2
,
189 PCF85063_CTRL2_AIE
| PCF85063_CTRL2_AF
, 0);
193 ret
= regmap_bulk_write(pcf85063
->regmap
, PCF85063_REG_ALM_S
,
198 return regmap_update_bits(pcf85063
->regmap
, PCF85063_REG_CTRL2
,
199 PCF85063_CTRL2_AIE
| PCF85063_CTRL2_AF
,
200 alrm
->enabled
? PCF85063_CTRL2_AIE
| PCF85063_CTRL2_AF
: PCF85063_CTRL2_AF
);
203 static int pcf85063_rtc_alarm_irq_enable(struct device
*dev
,
204 unsigned int enabled
)
206 struct pcf85063
*pcf85063
= dev_get_drvdata(dev
);
208 return regmap_update_bits(pcf85063
->regmap
, PCF85063_REG_CTRL2
,
210 enabled
? PCF85063_CTRL2_AIE
: 0);
213 static irqreturn_t
pcf85063_rtc_handle_irq(int irq
, void *dev_id
)
215 struct pcf85063
*pcf85063
= dev_id
;
219 err
= regmap_read(pcf85063
->regmap
, PCF85063_REG_CTRL2
, &val
);
223 if (val
& PCF85063_CTRL2_AF
) {
224 rtc_update_irq(pcf85063
->rtc
, 1, RTC_IRQF
| RTC_AF
);
225 regmap_update_bits(pcf85063
->regmap
, PCF85063_REG_CTRL2
,
226 PCF85063_CTRL2_AIE
| PCF85063_CTRL2_AF
,
234 static int pcf85063_read_offset(struct device
*dev
, long *offset
)
236 struct pcf85063
*pcf85063
= dev_get_drvdata(dev
);
241 ret
= regmap_read(pcf85063
->regmap
, PCF85063_REG_OFFSET
, ®
);
245 val
= sign_extend32(reg
& ~PCF85063_OFFSET_MODE
,
246 PCF85063_OFFSET_SIGN_BIT
);
248 if (reg
& PCF85063_OFFSET_MODE
)
249 *offset
= val
* PCF85063_OFFSET_STEP1
;
251 *offset
= val
* PCF85063_OFFSET_STEP0
;
256 static int pcf85063_set_offset(struct device
*dev
, long offset
)
258 struct pcf85063
*pcf85063
= dev_get_drvdata(dev
);
259 s8 mode0
, mode1
, reg
;
260 unsigned int error0
, error1
;
262 if (offset
> PCF85063_OFFSET_STEP0
* 63)
264 if (offset
< PCF85063_OFFSET_STEP0
* -64)
267 mode0
= DIV_ROUND_CLOSEST(offset
, PCF85063_OFFSET_STEP0
);
268 mode1
= DIV_ROUND_CLOSEST(offset
, PCF85063_OFFSET_STEP1
);
270 error0
= abs(offset
- (mode0
* PCF85063_OFFSET_STEP0
));
271 error1
= abs(offset
- (mode1
* PCF85063_OFFSET_STEP1
));
272 if (mode1
> 63 || mode1
< -64 || error0
< error1
)
273 reg
= mode0
& ~PCF85063_OFFSET_MODE
;
275 reg
= mode1
| PCF85063_OFFSET_MODE
;
277 return regmap_write(pcf85063
->regmap
, PCF85063_REG_OFFSET
, reg
);
280 static int pcf85063_ioctl(struct device
*dev
, unsigned int cmd
,
283 struct pcf85063
*pcf85063
= dev_get_drvdata(dev
);
288 ret
= regmap_read(pcf85063
->regmap
, PCF85063_REG_SC
, &status
);
292 if (status
& PCF85063_REG_SC_OS
)
293 dev_warn(&pcf85063
->rtc
->dev
, "Voltage low, data loss detected.\n");
295 status
&= PCF85063_REG_SC_OS
;
297 if (copy_to_user((void __user
*)arg
, &status
, sizeof(int)))
303 ret
= regmap_update_bits(pcf85063
->regmap
, PCF85063_REG_SC
,
304 PCF85063_REG_SC_OS
, 0);
313 static const struct rtc_class_ops pcf85063_rtc_ops
= {
314 .read_time
= pcf85063_rtc_read_time
,
315 .set_time
= pcf85063_rtc_set_time
,
316 .read_offset
= pcf85063_read_offset
,
317 .set_offset
= pcf85063_set_offset
,
318 .ioctl
= pcf85063_ioctl
,
321 static const struct rtc_class_ops pcf85063_rtc_ops_alarm
= {
322 .read_time
= pcf85063_rtc_read_time
,
323 .set_time
= pcf85063_rtc_set_time
,
324 .read_offset
= pcf85063_read_offset
,
325 .set_offset
= pcf85063_set_offset
,
326 .read_alarm
= pcf85063_rtc_read_alarm
,
327 .set_alarm
= pcf85063_rtc_set_alarm
,
328 .alarm_irq_enable
= pcf85063_rtc_alarm_irq_enable
,
329 .ioctl
= pcf85063_ioctl
,
332 static int pcf85063_nvmem_read(void *priv
, unsigned int offset
,
333 void *val
, size_t bytes
)
335 return regmap_read(priv
, PCF85063_REG_RAM
, val
);
338 static int pcf85063_nvmem_write(void *priv
, unsigned int offset
,
339 void *val
, size_t bytes
)
341 return regmap_write(priv
, PCF85063_REG_RAM
, *(u8
*)val
);
344 static int pcf85063_load_capacitance(struct pcf85063
*pcf85063
,
345 const struct device_node
*np
,
346 unsigned int force_cap
)
354 of_property_read_u32(np
, "quartz-load-femtofarads", &load
);
358 dev_warn(&pcf85063
->rtc
->dev
, "Unknown quartz-load-femtofarads value: %d. Assuming 7000",
364 reg
= PCF85063_REG_CTRL1_CAP_SEL
;
368 return regmap_update_bits(pcf85063
->regmap
, PCF85063_REG_CTRL1
,
369 PCF85063_REG_CTRL1_CAP_SEL
, reg
);
372 static const struct pcf85063_config pcf85063a_config
= {
376 .max_register
= 0x11,
381 static const struct pcf85063_config pcf85063tp_config
= {
385 .max_register
= 0x0a,
389 static const struct pcf85063_config rv8263_config
= {
393 .max_register
= 0x11,
399 static int pcf85063_probe(struct i2c_client
*client
)
401 struct pcf85063
*pcf85063
;
404 const struct pcf85063_config
*config
= &pcf85063tp_config
;
405 const void *data
= of_device_get_match_data(&client
->dev
);
406 struct nvmem_config nvmem_cfg
= {
407 .name
= "pcf85063_nvram",
408 .reg_read
= pcf85063_nvmem_read
,
409 .reg_write
= pcf85063_nvmem_write
,
410 .type
= NVMEM_TYPE_BATTERY_BACKED
,
414 dev_dbg(&client
->dev
, "%s\n", __func__
);
416 pcf85063
= devm_kzalloc(&client
->dev
, sizeof(struct pcf85063
),
424 pcf85063
->regmap
= devm_regmap_init_i2c(client
, &config
->regmap
);
425 if (IS_ERR(pcf85063
->regmap
))
426 return PTR_ERR(pcf85063
->regmap
);
428 i2c_set_clientdata(client
, pcf85063
);
430 err
= regmap_read(pcf85063
->regmap
, PCF85063_REG_CTRL1
, &tmp
);
432 dev_err(&client
->dev
, "RTC chip is not present\n");
436 pcf85063
->rtc
= devm_rtc_allocate_device(&client
->dev
);
437 if (IS_ERR(pcf85063
->rtc
))
438 return PTR_ERR(pcf85063
->rtc
);
440 err
= pcf85063_load_capacitance(pcf85063
, client
->dev
.of_node
,
441 config
->force_cap_7000
? 7000 : 0);
443 dev_warn(&client
->dev
, "failed to set xtal load capacitance: %d",
446 pcf85063
->rtc
->ops
= &pcf85063_rtc_ops
;
447 pcf85063
->rtc
->range_min
= RTC_TIMESTAMP_BEGIN_2000
;
448 pcf85063
->rtc
->range_max
= RTC_TIMESTAMP_END_2099
;
449 pcf85063
->rtc
->uie_unsupported
= 1;
451 if (config
->has_alarms
&& client
->irq
> 0) {
452 err
= devm_request_threaded_irq(&client
->dev
, client
->irq
,
453 NULL
, pcf85063_rtc_handle_irq
,
454 IRQF_TRIGGER_LOW
| IRQF_ONESHOT
,
455 "pcf85063", pcf85063
);
457 dev_warn(&pcf85063
->rtc
->dev
,
458 "unable to request IRQ, alarms disabled\n");
460 pcf85063
->rtc
->ops
= &pcf85063_rtc_ops_alarm
;
461 device_init_wakeup(&client
->dev
, true);
462 err
= dev_pm_set_wake_irq(&client
->dev
, client
->irq
);
464 dev_err(&pcf85063
->rtc
->dev
,
465 "failed to enable irq wake\n");
469 nvmem_cfg
.priv
= pcf85063
->regmap
;
470 rtc_nvmem_register(pcf85063
->rtc
, &nvmem_cfg
);
472 return rtc_register_device(pcf85063
->rtc
);
476 static const struct of_device_id pcf85063_of_match
[] = {
477 { .compatible
= "nxp,pcf85063", .data
= &pcf85063tp_config
},
478 { .compatible
= "nxp,pcf85063tp", .data
= &pcf85063tp_config
},
479 { .compatible
= "nxp,pcf85063a", .data
= &pcf85063a_config
},
480 { .compatible
= "microcrystal,rv8263", .data
= &rv8263_config
},
483 MODULE_DEVICE_TABLE(of
, pcf85063_of_match
);
486 static struct i2c_driver pcf85063_driver
= {
488 .name
= "rtc-pcf85063",
489 .of_match_table
= of_match_ptr(pcf85063_of_match
),
491 .probe_new
= pcf85063_probe
,
494 module_i2c_driver(pcf85063_driver
);
496 MODULE_AUTHOR("Søren Andersen <san@rosetechnology.dk>");
497 MODULE_DESCRIPTION("PCF85063 RTC driver");
498 MODULE_LICENSE("GPL");