drivers/rtc/rtc-sa1100.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
   4  *
   5  * Copyright (c) 2000 Nils Faerber
   6  *
   7  * Based on rtc.c by Paul Gortmaker
   8  *
   9  * Original Driver by Nils Faerber <nils@kernelconcepts.de>
  10  *
  11  * Modifications from:
  12  *   CIH <cih@coventive.com>
  13  *   Nicolas Pitre <nico@fluxnic.net>
  14  *   Andrew Christian <andrew.christian@hp.com>
  15  *
  16  * Converted to the RTC subsystem and Driver Model
  17  *   by Richard Purdie <rpurdie@rpsys.net>
  18  */
  19
  20 #include <linux/platform_device.h>
  21 #include <linux/module.h>
  22 #include <linux/clk.h>
  23 #include <linux/rtc.h>
  24 #include <linux/init.h>
  25 #include <linux/fs.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/slab.h>
  28 #include <linux/string.h>
  29 #include <linux/of.h>
  30 #include <linux/pm.h>
  31 #include <linux/bitops.h>
  32 #include <linux/io.h>
  33
  34 #define RTSR_HZE                BIT(3)  /* HZ interrupt enable */
  35 #define RTSR_ALE                BIT(2)  /* RTC alarm interrupt enable */
  36 #define RTSR_HZ                 BIT(1)  /* HZ rising-edge detected */
  37 #define RTSR_AL                 BIT(0)  /* RTC alarm detected */
  38
  39 #include "rtc-sa1100.h"
  40
  41 #define RTC_DEF_DIVIDER         (32768 - 1)
  42 #define RTC_DEF_TRIM            0
  43 #define RTC_FREQ                1024
  44
  45
  46 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
  47 {
  48         struct sa1100_rtc *info = dev_get_drvdata(dev_id);
  49         struct rtc_device *rtc = info->rtc;
  50         unsigned int rtsr;
  51         unsigned long events = 0;
  52
  53         spin_lock(&info->lock);
  54
  55         rtsr = readl_relaxed(info->rtsr);
  56         /* clear interrupt sources */
  57         writel_relaxed(0, info->rtsr);
  58         /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  59          * See also the comments in sa1100_rtc_probe(). */
  60         if (rtsr & (RTSR_ALE | RTSR_HZE)) {
  61                 /* This is the original code, before there was the if test
  62                  * above. This code does not clear interrupts that were not
  63                  * enabled. */
  64                 writel_relaxed((RTSR_AL | RTSR_HZ) & (rtsr >> 2), info->rtsr);
  65         } else {
  66                 /* For some reason, it is possible to enter this routine
  67                  * without interruptions enabled, it has been tested with
  68                  * several units (Bug in SA11xx chip?).
  69                  *
  70                  * This situation leads to an infinite "loop" of interrupt
  71                  * routine calling and as a result the processor seems to
  72                  * lock on its first call to open(). */
  73                 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
  74         }
  75
  76         /* clear alarm interrupt if it has occurred */
  77         if (rtsr & RTSR_AL)
  78                 rtsr &= ~RTSR_ALE;
  79         writel_relaxed(rtsr & (RTSR_ALE | RTSR_HZE), info->rtsr);
  80
  81         /* update irq data & counter */
  82         if (rtsr & RTSR_AL)
  83                 events |= RTC_AF | RTC_IRQF;
  84         if (rtsr & RTSR_HZ)
  85                 events |= RTC_UF | RTC_IRQF;
  86
  87         rtc_update_irq(rtc, 1, events);
  88
  89         spin_unlock(&info->lock);
  90
  91         return IRQ_HANDLED;
  92 }
  93
  94 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  95 {
  96         u32 rtsr;
  97         struct sa1100_rtc *info = dev_get_drvdata(dev);
  98
  99         spin_lock_irq(&info->lock);
 100         rtsr = readl_relaxed(info->rtsr);
 101         if (enabled)
 102                 rtsr |= RTSR_ALE;
 103         else
 104                 rtsr &= ~RTSR_ALE;
 105         writel_relaxed(rtsr, info->rtsr);
 106         spin_unlock_irq(&info->lock);
 107         return 0;
 108 }
 109
 110 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
 111 {
 112         struct sa1100_rtc *info = dev_get_drvdata(dev);
 113
 114         rtc_time_to_tm(readl_relaxed(info->rcnr), tm);
 115         return 0;
 116 }
 117
 118 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
 119 {
 120         struct sa1100_rtc *info = dev_get_drvdata(dev);
 121         unsigned long time;
 122         int ret;
 123
 124         ret = rtc_tm_to_time(tm, &time);
 125         if (ret == 0)
 126                 writel_relaxed(time, info->rcnr);
 127         return ret;
 128 }
 129
 130 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 131 {
 132         u32     rtsr;
 133         struct sa1100_rtc *info = dev_get_drvdata(dev);
 134
 135         rtsr = readl_relaxed(info->rtsr);
 136         alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
 137         alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
 138         return 0;
 139 }
 140
 141 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 142 {
 143         struct sa1100_rtc *info = dev_get_drvdata(dev);
 144         unsigned long time;
 145         int ret;
 146
 147         spin_lock_irq(&info->lock);
 148         ret = rtc_tm_to_time(&alrm->time, &time);
 149         if (ret != 0)
 150                 goto out;
 151         writel_relaxed(readl_relaxed(info->rtsr) &
 152                 (RTSR_HZE | RTSR_ALE | RTSR_AL), info->rtsr);
 153         writel_relaxed(time, info->rtar);
 154         if (alrm->enabled)
 155                 writel_relaxed(readl_relaxed(info->rtsr) | RTSR_ALE, info->rtsr);
 156         else
 157                 writel_relaxed(readl_relaxed(info->rtsr) & ~RTSR_ALE, info->rtsr);
 158 out:
 159         spin_unlock_irq(&info->lock);
 160
 161         return ret;
 162 }
 163
 164 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
 165 {
 166         struct sa1100_rtc *info = dev_get_drvdata(dev);
 167
 168         seq_printf(seq, "trim/divider\t\t: 0x%08x\n", readl_relaxed(info->rttr));
 169         seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", readl_relaxed(info->rtsr));
 170
 171         return 0;
 172 }
 173
 174 static const struct rtc_class_ops sa1100_rtc_ops = {
 175         .read_time = sa1100_rtc_read_time,
 176         .set_time = sa1100_rtc_set_time,
 177         .read_alarm = sa1100_rtc_read_alarm,
 178         .set_alarm = sa1100_rtc_set_alarm,
 179         .proc = sa1100_rtc_proc,
 180         .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
 181 };
 182
 183 int sa1100_rtc_init(struct platform_device *pdev, struct sa1100_rtc *info)
 184 {
 185         struct rtc_device *rtc;
 186         int ret;
 187
 188         spin_lock_init(&info->lock);
 189
 190         info->clk = devm_clk_get(&pdev->dev, NULL);
 191         if (IS_ERR(info->clk)) {
 192                 dev_err(&pdev->dev, "failed to find rtc clock source\n");
 193                 return PTR_ERR(info->clk);
 194         }
 195
 196         ret = clk_prepare_enable(info->clk);
 197         if (ret)
 198                 return ret;
 199         /*
 200          * According to the manual we should be able to let RTTR be zero
 201          * and then a default diviser for a 32.768KHz clock is used.
 202          * Apparently this doesn't work, at least for my SA1110 rev 5.
 203          * If the clock divider is uninitialized then reset it to the
 204          * default value to get the 1Hz clock.
 205          */
 206         if (readl_relaxed(info->rttr) == 0) {
 207                 writel_relaxed(RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16), info->rttr);
 208                 dev_warn(&pdev->dev, "warning: "
 209                         "initializing default clock divider/trim value\n");
 210                 /* The current RTC value probably doesn't make sense either */
 211                 writel_relaxed(0, info->rcnr);
 212         }
 213
 214         rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &sa1100_rtc_ops,
 215                                         THIS_MODULE);
 216         if (IS_ERR(rtc)) {
 217                 clk_disable_unprepare(info->clk);
 218                 return PTR_ERR(rtc);
 219         }
 220         info->rtc = rtc;
 221
 222         rtc->max_user_freq = RTC_FREQ;
 223
 224         /* Fix for a nasty initialization problem the in SA11xx RTSR register.
 225          * See also the comments in sa1100_rtc_interrupt().
 226          *
 227          * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
 228          * interrupt pending, even though interrupts were never enabled.
 229          * In this case, this bit it must be reset before enabling
 230          * interruptions to avoid a nonexistent interrupt to occur.
 231          *
 232          * In principle, the same problem would apply to bit 0, although it has
 233          * never been observed to happen.
 234          *
 235          * This issue is addressed both here and in sa1100_rtc_interrupt().
 236          * If the issue is not addressed here, in the times when the processor
 237          * wakes up with the bit set there will be one spurious interrupt.
 238          *
 239          * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
 240          * safe side, once the condition that lead to this strange
 241          * initialization is unknown and could in principle happen during
 242          * normal processing.
 243          *
 244          * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
 245          * the corresponding bits in RTSR. */
 246         writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
 247
 248         return 0;
 249 }
 250 EXPORT_SYMBOL_GPL(sa1100_rtc_init);
 251
 252 static int sa1100_rtc_probe(struct platform_device *pdev)
 253 {
 254         struct sa1100_rtc *info;
 255         void __iomem *base;
 256         int irq_1hz, irq_alarm;
 257         int ret;
 258
 259         irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
 260         irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
 261         if (irq_1hz < 0 || irq_alarm < 0)
 262                 return -ENODEV;
 263
 264         info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL);
 265         if (!info)
 266                 return -ENOMEM;
 267         info->irq_1hz = irq_1hz;
 268         info->irq_alarm = irq_alarm;
 269
 270         ret = devm_request_irq(&pdev->dev, irq_1hz, sa1100_rtc_interrupt, 0,
 271                                "rtc 1Hz", &pdev->dev);
 272         if (ret) {
 273                 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq_1hz);
 274                 return ret;
 275         }
 276         ret = devm_request_irq(&pdev->dev, irq_alarm, sa1100_rtc_interrupt, 0,
 277                                "rtc Alrm", &pdev->dev);
 278         if (ret) {
 279                 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq_alarm);
 280                 return ret;
 281         }
 282
 283         base = devm_platform_ioremap_resource(pdev, 0);
 284         if (IS_ERR(base))
 285                 return PTR_ERR(base);
 286
 287         if (IS_ENABLED(CONFIG_ARCH_SA1100) ||
 288             of_device_is_compatible(pdev->dev.of_node, "mrvl,sa1100-rtc")) {
 289                 info->rcnr = base + 0x04;
 290                 info->rtsr = base + 0x10;
 291                 info->rtar = base + 0x00;
 292                 info->rttr = base + 0x08;
 293         } else {
 294                 info->rcnr = base + 0x0;
 295                 info->rtsr = base + 0x8;
 296                 info->rtar = base + 0x4;
 297                 info->rttr = base + 0xc;
 298         }
 299
 300         platform_set_drvdata(pdev, info);
 301         device_init_wakeup(&pdev->dev, 1);
 302
 303         return sa1100_rtc_init(pdev, info);
 304 }
 305
 306 static int sa1100_rtc_remove(struct platform_device *pdev)
 307 {
 308         struct sa1100_rtc *info = platform_get_drvdata(pdev);
 309
 310         if (info) {
 311                 spin_lock_irq(&info->lock);
 312                 writel_relaxed(0, info->rtsr);
 313                 spin_unlock_irq(&info->lock);
 314                 clk_disable_unprepare(info->clk);
 315         }
 316
 317         return 0;
 318 }
 319
 320 #ifdef CONFIG_PM_SLEEP
 321 static int sa1100_rtc_suspend(struct device *dev)
 322 {
 323         struct sa1100_rtc *info = dev_get_drvdata(dev);
 324         if (device_may_wakeup(dev))
 325                 enable_irq_wake(info->irq_alarm);
 326         return 0;
 327 }
 328
 329 static int sa1100_rtc_resume(struct device *dev)
 330 {
 331         struct sa1100_rtc *info = dev_get_drvdata(dev);
 332         if (device_may_wakeup(dev))
 333                 disable_irq_wake(info->irq_alarm);
 334         return 0;
 335 }
 336 #endif
 337
 338 static SIMPLE_DEV_PM_OPS(sa1100_rtc_pm_ops, sa1100_rtc_suspend,
 339                         sa1100_rtc_resume);
 340
 341 #ifdef CONFIG_OF
 342 static const struct of_device_id sa1100_rtc_dt_ids[] = {
 343         { .compatible = "mrvl,sa1100-rtc", },
 344         { .compatible = "mrvl,mmp-rtc", },
 345         {}
 346 };
 347 MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids);
 348 #endif
 349
 350 static struct platform_driver sa1100_rtc_driver = {
 351         .probe          = sa1100_rtc_probe,
 352         .remove         = sa1100_rtc_remove,
 353         .driver         = {
 354                 .name   = "sa1100-rtc",
 355                 .pm     = &sa1100_rtc_pm_ops,
 356                 .of_match_table = of_match_ptr(sa1100_rtc_dt_ids),
 357         },
 358 };
 359
 360 module_platform_driver(sa1100_rtc_driver);
 361
 362 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
 363 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
 364 MODULE_LICENSE("GPL");
 365 MODULE_ALIAS("platform:sa1100-rtc");