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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / scsi / qla2xxx / qla_init.c
blob9e6b56527b2591c23c2cce1fce6fdc7f3c9fd94e
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include "qla_target.h"
21
22 /*
23 * QLogic ISP2x00 Hardware Support Function Prototypes.
24 */
25 static int qla2x00_isp_firmware(scsi_qla_host_t *);
26 static int qla2x00_setup_chip(scsi_qla_host_t *);
27 static int qla2x00_fw_ready(scsi_qla_host_t *);
28 static int qla2x00_configure_hba(scsi_qla_host_t *);
29 static int qla2x00_configure_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_fabric(scsi_qla_host_t *);
32 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
33 static int qla2x00_restart_isp(scsi_qla_host_t *);
34
35 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
36 static int qla84xx_init_chip(scsi_qla_host_t *);
37 static int qla25xx_init_queues(struct qla_hw_data *);
38 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
39 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
40 struct event_arg *ea);
41 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
42 struct event_arg *);
43 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
44
45 /* SRB Extensions ---------------------------------------------------------- */
46
47 void
48 qla2x00_sp_timeout(struct timer_list *t)
49 {
50 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
51 struct srb_iocb *iocb;
52
53 WARN_ON(irqs_disabled());
54 iocb = &sp->u.iocb_cmd;
55 iocb->timeout(sp);
56 }
57
58 void qla2x00_sp_free(srb_t *sp)
59 {
60 struct srb_iocb *iocb = &sp->u.iocb_cmd;
61
62 del_timer(&iocb->timer);
63 qla2x00_rel_sp(sp);
64 }
65
66 /* Asynchronous Login/Logout Routines -------------------------------------- */
67
68 unsigned long
69 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
70 {
71 unsigned long tmo;
72 struct qla_hw_data *ha = vha->hw;
73
74 /* Firmware should use switch negotiated r_a_tov for timeout. */
75 tmo = ha->r_a_tov / 10 * 2;
76 if (IS_QLAFX00(ha)) {
77 tmo = FX00_DEF_RATOV * 2;
78 } else if (!IS_FWI2_CAPABLE(ha)) {
79 /*
80 * Except for earlier ISPs where the timeout is seeded from the
81 * initialization control block.
82 */
83 tmo = ha->login_timeout;
84 }
85 return tmo;
86 }
87
88 static void qla24xx_abort_iocb_timeout(void *data)
89 {
90 srb_t *sp = data;
91 struct srb_iocb *abt = &sp->u.iocb_cmd;
92 struct qla_qpair *qpair = sp->qpair;
93 u32 handle;
94 unsigned long flags;
95
96 if (sp->cmd_sp)
97 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
98 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
99 sp->cmd_sp->handle, sp->cmd_sp->type,
100 sp->handle, sp->type);
101 else
102 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
103 "Abort timeout 2 - hdl=%x, type=%x\n",
104 sp->handle, sp->type);
105
106 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
107 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
108 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
109 sp->cmd_sp))
110 qpair->req->outstanding_cmds[handle] = NULL;
111
112 /* removing the abort */
113 if (qpair->req->outstanding_cmds[handle] == sp) {
114 qpair->req->outstanding_cmds[handle] = NULL;
115 break;
116 }
117 }
118 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
119
120 if (sp->cmd_sp)
121 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
122
123 abt->u.abt.comp_status = CS_TIMEOUT;
124 sp->done(sp, QLA_OS_TIMER_EXPIRED);
125 }
126
127 static void qla24xx_abort_sp_done(srb_t *sp, int res)
128 {
129 struct srb_iocb *abt = &sp->u.iocb_cmd;
130
131 del_timer(&sp->u.iocb_cmd.timer);
132 if (sp->flags & SRB_WAKEUP_ON_COMP)
133 complete(&abt->u.abt.comp);
134 else
135 sp->free(sp);
136 }
137
138 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
139 {
140 scsi_qla_host_t *vha = cmd_sp->vha;
141 struct srb_iocb *abt_iocb;
142 srb_t *sp;
143 int rval = QLA_FUNCTION_FAILED;
144
145 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
146 GFP_ATOMIC);
147 if (!sp)
148 return rval;
149
150 abt_iocb = &sp->u.iocb_cmd;
151 sp->type = SRB_ABT_CMD;
152 sp->name = "abort";
153 sp->qpair = cmd_sp->qpair;
154 sp->cmd_sp = cmd_sp;
155 if (wait)
156 sp->flags = SRB_WAKEUP_ON_COMP;
157
158 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
159 init_completion(&abt_iocb->u.abt.comp);
160 /* FW can send 2 x ABTS's timeout/20s */
161 qla2x00_init_timer(sp, 42);
162
163 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
164 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
165
166 sp->done = qla24xx_abort_sp_done;
167
168 ql_dbg(ql_dbg_async, vha, 0x507c,
169 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
170 cmd_sp->type);
171
172 rval = qla2x00_start_sp(sp);
173 if (rval != QLA_SUCCESS) {
174 sp->free(sp);
175 return rval;
176 }
177
178 if (wait) {
179 wait_for_completion(&abt_iocb->u.abt.comp);
180 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
181 QLA_SUCCESS : QLA_FUNCTION_FAILED;
182 sp->free(sp);
183 }
184
185 return rval;
186 }
187
188 void
189 qla2x00_async_iocb_timeout(void *data)
190 {
191 srb_t *sp = data;
192 fc_port_t *fcport = sp->fcport;
193 struct srb_iocb *lio = &sp->u.iocb_cmd;
194 int rc, h;
195 unsigned long flags;
196
197 if (fcport) {
198 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
199 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
200 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
201
202 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
203 } else {
204 pr_info("Async-%s timeout - hdl=%x.\n",
205 sp->name, sp->handle);
206 }
207
208 switch (sp->type) {
209 case SRB_LOGIN_CMD:
210 rc = qla24xx_async_abort_cmd(sp, false);
211 if (rc) {
212 /* Retry as needed. */
213 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
214 lio->u.logio.data[1] =
215 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
216 QLA_LOGIO_LOGIN_RETRIED : 0;
217 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
218 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
219 h++) {
220 if (sp->qpair->req->outstanding_cmds[h] ==
221 sp) {
222 sp->qpair->req->outstanding_cmds[h] =
223 NULL;
224 break;
225 }
226 }
227 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
228 sp->done(sp, QLA_FUNCTION_TIMEOUT);
229 }
230 break;
231 case SRB_LOGOUT_CMD:
232 case SRB_CT_PTHRU_CMD:
233 case SRB_MB_IOCB:
234 case SRB_NACK_PLOGI:
235 case SRB_NACK_PRLI:
236 case SRB_NACK_LOGO:
237 case SRB_CTRL_VP:
238 default:
239 rc = qla24xx_async_abort_cmd(sp, false);
240 if (rc) {
241 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
242 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
243 h++) {
244 if (sp->qpair->req->outstanding_cmds[h] ==
245 sp) {
246 sp->qpair->req->outstanding_cmds[h] =
247 NULL;
248 break;
249 }
250 }
251 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
252 sp->done(sp, QLA_FUNCTION_TIMEOUT);
253 }
254 break;
255 }
256 }
257
258 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
259 {
260 struct scsi_qla_host *vha = sp->vha;
261 struct srb_iocb *lio = &sp->u.iocb_cmd;
262 struct event_arg ea;
263
264 ql_dbg(ql_dbg_disc, vha, 0x20dd,
265 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
266
267 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
268
269 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
270 memset(&ea, 0, sizeof(ea));
271 ea.fcport = sp->fcport;
272 ea.data[0] = lio->u.logio.data[0];
273 ea.data[1] = lio->u.logio.data[1];
274 ea.iop[0] = lio->u.logio.iop[0];
275 ea.iop[1] = lio->u.logio.iop[1];
276 ea.sp = sp;
277 qla24xx_handle_plogi_done_event(vha, &ea);
278 }
279
280 sp->free(sp);
281 }
282
283 static inline bool
284 fcport_is_smaller(fc_port_t *fcport)
285 {
286 if (wwn_to_u64(fcport->port_name) <
287 wwn_to_u64(fcport->vha->port_name))
288 return true;
289 else
290 return false;
291 }
292
293 static inline bool
294 fcport_is_bigger(fc_port_t *fcport)
295 {
296 return !fcport_is_smaller(fcport);
297 }
298
299 int
300 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
301 uint16_t *data)
302 {
303 srb_t *sp;
304 struct srb_iocb *lio;
305 int rval = QLA_FUNCTION_FAILED;
306
307 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
308 fcport->loop_id == FC_NO_LOOP_ID) {
309 ql_log(ql_log_warn, vha, 0xffff,
310 "%s: %8phC - not sending command.\n",
311 __func__, fcport->port_name);
312 return rval;
313 }
314
315 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
316 if (!sp)
317 goto done;
318
319 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
320 fcport->flags |= FCF_ASYNC_SENT;
321 fcport->logout_completed = 0;
322
323 sp->type = SRB_LOGIN_CMD;
324 sp->name = "login";
325 sp->gen1 = fcport->rscn_gen;
326 sp->gen2 = fcport->login_gen;
327
328 lio = &sp->u.iocb_cmd;
329 lio->timeout = qla2x00_async_iocb_timeout;
330 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
331
332 sp->done = qla2x00_async_login_sp_done;
333 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
334 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
335 else
336 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
337
338 if (NVME_TARGET(vha->hw, fcport))
339 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
340
341 ql_dbg(ql_dbg_disc, vha, 0x2072,
342 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
343 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
344 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
345 fcport->login_retry);
346
347 rval = qla2x00_start_sp(sp);
348 if (rval != QLA_SUCCESS) {
349 fcport->flags |= FCF_LOGIN_NEEDED;
350 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
351 goto done_free_sp;
352 }
353
354 return rval;
355
356 done_free_sp:
357 sp->free(sp);
358 fcport->flags &= ~FCF_ASYNC_SENT;
359 done:
360 fcport->flags &= ~FCF_ASYNC_ACTIVE;
361 return rval;
362 }
363
364 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
365 {
366 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
367 sp->fcport->login_gen++;
368 qlt_logo_completion_handler(sp->fcport, res);
369 sp->free(sp);
370 }
371
372 int
373 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
374 {
375 srb_t *sp;
376 struct srb_iocb *lio;
377 int rval = QLA_FUNCTION_FAILED;
378
379 fcport->flags |= FCF_ASYNC_SENT;
380 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
381 if (!sp)
382 goto done;
383
384 sp->type = SRB_LOGOUT_CMD;
385 sp->name = "logout";
386
387 lio = &sp->u.iocb_cmd;
388 lio->timeout = qla2x00_async_iocb_timeout;
389 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
390
391 sp->done = qla2x00_async_logout_sp_done;
392
393 ql_dbg(ql_dbg_disc, vha, 0x2070,
394 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
395 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
396 fcport->d_id.b.area, fcport->d_id.b.al_pa,
397 fcport->port_name);
398
399 rval = qla2x00_start_sp(sp);
400 if (rval != QLA_SUCCESS)
401 goto done_free_sp;
402 return rval;
403
404 done_free_sp:
405 sp->free(sp);
406 done:
407 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
408 return rval;
409 }
410
411 void
412 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
413 uint16_t *data)
414 {
415 fcport->flags &= ~FCF_ASYNC_ACTIVE;
416 /* Don't re-login in target mode */
417 if (!fcport->tgt_session)
418 qla2x00_mark_device_lost(vha, fcport, 1);
419 qlt_logo_completion_handler(fcport, data[0]);
420 }
421
422 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
423 {
424 struct srb_iocb *lio = &sp->u.iocb_cmd;
425 struct scsi_qla_host *vha = sp->vha;
426
427 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
428 if (!test_bit(UNLOADING, &vha->dpc_flags))
429 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
430 lio->u.logio.data);
431 sp->free(sp);
432 }
433
434 int
435 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
436 {
437 srb_t *sp;
438 struct srb_iocb *lio;
439 int rval;
440
441 rval = QLA_FUNCTION_FAILED;
442 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
443 if (!sp)
444 goto done;
445
446 sp->type = SRB_PRLO_CMD;
447 sp->name = "prlo";
448
449 lio = &sp->u.iocb_cmd;
450 lio->timeout = qla2x00_async_iocb_timeout;
451 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
452
453 sp->done = qla2x00_async_prlo_sp_done;
454
455 ql_dbg(ql_dbg_disc, vha, 0x2070,
456 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
457 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
458 fcport->d_id.b.area, fcport->d_id.b.al_pa);
459
460 rval = qla2x00_start_sp(sp);
461 if (rval != QLA_SUCCESS)
462 goto done_free_sp;
463
464 return rval;
465
466 done_free_sp:
467 sp->free(sp);
468 done:
469 fcport->flags &= ~FCF_ASYNC_ACTIVE;
470 return rval;
471 }
472
473 static
474 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
475 {
476 struct fc_port *fcport = ea->fcport;
477
478 ql_dbg(ql_dbg_disc, vha, 0x20d2,
479 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
480 __func__, fcport->port_name, fcport->disc_state,
481 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
482 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
483
484 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
485 ea->data[0]);
486
487 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
488 ql_dbg(ql_dbg_disc, vha, 0x2066,
489 "%s %8phC: adisc fail: post delete\n",
490 __func__, ea->fcport->port_name);
491 /* deleted = 0 & logout_on_delete = force fw cleanup */
492 fcport->deleted = 0;
493 fcport->logout_on_delete = 1;
494 qlt_schedule_sess_for_deletion(ea->fcport);
495 return;
496 }
497
498 if (ea->fcport->disc_state == DSC_DELETE_PEND)
499 return;
500
501 if (ea->sp->gen2 != ea->fcport->login_gen) {
502 /* target side must have changed it. */
503 ql_dbg(ql_dbg_disc, vha, 0x20d3,
504 "%s %8phC generation changed\n",
505 __func__, ea->fcport->port_name);
506 return;
507 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
508 qla_rscn_replay(fcport);
509 qlt_schedule_sess_for_deletion(fcport);
510 return;
511 }
512
513 __qla24xx_handle_gpdb_event(vha, ea);
514 }
515
516 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
517 {
518 struct qla_work_evt *e;
519
520 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
521 if (!e)
522 return QLA_FUNCTION_FAILED;
523
524 e->u.fcport.fcport = fcport;
525 fcport->flags |= FCF_ASYNC_ACTIVE;
526 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
527 return qla2x00_post_work(vha, e);
528 }
529
530 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
531 {
532 struct scsi_qla_host *vha = sp->vha;
533 struct event_arg ea;
534 struct srb_iocb *lio = &sp->u.iocb_cmd;
535
536 ql_dbg(ql_dbg_disc, vha, 0x2066,
537 "Async done-%s res %x %8phC\n",
538 sp->name, res, sp->fcport->port_name);
539
540 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
541
542 memset(&ea, 0, sizeof(ea));
543 ea.rc = res;
544 ea.data[0] = lio->u.logio.data[0];
545 ea.data[1] = lio->u.logio.data[1];
546 ea.iop[0] = lio->u.logio.iop[0];
547 ea.iop[1] = lio->u.logio.iop[1];
548 ea.fcport = sp->fcport;
549 ea.sp = sp;
550
551 qla24xx_handle_adisc_event(vha, &ea);
552
553 sp->free(sp);
554 }
555
556 int
557 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
558 uint16_t *data)
559 {
560 srb_t *sp;
561 struct srb_iocb *lio;
562 int rval = QLA_FUNCTION_FAILED;
563
564 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
565 return rval;
566
567 fcport->flags |= FCF_ASYNC_SENT;
568 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
569 if (!sp)
570 goto done;
571
572 sp->type = SRB_ADISC_CMD;
573 sp->name = "adisc";
574
575 lio = &sp->u.iocb_cmd;
576 lio->timeout = qla2x00_async_iocb_timeout;
577 sp->gen1 = fcport->rscn_gen;
578 sp->gen2 = fcport->login_gen;
579 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
580
581 sp->done = qla2x00_async_adisc_sp_done;
582 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
583 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
584
585 ql_dbg(ql_dbg_disc, vha, 0x206f,
586 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
587 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
588
589 rval = qla2x00_start_sp(sp);
590 if (rval != QLA_SUCCESS)
591 goto done_free_sp;
592
593 return rval;
594
595 done_free_sp:
596 sp->free(sp);
597 done:
598 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
599 qla2x00_post_async_adisc_work(vha, fcport, data);
600 return rval;
601 }
602
603 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
604 {
605 struct qla_hw_data *ha = vha->hw;
606
607 if (IS_FWI2_CAPABLE(ha))
608 return loop_id > NPH_LAST_HANDLE;
609
610 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
611 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
612 }
613
614 /**
615 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
616 * @vha: adapter state pointer.
617 * @dev: port structure pointer.
618 *
619 * Returns:
620 * qla2x00 local function return status code.
621 *
622 * Context:
623 * Kernel context.
624 */
625 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
626 {
627 int rval;
628 struct qla_hw_data *ha = vha->hw;
629 unsigned long flags = 0;
630
631 rval = QLA_SUCCESS;
632
633 spin_lock_irqsave(&ha->vport_slock, flags);
634
635 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
636 if (dev->loop_id >= LOOPID_MAP_SIZE ||
637 qla2x00_is_reserved_id(vha, dev->loop_id)) {
638 dev->loop_id = FC_NO_LOOP_ID;
639 rval = QLA_FUNCTION_FAILED;
640 } else {
641 set_bit(dev->loop_id, ha->loop_id_map);
642 }
643 spin_unlock_irqrestore(&ha->vport_slock, flags);
644
645 if (rval == QLA_SUCCESS)
646 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
647 "Assigning new loopid=%x, portid=%x.\n",
648 dev->loop_id, dev->d_id.b24);
649 else
650 ql_log(ql_log_warn, dev->vha, 0x2087,
651 "No loop_id's available, portid=%x.\n",
652 dev->d_id.b24);
653
654 return rval;
655 }
656
657 void qla2x00_clear_loop_id(fc_port_t *fcport)
658 {
659 struct qla_hw_data *ha = fcport->vha->hw;
660
661 if (fcport->loop_id == FC_NO_LOOP_ID ||
662 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
663 return;
664
665 clear_bit(fcport->loop_id, ha->loop_id_map);
666 fcport->loop_id = FC_NO_LOOP_ID;
667 }
668
669 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
670 struct event_arg *ea)
671 {
672 fc_port_t *fcport, *conflict_fcport;
673 struct get_name_list_extended *e;
674 u16 i, n, found = 0, loop_id;
675 port_id_t id;
676 u64 wwn;
677 u16 data[2];
678 u8 current_login_state, nvme_cls;
679
680 fcport = ea->fcport;
681 ql_dbg(ql_dbg_disc, vha, 0xffff,
682 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
683 __func__, fcport->port_name, fcport->disc_state,
684 fcport->fw_login_state, ea->rc,
685 fcport->login_gen, fcport->last_login_gen,
686 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
687
688 if (fcport->disc_state == DSC_DELETE_PEND)
689 return;
690
691 if (ea->rc) { /* rval */
692 if (fcport->login_retry == 0) {
693 ql_dbg(ql_dbg_disc, vha, 0x20de,
694 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
695 fcport->port_name, fcport->login_retry);
696 }
697 return;
698 }
699
700 if (fcport->last_rscn_gen != fcport->rscn_gen) {
701 qla_rscn_replay(fcport);
702 qlt_schedule_sess_for_deletion(fcport);
703 return;
704 } else if (fcport->last_login_gen != fcport->login_gen) {
705 ql_dbg(ql_dbg_disc, vha, 0x20e0,
706 "%s %8phC login gen changed\n",
707 __func__, fcport->port_name);
708 return;
709 }
710
711 n = ea->data[0] / sizeof(struct get_name_list_extended);
712
713 ql_dbg(ql_dbg_disc, vha, 0x20e1,
714 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
715 __func__, __LINE__, fcport->port_name, n,
716 fcport->d_id.b.domain, fcport->d_id.b.area,
717 fcport->d_id.b.al_pa, fcport->loop_id);
718
719 for (i = 0; i < n; i++) {
720 e = &vha->gnl.l[i];
721 wwn = wwn_to_u64(e->port_name);
722 id.b.domain = e->port_id[2];
723 id.b.area = e->port_id[1];
724 id.b.al_pa = e->port_id[0];
725 id.b.rsvd_1 = 0;
726
727 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
728 continue;
729
730 if (IS_SW_RESV_ADDR(id))
731 continue;
732
733 found = 1;
734
735 loop_id = le16_to_cpu(e->nport_handle);
736 loop_id = (loop_id & 0x7fff);
737 nvme_cls = e->current_login_state >> 4;
738 current_login_state = e->current_login_state & 0xf;
739
740 if (PRLI_PHASE(nvme_cls)) {
741 current_login_state = nvme_cls;
742 fcport->fc4_type &= ~FS_FC4TYPE_FCP;
743 fcport->fc4_type |= FS_FC4TYPE_NVME;
744 } else if (PRLI_PHASE(current_login_state)) {
745 fcport->fc4_type |= FS_FC4TYPE_FCP;
746 fcport->fc4_type &= ~FS_FC4TYPE_NVME;
747 }
748
749 ql_dbg(ql_dbg_disc, vha, 0x20e2,
750 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
751 __func__, fcport->port_name,
752 e->current_login_state, fcport->fw_login_state,
753 fcport->fc4_type, id.b24, fcport->d_id.b24,
754 loop_id, fcport->loop_id);
755
756 switch (fcport->disc_state) {
757 case DSC_DELETE_PEND:
758 case DSC_DELETED:
759 break;
760 default:
761 if ((id.b24 != fcport->d_id.b24 &&
762 fcport->d_id.b24 &&
763 fcport->loop_id != FC_NO_LOOP_ID) ||
764 (fcport->loop_id != FC_NO_LOOP_ID &&
765 fcport->loop_id != loop_id)) {
766 ql_dbg(ql_dbg_disc, vha, 0x20e3,
767 "%s %d %8phC post del sess\n",
768 __func__, __LINE__, fcport->port_name);
769 if (fcport->n2n_flag)
770 fcport->d_id.b24 = 0;
771 qlt_schedule_sess_for_deletion(fcport);
772 return;
773 }
774 break;
775 }
776
777 fcport->loop_id = loop_id;
778 if (fcport->n2n_flag)
779 fcport->d_id.b24 = id.b24;
780
781 wwn = wwn_to_u64(fcport->port_name);
782 qlt_find_sess_invalidate_other(vha, wwn,
783 id, loop_id, &conflict_fcport);
784
785 if (conflict_fcport) {
786 /*
787 * Another share fcport share the same loop_id &
788 * nport id. Conflict fcport needs to finish
789 * cleanup before this fcport can proceed to login.
790 */
791 conflict_fcport->conflict = fcport;
792 fcport->login_pause = 1;
793 }
794
795 switch (vha->hw->current_topology) {
796 default:
797 switch (current_login_state) {
798 case DSC_LS_PRLI_COMP:
799 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
800 vha, 0x20e4, "%s %d %8phC post gpdb\n",
801 __func__, __LINE__, fcport->port_name);
802
803 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
804 fcport->port_type = FCT_INITIATOR;
805 else
806 fcport->port_type = FCT_TARGET;
807 data[0] = data[1] = 0;
808 qla2x00_post_async_adisc_work(vha, fcport,
809 data);
810 break;
811 case DSC_LS_PORT_UNAVAIL:
812 default:
813 if (fcport->loop_id == FC_NO_LOOP_ID) {
814 qla2x00_find_new_loop_id(vha, fcport);
815 fcport->fw_login_state =
816 DSC_LS_PORT_UNAVAIL;
817 }
818 ql_dbg(ql_dbg_disc, vha, 0x20e5,
819 "%s %d %8phC\n", __func__, __LINE__,
820 fcport->port_name);
821 qla24xx_fcport_handle_login(vha, fcport);
822 break;
823 }
824 break;
825 case ISP_CFG_N:
826 fcport->fw_login_state = current_login_state;
827 fcport->d_id = id;
828 switch (current_login_state) {
829 case DSC_LS_PRLI_PEND:
830 /*
831 * In the middle of PRLI. Let it finish.
832 * Allow relogin code to recheck state again
833 * with GNL. Push disc_state back to DELETED
834 * so GNL can go out again
835 */
836 qla2x00_set_fcport_disc_state(fcport,
837 DSC_DELETED);
838 break;
839 case DSC_LS_PRLI_COMP:
840 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
841 fcport->port_type = FCT_INITIATOR;
842 else
843 fcport->port_type = FCT_TARGET;
844
845 data[0] = data[1] = 0;
846 qla2x00_post_async_adisc_work(vha, fcport,
847 data);
848 break;
849 case DSC_LS_PLOGI_COMP:
850 if (fcport_is_bigger(fcport)) {
851 /* local adapter is smaller */
852 if (fcport->loop_id != FC_NO_LOOP_ID)
853 qla2x00_clear_loop_id(fcport);
854
855 fcport->loop_id = loop_id;
856 qla24xx_fcport_handle_login(vha,
857 fcport);
858 break;
859 }
860 /* fall through */
861 default:
862 if (fcport_is_smaller(fcport)) {
863 /* local adapter is bigger */
864 if (fcport->loop_id != FC_NO_LOOP_ID)
865 qla2x00_clear_loop_id(fcport);
866
867 fcport->loop_id = loop_id;
868 qla24xx_fcport_handle_login(vha,
869 fcport);
870 }
871 break;
872 }
873 break;
874 } /* switch (ha->current_topology) */
875 }
876
877 if (!found) {
878 switch (vha->hw->current_topology) {
879 case ISP_CFG_F:
880 case ISP_CFG_FL:
881 for (i = 0; i < n; i++) {
882 e = &vha->gnl.l[i];
883 id.b.domain = e->port_id[0];
884 id.b.area = e->port_id[1];
885 id.b.al_pa = e->port_id[2];
886 id.b.rsvd_1 = 0;
887 loop_id = le16_to_cpu(e->nport_handle);
888
889 if (fcport->d_id.b24 == id.b24) {
890 conflict_fcport =
891 qla2x00_find_fcport_by_wwpn(vha,
892 e->port_name, 0);
893 if (conflict_fcport) {
894 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
895 vha, 0x20e5,
896 "%s %d %8phC post del sess\n",
897 __func__, __LINE__,
898 conflict_fcport->port_name);
899 qlt_schedule_sess_for_deletion
900 (conflict_fcport);
901 }
902 }
903 /*
904 * FW already picked this loop id for
905 * another fcport
906 */
907 if (fcport->loop_id == loop_id)
908 fcport->loop_id = FC_NO_LOOP_ID;
909 }
910 qla24xx_fcport_handle_login(vha, fcport);
911 break;
912 case ISP_CFG_N:
913 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
914 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
915 if (fcport->n2n_link_reset_cnt < 2) {
916 fcport->n2n_link_reset_cnt++;
917 /*
918 * remote port is not sending PLOGI.
919 * Reset link to kick start his state
920 * machine
921 */
922 set_bit(N2N_LINK_RESET,
923 &vha->dpc_flags);
924 } else {
925 if (fcport->n2n_chip_reset < 1) {
926 ql_log(ql_log_info, vha, 0x705d,
927 "Chip reset to bring laser down");
928 set_bit(ISP_ABORT_NEEDED,
929 &vha->dpc_flags);
930 fcport->n2n_chip_reset++;
931 } else {
932 ql_log(ql_log_info, vha, 0x705d,
933 "Remote port %8ph is not coming back\n",
934 fcport->port_name);
935 fcport->scan_state = 0;
936 }
937 }
938 qla2xxx_wake_dpc(vha);
939 } else {
940 /*
941 * report port suppose to do PLOGI. Give him
942 * more time. FW will catch it.
943 */
944 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
945 }
946 break;
947 default:
948 break;
949 }
950 }
951 } /* gnl_event */
952
953 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
954 {
955 struct scsi_qla_host *vha = sp->vha;
956 unsigned long flags;
957 struct fc_port *fcport = NULL, *tf;
958 u16 i, n = 0, loop_id;
959 struct event_arg ea;
960 struct get_name_list_extended *e;
961 u64 wwn;
962 struct list_head h;
963 bool found = false;
964
965 ql_dbg(ql_dbg_disc, vha, 0x20e7,
966 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
967 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
968 sp->u.iocb_cmd.u.mbx.in_mb[2]);
969
970 if (res == QLA_FUNCTION_TIMEOUT)
971 return;
972
973 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
974 memset(&ea, 0, sizeof(ea));
975 ea.sp = sp;
976 ea.rc = res;
977
978 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
979 sizeof(struct get_name_list_extended)) {
980 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
981 sizeof(struct get_name_list_extended);
982 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
983 }
984
985 for (i = 0; i < n; i++) {
986 e = &vha->gnl.l[i];
987 loop_id = le16_to_cpu(e->nport_handle);
988 /* mask out reserve bit */
989 loop_id = (loop_id & 0x7fff);
990 set_bit(loop_id, vha->hw->loop_id_map);
991 wwn = wwn_to_u64(e->port_name);
992
993 ql_dbg(ql_dbg_disc, vha, 0x20e8,
994 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
995 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
996 e->port_id[0], e->current_login_state, e->last_login_state,
997 (loop_id & 0x7fff));
998 }
999
1000 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1001
1002 INIT_LIST_HEAD(&h);
1003 fcport = tf = NULL;
1004 if (!list_empty(&vha->gnl.fcports))
1005 list_splice_init(&vha->gnl.fcports, &h);
1006 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1007
1008 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1009 list_del_init(&fcport->gnl_entry);
1010 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1011 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1012 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1013 ea.fcport = fcport;
1014
1015 qla24xx_handle_gnl_done_event(vha, &ea);
1016 }
1017
1018 /* create new fcport if fw has knowledge of new sessions */
1019 for (i = 0; i < n; i++) {
1020 port_id_t id;
1021 u64 wwnn;
1022
1023 e = &vha->gnl.l[i];
1024 wwn = wwn_to_u64(e->port_name);
1025
1026 found = false;
1027 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1028 if (!memcmp((u8 *)&wwn, fcport->port_name,
1029 WWN_SIZE)) {
1030 found = true;
1031 break;
1032 }
1033 }
1034
1035 id.b.domain = e->port_id[2];
1036 id.b.area = e->port_id[1];
1037 id.b.al_pa = e->port_id[0];
1038 id.b.rsvd_1 = 0;
1039
1040 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1041 ql_dbg(ql_dbg_disc, vha, 0x2065,
1042 "%s %d %8phC %06x post new sess\n",
1043 __func__, __LINE__, (u8 *)&wwn, id.b24);
1044 wwnn = wwn_to_u64(e->node_name);
1045 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1046 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
1047 }
1048 }
1049
1050 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1051 vha->gnl.sent = 0;
1052 if (!list_empty(&vha->gnl.fcports)) {
1053 /* retrigger gnl */
1054 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1055 gnl_entry) {
1056 list_del_init(&fcport->gnl_entry);
1057 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1058 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1059 break;
1060 }
1061 }
1062 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1063
1064 sp->free(sp);
1065 }
1066
1067 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1068 {
1069 srb_t *sp;
1070 struct srb_iocb *mbx;
1071 int rval = QLA_FUNCTION_FAILED;
1072 unsigned long flags;
1073 u16 *mb;
1074
1075 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1076 return rval;
1077
1078 ql_dbg(ql_dbg_disc, vha, 0x20d9,
1079 "Async-gnlist WWPN %8phC \n", fcport->port_name);
1080
1081 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1082 fcport->flags |= FCF_ASYNC_SENT;
1083 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1084 fcport->last_rscn_gen = fcport->rscn_gen;
1085 fcport->last_login_gen = fcport->login_gen;
1086
1087 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1088 if (vha->gnl.sent) {
1089 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1090 return QLA_SUCCESS;
1091 }
1092 vha->gnl.sent = 1;
1093 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1094
1095 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1096 if (!sp)
1097 goto done;
1098
1099 sp->type = SRB_MB_IOCB;
1100 sp->name = "gnlist";
1101 sp->gen1 = fcport->rscn_gen;
1102 sp->gen2 = fcport->login_gen;
1103
1104 mbx = &sp->u.iocb_cmd;
1105 mbx->timeout = qla2x00_async_iocb_timeout;
1106 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
1107
1108 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1109 mb[0] = MBC_PORT_NODE_NAME_LIST;
1110 mb[1] = BIT_2 | BIT_3;
1111 mb[2] = MSW(vha->gnl.ldma);
1112 mb[3] = LSW(vha->gnl.ldma);
1113 mb[6] = MSW(MSD(vha->gnl.ldma));
1114 mb[7] = LSW(MSD(vha->gnl.ldma));
1115 mb[8] = vha->gnl.size;
1116 mb[9] = vha->vp_idx;
1117
1118 sp->done = qla24xx_async_gnl_sp_done;
1119
1120 ql_dbg(ql_dbg_disc, vha, 0x20da,
1121 "Async-%s - OUT WWPN %8phC hndl %x\n",
1122 sp->name, fcport->port_name, sp->handle);
1123
1124 rval = qla2x00_start_sp(sp);
1125 if (rval != QLA_SUCCESS)
1126 goto done_free_sp;
1127
1128 return rval;
1129
1130 done_free_sp:
1131 sp->free(sp);
1132 done:
1133 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT);
1134 return rval;
1135 }
1136
1137 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1138 {
1139 struct qla_work_evt *e;
1140
1141 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1142 if (!e)
1143 return QLA_FUNCTION_FAILED;
1144
1145 e->u.fcport.fcport = fcport;
1146 fcport->flags |= FCF_ASYNC_ACTIVE;
1147 return qla2x00_post_work(vha, e);
1148 }
1149
1150 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1151 {
1152 struct scsi_qla_host *vha = sp->vha;
1153 struct qla_hw_data *ha = vha->hw;
1154 fc_port_t *fcport = sp->fcport;
1155 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1156 struct event_arg ea;
1157
1158 ql_dbg(ql_dbg_disc, vha, 0x20db,
1159 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1160 sp->name, res, fcport->port_name, mb[1], mb[2]);
1161
1162 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1163
1164 if (res == QLA_FUNCTION_TIMEOUT)
1165 goto done;
1166
1167 memset(&ea, 0, sizeof(ea));
1168 ea.fcport = fcport;
1169 ea.sp = sp;
1170
1171 qla24xx_handle_gpdb_event(vha, &ea);
1172
1173 done:
1174 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1175 sp->u.iocb_cmd.u.mbx.in_dma);
1176
1177 sp->free(sp);
1178 }
1179
1180 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1181 {
1182 struct qla_work_evt *e;
1183
1184 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1185 if (!e)
1186 return QLA_FUNCTION_FAILED;
1187
1188 e->u.fcport.fcport = fcport;
1189
1190 return qla2x00_post_work(vha, e);
1191 }
1192
1193 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1194 {
1195 struct scsi_qla_host *vha = sp->vha;
1196 struct srb_iocb *lio = &sp->u.iocb_cmd;
1197 struct event_arg ea;
1198
1199 ql_dbg(ql_dbg_disc, vha, 0x2129,
1200 "%s %8phC res %d \n", __func__,
1201 sp->fcport->port_name, res);
1202
1203 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1204
1205 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1206 memset(&ea, 0, sizeof(ea));
1207 ea.fcport = sp->fcport;
1208 ea.data[0] = lio->u.logio.data[0];
1209 ea.data[1] = lio->u.logio.data[1];
1210 ea.iop[0] = lio->u.logio.iop[0];
1211 ea.iop[1] = lio->u.logio.iop[1];
1212 ea.sp = sp;
1213
1214 qla24xx_handle_prli_done_event(vha, &ea);
1215 }
1216
1217 sp->free(sp);
1218 }
1219
1220 int
1221 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1222 {
1223 srb_t *sp;
1224 struct srb_iocb *lio;
1225 int rval = QLA_FUNCTION_FAILED;
1226
1227 if (!vha->flags.online) {
1228 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1229 __func__, __LINE__, fcport->port_name);
1230 return rval;
1231 }
1232
1233 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1234 fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1235 qla_dual_mode_enabled(vha)) {
1236 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1237 __func__, __LINE__, fcport->port_name);
1238 return rval;
1239 }
1240
1241 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1242 if (!sp)
1243 return rval;
1244
1245 fcport->flags |= FCF_ASYNC_SENT;
1246 fcport->logout_completed = 0;
1247
1248 sp->type = SRB_PRLI_CMD;
1249 sp->name = "prli";
1250
1251 lio = &sp->u.iocb_cmd;
1252 lio->timeout = qla2x00_async_iocb_timeout;
1253 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1254
1255 sp->done = qla2x00_async_prli_sp_done;
1256 lio->u.logio.flags = 0;
1257
1258 if (NVME_TARGET(vha->hw, fcport))
1259 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1260
1261 ql_dbg(ql_dbg_disc, vha, 0x211b,
1262 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1263 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1264 fcport->login_retry, NVME_TARGET(vha->hw, fcport) ? "nvme" : "fc");
1265
1266 rval = qla2x00_start_sp(sp);
1267 if (rval != QLA_SUCCESS) {
1268 fcport->flags |= FCF_LOGIN_NEEDED;
1269 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1270 goto done_free_sp;
1271 }
1272
1273 return rval;
1274
1275 done_free_sp:
1276 sp->free(sp);
1277 fcport->flags &= ~FCF_ASYNC_SENT;
1278 return rval;
1279 }
1280
1281 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1282 {
1283 struct qla_work_evt *e;
1284
1285 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1286 if (!e)
1287 return QLA_FUNCTION_FAILED;
1288
1289 e->u.fcport.fcport = fcport;
1290 e->u.fcport.opt = opt;
1291 fcport->flags |= FCF_ASYNC_ACTIVE;
1292 return qla2x00_post_work(vha, e);
1293 }
1294
1295 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1296 {
1297 srb_t *sp;
1298 struct srb_iocb *mbx;
1299 int rval = QLA_FUNCTION_FAILED;
1300 u16 *mb;
1301 dma_addr_t pd_dma;
1302 struct port_database_24xx *pd;
1303 struct qla_hw_data *ha = vha->hw;
1304
1305 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
1306 fcport->loop_id == FC_NO_LOOP_ID) {
1307 ql_log(ql_log_warn, vha, 0xffff,
1308 "%s: %8phC - not sending command.\n",
1309 __func__, fcport->port_name);
1310 return rval;
1311 }
1312
1313 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1314 if (!sp)
1315 goto done;
1316
1317 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1318
1319 fcport->flags |= FCF_ASYNC_SENT;
1320 sp->type = SRB_MB_IOCB;
1321 sp->name = "gpdb";
1322 sp->gen1 = fcport->rscn_gen;
1323 sp->gen2 = fcport->login_gen;
1324
1325 mbx = &sp->u.iocb_cmd;
1326 mbx->timeout = qla2x00_async_iocb_timeout;
1327 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1328
1329 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1330 if (pd == NULL) {
1331 ql_log(ql_log_warn, vha, 0xd043,
1332 "Failed to allocate port database structure.\n");
1333 goto done_free_sp;
1334 }
1335
1336 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1337 mb[0] = MBC_GET_PORT_DATABASE;
1338 mb[1] = fcport->loop_id;
1339 mb[2] = MSW(pd_dma);
1340 mb[3] = LSW(pd_dma);
1341 mb[6] = MSW(MSD(pd_dma));
1342 mb[7] = LSW(MSD(pd_dma));
1343 mb[9] = vha->vp_idx;
1344 mb[10] = opt;
1345
1346 mbx->u.mbx.in = (void *)pd;
1347 mbx->u.mbx.in_dma = pd_dma;
1348
1349 sp->done = qla24xx_async_gpdb_sp_done;
1350
1351 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1352 "Async-%s %8phC hndl %x opt %x\n",
1353 sp->name, fcport->port_name, sp->handle, opt);
1354
1355 rval = qla2x00_start_sp(sp);
1356 if (rval != QLA_SUCCESS)
1357 goto done_free_sp;
1358 return rval;
1359
1360 done_free_sp:
1361 if (pd)
1362 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1363
1364 sp->free(sp);
1365 fcport->flags &= ~FCF_ASYNC_SENT;
1366 done:
1367 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1368 qla24xx_post_gpdb_work(vha, fcport, opt);
1369 return rval;
1370 }
1371
1372 static
1373 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1374 {
1375 unsigned long flags;
1376
1377 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1378 ea->fcport->login_gen++;
1379 ea->fcport->deleted = 0;
1380 ea->fcport->logout_on_delete = 1;
1381
1382 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1383 vha->fcport_count++;
1384 ea->fcport->login_succ = 1;
1385
1386 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1387 qla24xx_sched_upd_fcport(ea->fcport);
1388 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1389 } else if (ea->fcport->login_succ) {
1390 /*
1391 * We have an existing session. A late RSCN delivery
1392 * must have triggered the session to be re-validate.
1393 * Session is still valid.
1394 */
1395 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1396 "%s %d %8phC session revalidate success\n",
1397 __func__, __LINE__, ea->fcport->port_name);
1398 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1399 }
1400 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1401 }
1402
1403 static
1404 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1405 {
1406 fc_port_t *fcport = ea->fcport;
1407 struct port_database_24xx *pd;
1408 struct srb *sp = ea->sp;
1409 uint8_t ls;
1410
1411 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1412
1413 fcport->flags &= ~FCF_ASYNC_SENT;
1414
1415 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1416 "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__,
1417 fcport->port_name, fcport->disc_state, pd->current_login_state,
1418 fcport->fc4_type, ea->rc);
1419
1420 if (fcport->disc_state == DSC_DELETE_PEND)
1421 return;
1422
1423 if (NVME_TARGET(vha->hw, fcport))
1424 ls = pd->current_login_state >> 4;
1425 else
1426 ls = pd->current_login_state & 0xf;
1427
1428 if (ea->sp->gen2 != fcport->login_gen) {
1429 /* target side must have changed it. */
1430
1431 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1432 "%s %8phC generation changed\n",
1433 __func__, fcport->port_name);
1434 return;
1435 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1436 qla_rscn_replay(fcport);
1437 qlt_schedule_sess_for_deletion(fcport);
1438 return;
1439 }
1440
1441 switch (ls) {
1442 case PDS_PRLI_COMPLETE:
1443 __qla24xx_parse_gpdb(vha, fcport, pd);
1444 break;
1445 case PDS_PLOGI_PENDING:
1446 case PDS_PLOGI_COMPLETE:
1447 case PDS_PRLI_PENDING:
1448 case PDS_PRLI2_PENDING:
1449 /* Set discovery state back to GNL to Relogin attempt */
1450 if (qla_dual_mode_enabled(vha) ||
1451 qla_ini_mode_enabled(vha)) {
1452 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1453 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1454 }
1455 return;
1456 case PDS_LOGO_PENDING:
1457 case PDS_PORT_UNAVAILABLE:
1458 default:
1459 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1460 __func__, __LINE__, fcport->port_name);
1461 qlt_schedule_sess_for_deletion(fcport);
1462 return;
1463 }
1464 __qla24xx_handle_gpdb_event(vha, ea);
1465 } /* gpdb event */
1466
1467 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1468 {
1469 u8 login = 0;
1470 int rc;
1471
1472 if (qla_tgt_mode_enabled(vha))
1473 return;
1474
1475 if (qla_dual_mode_enabled(vha)) {
1476 if (N2N_TOPO(vha->hw)) {
1477 u64 mywwn, wwn;
1478
1479 mywwn = wwn_to_u64(vha->port_name);
1480 wwn = wwn_to_u64(fcport->port_name);
1481 if (mywwn > wwn)
1482 login = 1;
1483 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1484 && time_after_eq(jiffies,
1485 fcport->plogi_nack_done_deadline))
1486 login = 1;
1487 } else {
1488 login = 1;
1489 }
1490 } else {
1491 /* initiator mode */
1492 login = 1;
1493 }
1494
1495 if (login && fcport->login_retry) {
1496 fcport->login_retry--;
1497 if (fcport->loop_id == FC_NO_LOOP_ID) {
1498 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1499 rc = qla2x00_find_new_loop_id(vha, fcport);
1500 if (rc) {
1501 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1502 "%s %d %8phC post del sess - out of loopid\n",
1503 __func__, __LINE__, fcport->port_name);
1504 fcport->scan_state = 0;
1505 qlt_schedule_sess_for_deletion(fcport);
1506 return;
1507 }
1508 }
1509 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1510 "%s %d %8phC post login\n",
1511 __func__, __LINE__, fcport->port_name);
1512 qla2x00_post_async_login_work(vha, fcport, NULL);
1513 }
1514 }
1515
1516 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1517 {
1518 u16 data[2];
1519 u64 wwn;
1520 u16 sec;
1521
1522 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1523 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
1524 __func__, fcport->port_name, fcport->disc_state,
1525 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1526 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1527 fcport->login_gen, fcport->loop_id, fcport->scan_state);
1528
1529 if (fcport->scan_state != QLA_FCPORT_FOUND)
1530 return 0;
1531
1532 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1533 qla_dual_mode_enabled(vha) &&
1534 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1535 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1536 return 0;
1537
1538 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1539 !N2N_TOPO(vha->hw)) {
1540 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1541 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1542 return 0;
1543 }
1544 }
1545
1546 /* Target won't initiate port login if fabric is present */
1547 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1548 return 0;
1549
1550 if (fcport->flags & FCF_ASYNC_SENT) {
1551 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1552 return 0;
1553 }
1554
1555 switch (fcport->disc_state) {
1556 case DSC_DELETED:
1557 wwn = wwn_to_u64(fcport->node_name);
1558 switch (vha->hw->current_topology) {
1559 case ISP_CFG_N:
1560 if (fcport_is_smaller(fcport)) {
1561 /* this adapter is bigger */
1562 if (fcport->login_retry) {
1563 if (fcport->loop_id == FC_NO_LOOP_ID) {
1564 qla2x00_find_new_loop_id(vha,
1565 fcport);
1566 fcport->fw_login_state =
1567 DSC_LS_PORT_UNAVAIL;
1568 }
1569 fcport->login_retry--;
1570 qla_post_els_plogi_work(vha, fcport);
1571 } else {
1572 ql_log(ql_log_info, vha, 0x705d,
1573 "Unable to reach remote port %8phC",
1574 fcport->port_name);
1575 }
1576 } else {
1577 qla24xx_post_gnl_work(vha, fcport);
1578 }
1579 break;
1580 default:
1581 if (wwn == 0) {
1582 ql_dbg(ql_dbg_disc, vha, 0xffff,
1583 "%s %d %8phC post GNNID\n",
1584 __func__, __LINE__, fcport->port_name);
1585 qla24xx_post_gnnid_work(vha, fcport);
1586 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1587 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1588 "%s %d %8phC post gnl\n",
1589 __func__, __LINE__, fcport->port_name);
1590 qla24xx_post_gnl_work(vha, fcport);
1591 } else {
1592 qla_chk_n2n_b4_login(vha, fcport);
1593 }
1594 break;
1595 }
1596 break;
1597
1598 case DSC_GNL:
1599 switch (vha->hw->current_topology) {
1600 case ISP_CFG_N:
1601 if ((fcport->current_login_state & 0xf) == 0x6) {
1602 ql_dbg(ql_dbg_disc, vha, 0x2118,
1603 "%s %d %8phC post GPDB work\n",
1604 __func__, __LINE__, fcport->port_name);
1605 fcport->chip_reset =
1606 vha->hw->base_qpair->chip_reset;
1607 qla24xx_post_gpdb_work(vha, fcport, 0);
1608 } else {
1609 ql_dbg(ql_dbg_disc, vha, 0x2118,
1610 "%s %d %8phC post %s PRLI\n",
1611 __func__, __LINE__, fcport->port_name,
1612 NVME_TARGET(vha->hw, fcport) ? "NVME" :
1613 "FC");
1614 qla24xx_post_prli_work(vha, fcport);
1615 }
1616 break;
1617 default:
1618 if (fcport->login_pause) {
1619 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1620 "%s %d %8phC exit\n",
1621 __func__, __LINE__,
1622 fcport->port_name);
1623 fcport->last_rscn_gen = fcport->rscn_gen;
1624 fcport->last_login_gen = fcport->login_gen;
1625 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1626 break;
1627 }
1628 qla_chk_n2n_b4_login(vha, fcport);
1629 break;
1630 }
1631 break;
1632
1633 case DSC_LOGIN_FAILED:
1634 if (N2N_TOPO(vha->hw))
1635 qla_chk_n2n_b4_login(vha, fcport);
1636 else
1637 qlt_schedule_sess_for_deletion(fcport);
1638 break;
1639
1640 case DSC_LOGIN_COMPLETE:
1641 /* recheck login state */
1642 data[0] = data[1] = 0;
1643 qla2x00_post_async_adisc_work(vha, fcport, data);
1644 break;
1645
1646 case DSC_LOGIN_PEND:
1647 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1648 qla24xx_post_prli_work(vha, fcport);
1649 break;
1650
1651 case DSC_UPD_FCPORT:
1652 sec = jiffies_to_msecs(jiffies -
1653 fcport->jiffies_at_registration)/1000;
1654 if (fcport->sec_since_registration < sec && sec &&
1655 !(sec % 60)) {
1656 fcport->sec_since_registration = sec;
1657 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1658 "%s %8phC - Slow Rport registration(%d Sec)\n",
1659 __func__, fcport->port_name, sec);
1660 }
1661
1662 if (fcport->next_disc_state != DSC_DELETE_PEND)
1663 fcport->next_disc_state = DSC_ADISC;
1664 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1665 break;
1666
1667 default:
1668 break;
1669 }
1670
1671 return 0;
1672 }
1673
1674 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1675 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1676 {
1677 struct qla_work_evt *e;
1678
1679 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1680 if (!e)
1681 return QLA_FUNCTION_FAILED;
1682
1683 e->u.new_sess.id = *id;
1684 e->u.new_sess.pla = pla;
1685 e->u.new_sess.fc4_type = fc4_type;
1686 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1687 if (node_name)
1688 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1689
1690 return qla2x00_post_work(vha, e);
1691 }
1692
1693 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1694 {
1695 fc_port_t *fcport;
1696 unsigned long flags;
1697
1698 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1699 if (fcport) {
1700 fcport->scan_needed = 1;
1701 fcport->rscn_gen++;
1702 }
1703
1704 spin_lock_irqsave(&vha->work_lock, flags);
1705 if (vha->scan.scan_flags == 0) {
1706 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1707 vha->scan.scan_flags |= SF_QUEUED;
1708 schedule_delayed_work(&vha->scan.scan_work, 5);
1709 }
1710 spin_unlock_irqrestore(&vha->work_lock, flags);
1711 }
1712
1713 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1714 struct event_arg *ea)
1715 {
1716 fc_port_t *fcport = ea->fcport;
1717
1718 if (test_bit(UNLOADING, &vha->dpc_flags))
1719 return;
1720
1721 ql_dbg(ql_dbg_disc, vha, 0x2102,
1722 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1723 __func__, fcport->port_name, fcport->disc_state,
1724 fcport->fw_login_state, fcport->login_pause,
1725 fcport->deleted, fcport->conflict,
1726 fcport->last_rscn_gen, fcport->rscn_gen,
1727 fcport->last_login_gen, fcport->login_gen,
1728 fcport->flags);
1729
1730 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1731 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1732 __func__, __LINE__, fcport->port_name);
1733 qla24xx_post_gnl_work(vha, fcport);
1734 return;
1735 }
1736
1737 qla24xx_fcport_handle_login(vha, fcport);
1738 }
1739
1740 void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1741 struct event_arg *ea)
1742 {
1743 /* for pure Target Mode, PRLI will not be initiated */
1744 if (vha->host->active_mode == MODE_TARGET)
1745 return;
1746
1747 ql_dbg(ql_dbg_disc, vha, 0x2118,
1748 "%s %d %8phC post PRLI\n",
1749 __func__, __LINE__, ea->fcport->port_name);
1750 qla24xx_post_prli_work(vha, ea->fcport);
1751 }
1752
1753 /*
1754 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1755 * to be consumed by the fcport
1756 */
1757 void qla_rscn_replay(fc_port_t *fcport)
1758 {
1759 struct event_arg ea;
1760
1761 switch (fcport->disc_state) {
1762 case DSC_DELETE_PEND:
1763 return;
1764 default:
1765 break;
1766 }
1767
1768 if (fcport->scan_needed) {
1769 memset(&ea, 0, sizeof(ea));
1770 ea.id = fcport->d_id;
1771 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1772 qla2x00_handle_rscn(fcport->vha, &ea);
1773 }
1774 }
1775
1776 static void
1777 qla2x00_tmf_iocb_timeout(void *data)
1778 {
1779 srb_t *sp = data;
1780 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1781 int rc, h;
1782 unsigned long flags;
1783
1784 rc = qla24xx_async_abort_cmd(sp, false);
1785 if (rc) {
1786 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
1787 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
1788 if (sp->qpair->req->outstanding_cmds[h] == sp) {
1789 sp->qpair->req->outstanding_cmds[h] = NULL;
1790 break;
1791 }
1792 }
1793 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
1794 tmf->u.tmf.comp_status = CS_TIMEOUT;
1795 tmf->u.tmf.data = QLA_FUNCTION_FAILED;
1796 complete(&tmf->u.tmf.comp);
1797 }
1798 }
1799
1800 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
1801 {
1802 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1803
1804 complete(&tmf->u.tmf.comp);
1805 }
1806
1807 int
1808 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1809 uint32_t tag)
1810 {
1811 struct scsi_qla_host *vha = fcport->vha;
1812 struct srb_iocb *tm_iocb;
1813 srb_t *sp;
1814 int rval = QLA_FUNCTION_FAILED;
1815
1816 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1817 if (!sp)
1818 goto done;
1819
1820 tm_iocb = &sp->u.iocb_cmd;
1821 sp->type = SRB_TM_CMD;
1822 sp->name = "tmf";
1823
1824 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1825 init_completion(&tm_iocb->u.tmf.comp);
1826 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1827
1828 tm_iocb->u.tmf.flags = flags;
1829 tm_iocb->u.tmf.lun = lun;
1830 tm_iocb->u.tmf.data = tag;
1831 sp->done = qla2x00_tmf_sp_done;
1832
1833 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1834 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1835 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1836 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1837
1838 rval = qla2x00_start_sp(sp);
1839 if (rval != QLA_SUCCESS)
1840 goto done_free_sp;
1841 wait_for_completion(&tm_iocb->u.tmf.comp);
1842
1843 rval = tm_iocb->u.tmf.data;
1844
1845 if (rval != QLA_SUCCESS) {
1846 ql_log(ql_log_warn, vha, 0x8030,
1847 "TM IOCB failed (%x).\n", rval);
1848 }
1849
1850 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1851 flags = tm_iocb->u.tmf.flags;
1852 lun = (uint16_t)tm_iocb->u.tmf.lun;
1853
1854 /* Issue Marker IOCB */
1855 qla2x00_marker(vha, vha->hw->base_qpair,
1856 fcport->loop_id, lun,
1857 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1858 }
1859
1860 done_free_sp:
1861 sp->free(sp);
1862 fcport->flags &= ~FCF_ASYNC_SENT;
1863 done:
1864 return rval;
1865 }
1866
1867 int
1868 qla24xx_async_abort_command(srb_t *sp)
1869 {
1870 unsigned long flags = 0;
1871
1872 uint32_t handle;
1873 fc_port_t *fcport = sp->fcport;
1874 struct qla_qpair *qpair = sp->qpair;
1875 struct scsi_qla_host *vha = fcport->vha;
1876 struct req_que *req = qpair->req;
1877
1878 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1879 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1880 if (req->outstanding_cmds[handle] == sp)
1881 break;
1882 }
1883 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1884
1885 if (handle == req->num_outstanding_cmds) {
1886 /* Command not found. */
1887 return QLA_FUNCTION_FAILED;
1888 }
1889 if (sp->type == SRB_FXIOCB_DCMD)
1890 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1891 FXDISC_ABORT_IOCTL);
1892
1893 return qla24xx_async_abort_cmd(sp, true);
1894 }
1895
1896 static void
1897 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1898 {
1899 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
1900 ea->data[0]);
1901
1902 switch (ea->data[0]) {
1903 case MBS_COMMAND_COMPLETE:
1904 ql_dbg(ql_dbg_disc, vha, 0x2118,
1905 "%s %d %8phC post gpdb\n",
1906 __func__, __LINE__, ea->fcport->port_name);
1907
1908 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1909 ea->fcport->logout_on_delete = 1;
1910 ea->fcport->nvme_prli_service_param = ea->iop[0];
1911 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
1912 ea->fcport->nvme_first_burst_size =
1913 (ea->iop[1] & 0xffff) * 512;
1914 else
1915 ea->fcport->nvme_first_burst_size = 0;
1916 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1917 break;
1918 default:
1919 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1920 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
1921 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1922 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1923 break;
1924 }
1925
1926 /*
1927 * Retry PRLI with other FC-4 type if failure occurred on dual
1928 * FCP/NVMe port
1929 */
1930 if (NVME_FCP_TARGET(ea->fcport)) {
1931 ql_dbg(ql_dbg_disc, vha, 0x2118,
1932 "%s %d %8phC post %s prli\n",
1933 __func__, __LINE__, ea->fcport->port_name,
1934 (ea->fcport->fc4_type & FS_FC4TYPE_NVME) ?
1935 "NVMe" : "FCP");
1936 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME)
1937 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME;
1938 else
1939 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP;
1940 }
1941
1942 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1943 ea->fcport->keep_nport_handle = 0;
1944 ea->fcport->logout_on_delete = 1;
1945 qlt_schedule_sess_for_deletion(ea->fcport);
1946 break;
1947 }
1948 }
1949
1950 void
1951 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1952 {
1953 port_id_t cid; /* conflict Nport id */
1954 u16 lid;
1955 struct fc_port *conflict_fcport;
1956 unsigned long flags;
1957 struct fc_port *fcport = ea->fcport;
1958
1959 ql_dbg(ql_dbg_disc, vha, 0xffff,
1960 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1961 __func__, fcport->port_name, fcport->disc_state,
1962 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1963 ea->sp->gen1, fcport->rscn_gen,
1964 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1965
1966 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1967 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1968 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1969 "%s %d %8phC Remote is trying to login\n",
1970 __func__, __LINE__, fcport->port_name);
1971 return;
1972 }
1973
1974 if ((fcport->disc_state == DSC_DELETE_PEND) ||
1975 (fcport->disc_state == DSC_DELETED)) {
1976 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1977 return;
1978 }
1979
1980 if (ea->sp->gen2 != fcport->login_gen) {
1981 /* target side must have changed it. */
1982 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1983 "%s %8phC generation changed\n",
1984 __func__, fcport->port_name);
1985 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1986 return;
1987 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1988 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1989 "%s %8phC RSCN generation changed\n",
1990 __func__, fcport->port_name);
1991 qla_rscn_replay(fcport);
1992 qlt_schedule_sess_for_deletion(fcport);
1993 return;
1994 }
1995
1996 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
1997 ea->data[0]);
1998
1999 switch (ea->data[0]) {
2000 case MBS_COMMAND_COMPLETE:
2001 /*
2002 * Driver must validate login state - If PRLI not complete,
2003 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2004 * requests.
2005 */
2006 if (NVME_TARGET(vha->hw, ea->fcport)) {
2007 ql_dbg(ql_dbg_disc, vha, 0x2117,
2008 "%s %d %8phC post prli\n",
2009 __func__, __LINE__, ea->fcport->port_name);
2010 qla24xx_post_prli_work(vha, ea->fcport);
2011 } else {
2012 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2013 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2014 __func__, __LINE__, ea->fcport->port_name,
2015 ea->fcport->loop_id, ea->fcport->d_id.b24);
2016
2017 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2018 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2019 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2020 ea->fcport->logout_on_delete = 1;
2021 ea->fcport->send_els_logo = 0;
2022 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
2023 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2024
2025 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2026 }
2027 break;
2028 case MBS_COMMAND_ERROR:
2029 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2030 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2031
2032 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2033 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_FAILED);
2034 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
2035 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2036 else
2037 qla2x00_mark_device_lost(vha, ea->fcport, 1);
2038 break;
2039 case MBS_LOOP_ID_USED:
2040 /* data[1] = IO PARAM 1 = nport ID */
2041 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2042 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2043 cid.b.al_pa = ea->iop[1] & 0xff;
2044 cid.b.rsvd_1 = 0;
2045
2046 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2047 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2048 __func__, __LINE__, ea->fcport->port_name,
2049 ea->fcport->loop_id, cid.b24);
2050
2051 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2052 ea->fcport->loop_id = FC_NO_LOOP_ID;
2053 qla24xx_post_gnl_work(vha, ea->fcport);
2054 break;
2055 case MBS_PORT_ID_USED:
2056 lid = ea->iop[1] & 0xffff;
2057 qlt_find_sess_invalidate_other(vha,
2058 wwn_to_u64(ea->fcport->port_name),
2059 ea->fcport->d_id, lid, &conflict_fcport);
2060
2061 if (conflict_fcport) {
2062 /*
2063 * Another fcport share the same loop_id/nport id.
2064 * Conflict fcport needs to finish cleanup before this
2065 * fcport can proceed to login.
2066 */
2067 conflict_fcport->conflict = ea->fcport;
2068 ea->fcport->login_pause = 1;
2069
2070 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2071 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2072 __func__, __LINE__, ea->fcport->port_name,
2073 ea->fcport->d_id.b24, lid);
2074 } else {
2075 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2076 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2077 __func__, __LINE__, ea->fcport->port_name,
2078 ea->fcport->d_id.b24, lid);
2079
2080 qla2x00_clear_loop_id(ea->fcport);
2081 set_bit(lid, vha->hw->loop_id_map);
2082 ea->fcport->loop_id = lid;
2083 ea->fcport->keep_nport_handle = 0;
2084 ea->fcport->logout_on_delete = 1;
2085 qlt_schedule_sess_for_deletion(ea->fcport);
2086 }
2087 break;
2088 }
2089 return;
2090 }
2091
2092 /****************************************************************************/
2093 /* QLogic ISP2x00 Hardware Support Functions. */
2094 /****************************************************************************/
2095
2096 static int
2097 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2098 {
2099 int rval = QLA_SUCCESS;
2100 struct qla_hw_data *ha = vha->hw;
2101 uint32_t idc_major_ver, idc_minor_ver;
2102 uint16_t config[4];
2103
2104 qla83xx_idc_lock(vha, 0);
2105
2106 /* SV: TODO: Assign initialization timeout from
2107 * flash-info / other param
2108 */
2109 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2110 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2111
2112 /* Set our fcoe function presence */
2113 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2114 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2115 "Error while setting DRV-Presence.\n");
2116 rval = QLA_FUNCTION_FAILED;
2117 goto exit;
2118 }
2119
2120 /* Decide the reset ownership */
2121 qla83xx_reset_ownership(vha);
2122
2123 /*
2124 * On first protocol driver load:
2125 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2126 * register.
2127 * Others: Check compatibility with current IDC Major version.
2128 */
2129 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2130 if (ha->flags.nic_core_reset_owner) {
2131 /* Set IDC Major version */
2132 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2133 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2134
2135 /* Clearing IDC-Lock-Recovery register */
2136 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2137 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2138 /*
2139 * Clear further IDC participation if we are not compatible with
2140 * the current IDC Major Version.
2141 */
2142 ql_log(ql_log_warn, vha, 0xb07d,
2143 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2144 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2145 __qla83xx_clear_drv_presence(vha);
2146 rval = QLA_FUNCTION_FAILED;
2147 goto exit;
2148 }
2149 /* Each function sets its supported Minor version. */
2150 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2151 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2152 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2153
2154 if (ha->flags.nic_core_reset_owner) {
2155 memset(config, 0, sizeof(config));
2156 if (!qla81xx_get_port_config(vha, config))
2157 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2158 QLA8XXX_DEV_READY);
2159 }
2160
2161 rval = qla83xx_idc_state_handler(vha);
2162
2163 exit:
2164 qla83xx_idc_unlock(vha, 0);
2165
2166 return rval;
2167 }
2168
2169 /*
2170 * qla2x00_initialize_adapter
2171 * Initialize board.
2172 *
2173 * Input:
2174 * ha = adapter block pointer.
2175 *
2176 * Returns:
2177 * 0 = success
2178 */
2179 int
2180 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2181 {
2182 int rval;
2183 struct qla_hw_data *ha = vha->hw;
2184 struct req_que *req = ha->req_q_map[0];
2185 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2186
2187 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2188 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2189
2190 /* Clear adapter flags. */
2191 vha->flags.online = 0;
2192 ha->flags.chip_reset_done = 0;
2193 vha->flags.reset_active = 0;
2194 ha->flags.pci_channel_io_perm_failure = 0;
2195 ha->flags.eeh_busy = 0;
2196 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2197 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2198 atomic_set(&vha->loop_state, LOOP_DOWN);
2199 vha->device_flags = DFLG_NO_CABLE;
2200 vha->dpc_flags = 0;
2201 vha->flags.management_server_logged_in = 0;
2202 vha->marker_needed = 0;
2203 ha->isp_abort_cnt = 0;
2204 ha->beacon_blink_led = 0;
2205
2206 set_bit(0, ha->req_qid_map);
2207 set_bit(0, ha->rsp_qid_map);
2208
2209 ql_dbg(ql_dbg_init, vha, 0x0040,
2210 "Configuring PCI space...\n");
2211 rval = ha->isp_ops->pci_config(vha);
2212 if (rval) {
2213 ql_log(ql_log_warn, vha, 0x0044,
2214 "Unable to configure PCI space.\n");
2215 return (rval);
2216 }
2217
2218 ha->isp_ops->reset_chip(vha);
2219
2220 /* Check for secure flash support */
2221 if (IS_QLA28XX(ha)) {
2222 if (RD_REG_DWORD(&reg->mailbox12) & BIT_0) {
2223 ql_log(ql_log_info, vha, 0xffff, "Adapter is Secure\n");
2224 ha->flags.secure_adapter = 1;
2225 }
2226 }
2227
2228
2229 rval = qla2xxx_get_flash_info(vha);
2230 if (rval) {
2231 ql_log(ql_log_fatal, vha, 0x004f,
2232 "Unable to validate FLASH data.\n");
2233 return rval;
2234 }
2235
2236 if (IS_QLA8044(ha)) {
2237 qla8044_read_reset_template(vha);
2238
2239 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2240 * If DONRESET_BIT0 is set, drivers should not set dev_state
2241 * to NEED_RESET. But if NEED_RESET is set, drivers should
2242 * should honor the reset. */
2243 if (ql2xdontresethba == 1)
2244 qla8044_set_idc_dontreset(vha);
2245 }
2246
2247 ha->isp_ops->get_flash_version(vha, req->ring);
2248 ql_dbg(ql_dbg_init, vha, 0x0061,
2249 "Configure NVRAM parameters...\n");
2250
2251 /* Let priority default to FCP, can be overridden by nvram_config */
2252 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2253
2254 ha->isp_ops->nvram_config(vha);
2255
2256 if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2257 ha->fc4_type_priority != FC4_PRIORITY_NVME)
2258 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2259
2260 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
2261 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2262
2263 if (ha->flags.disable_serdes) {
2264 /* Mask HBA via NVRAM settings? */
2265 ql_log(ql_log_info, vha, 0x0077,
2266 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2267 return QLA_FUNCTION_FAILED;
2268 }
2269
2270 ql_dbg(ql_dbg_init, vha, 0x0078,
2271 "Verifying loaded RISC code...\n");
2272
2273 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2274 rval = ha->isp_ops->chip_diag(vha);
2275 if (rval)
2276 return (rval);
2277 rval = qla2x00_setup_chip(vha);
2278 if (rval)
2279 return (rval);
2280 }
2281
2282 if (IS_QLA84XX(ha)) {
2283 ha->cs84xx = qla84xx_get_chip(vha);
2284 if (!ha->cs84xx) {
2285 ql_log(ql_log_warn, vha, 0x00d0,
2286 "Unable to configure ISP84XX.\n");
2287 return QLA_FUNCTION_FAILED;
2288 }
2289 }
2290
2291 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2292 rval = qla2x00_init_rings(vha);
2293
2294 /* No point in continuing if firmware initialization failed. */
2295 if (rval != QLA_SUCCESS)
2296 return rval;
2297
2298 ha->flags.chip_reset_done = 1;
2299
2300 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2301 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2302 rval = qla84xx_init_chip(vha);
2303 if (rval != QLA_SUCCESS) {
2304 ql_log(ql_log_warn, vha, 0x00d4,
2305 "Unable to initialize ISP84XX.\n");
2306 qla84xx_put_chip(vha);
2307 }
2308 }
2309
2310 /* Load the NIC Core f/w if we are the first protocol driver. */
2311 if (IS_QLA8031(ha)) {
2312 rval = qla83xx_nic_core_fw_load(vha);
2313 if (rval)
2314 ql_log(ql_log_warn, vha, 0x0124,
2315 "Error in initializing NIC Core f/w.\n");
2316 }
2317
2318 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2319 qla24xx_read_fcp_prio_cfg(vha);
2320
2321 if (IS_P3P_TYPE(ha))
2322 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2323 else
2324 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2325
2326 return (rval);
2327 }
2328
2329 /**
2330 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2331 * @vha: HA context
2332 *
2333 * Returns 0 on success.
2334 */
2335 int
2336 qla2100_pci_config(scsi_qla_host_t *vha)
2337 {
2338 uint16_t w;
2339 unsigned long flags;
2340 struct qla_hw_data *ha = vha->hw;
2341 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2342
2343 pci_set_master(ha->pdev);
2344 pci_try_set_mwi(ha->pdev);
2345
2346 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2347 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2348 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2349
2350 pci_disable_rom(ha->pdev);
2351
2352 /* Get PCI bus information. */
2353 spin_lock_irqsave(&ha->hardware_lock, flags);
2354 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2355 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2356
2357 return QLA_SUCCESS;
2358 }
2359
2360 /**
2361 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2362 * @vha: HA context
2363 *
2364 * Returns 0 on success.
2365 */
2366 int
2367 qla2300_pci_config(scsi_qla_host_t *vha)
2368 {
2369 uint16_t w;
2370 unsigned long flags = 0;
2371 uint32_t cnt;
2372 struct qla_hw_data *ha = vha->hw;
2373 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2374
2375 pci_set_master(ha->pdev);
2376 pci_try_set_mwi(ha->pdev);
2377
2378 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2379 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2380
2381 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2382 w &= ~PCI_COMMAND_INTX_DISABLE;
2383 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2384
2385 /*
2386 * If this is a 2300 card and not 2312, reset the
2387 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2388 * the 2310 also reports itself as a 2300 so we need to get the
2389 * fb revision level -- a 6 indicates it really is a 2300 and
2390 * not a 2310.
2391 */
2392 if (IS_QLA2300(ha)) {
2393 spin_lock_irqsave(&ha->hardware_lock, flags);
2394
2395 /* Pause RISC. */
2396 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2397 for (cnt = 0; cnt < 30000; cnt++) {
2398 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
2399 break;
2400
2401 udelay(10);
2402 }
2403
2404 /* Select FPM registers. */
2405 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2406 RD_REG_WORD(&reg->ctrl_status);
2407
2408 /* Get the fb rev level */
2409 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2410
2411 if (ha->fb_rev == FPM_2300)
2412 pci_clear_mwi(ha->pdev);
2413
2414 /* Deselect FPM registers. */
2415 WRT_REG_WORD(&reg->ctrl_status, 0x0);
2416 RD_REG_WORD(&reg->ctrl_status);
2417
2418 /* Release RISC module. */
2419 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2420 for (cnt = 0; cnt < 30000; cnt++) {
2421 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
2422 break;
2423
2424 udelay(10);
2425 }
2426
2427 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2428 }
2429
2430 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2431
2432 pci_disable_rom(ha->pdev);
2433
2434 /* Get PCI bus information. */
2435 spin_lock_irqsave(&ha->hardware_lock, flags);
2436 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2437 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2438
2439 return QLA_SUCCESS;
2440 }
2441
2442 /**
2443 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2444 * @vha: HA context
2445 *
2446 * Returns 0 on success.
2447 */
2448 int
2449 qla24xx_pci_config(scsi_qla_host_t *vha)
2450 {
2451 uint16_t w;
2452 unsigned long flags = 0;
2453 struct qla_hw_data *ha = vha->hw;
2454 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2455
2456 pci_set_master(ha->pdev);
2457 pci_try_set_mwi(ha->pdev);
2458
2459 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2460 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2461 w &= ~PCI_COMMAND_INTX_DISABLE;
2462 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2463
2464 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2465
2466 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2467 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2468 pcix_set_mmrbc(ha->pdev, 2048);
2469
2470 /* PCIe -- adjust Maximum Read Request Size (2048). */
2471 if (pci_is_pcie(ha->pdev))
2472 pcie_set_readrq(ha->pdev, 4096);
2473
2474 pci_disable_rom(ha->pdev);
2475
2476 ha->chip_revision = ha->pdev->revision;
2477
2478 /* Get PCI bus information. */
2479 spin_lock_irqsave(&ha->hardware_lock, flags);
2480 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
2481 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2482
2483 return QLA_SUCCESS;
2484 }
2485
2486 /**
2487 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2488 * @vha: HA context
2489 *
2490 * Returns 0 on success.
2491 */
2492 int
2493 qla25xx_pci_config(scsi_qla_host_t *vha)
2494 {
2495 uint16_t w;
2496 struct qla_hw_data *ha = vha->hw;
2497
2498 pci_set_master(ha->pdev);
2499 pci_try_set_mwi(ha->pdev);
2500
2501 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2502 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2503 w &= ~PCI_COMMAND_INTX_DISABLE;
2504 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2505
2506 /* PCIe -- adjust Maximum Read Request Size (2048). */
2507 if (pci_is_pcie(ha->pdev))
2508 pcie_set_readrq(ha->pdev, 4096);
2509
2510 pci_disable_rom(ha->pdev);
2511
2512 ha->chip_revision = ha->pdev->revision;
2513
2514 return QLA_SUCCESS;
2515 }
2516
2517 /**
2518 * qla2x00_isp_firmware() - Choose firmware image.
2519 * @vha: HA context
2520 *
2521 * Returns 0 on success.
2522 */
2523 static int
2524 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2525 {
2526 int rval;
2527 uint16_t loop_id, topo, sw_cap;
2528 uint8_t domain, area, al_pa;
2529 struct qla_hw_data *ha = vha->hw;
2530
2531 /* Assume loading risc code */
2532 rval = QLA_FUNCTION_FAILED;
2533
2534 if (ha->flags.disable_risc_code_load) {
2535 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2536
2537 /* Verify checksum of loaded RISC code. */
2538 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2539 if (rval == QLA_SUCCESS) {
2540 /* And, verify we are not in ROM code. */
2541 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2542 &area, &domain, &topo, &sw_cap);
2543 }
2544 }
2545
2546 if (rval)
2547 ql_dbg(ql_dbg_init, vha, 0x007a,
2548 "**** Load RISC code ****.\n");
2549
2550 return (rval);
2551 }
2552
2553 /**
2554 * qla2x00_reset_chip() - Reset ISP chip.
2555 * @vha: HA context
2556 *
2557 * Returns 0 on success.
2558 */
2559 int
2560 qla2x00_reset_chip(scsi_qla_host_t *vha)
2561 {
2562 unsigned long flags = 0;
2563 struct qla_hw_data *ha = vha->hw;
2564 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2565 uint32_t cnt;
2566 uint16_t cmd;
2567 int rval = QLA_FUNCTION_FAILED;
2568
2569 if (unlikely(pci_channel_offline(ha->pdev)))
2570 return rval;
2571
2572 ha->isp_ops->disable_intrs(ha);
2573
2574 spin_lock_irqsave(&ha->hardware_lock, flags);
2575
2576 /* Turn off master enable */
2577 cmd = 0;
2578 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2579 cmd &= ~PCI_COMMAND_MASTER;
2580 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2581
2582 if (!IS_QLA2100(ha)) {
2583 /* Pause RISC. */
2584 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2585 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2586 for (cnt = 0; cnt < 30000; cnt++) {
2587 if ((RD_REG_WORD(&reg->hccr) &
2588 HCCR_RISC_PAUSE) != 0)
2589 break;
2590 udelay(100);
2591 }
2592 } else {
2593 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2594 udelay(10);
2595 }
2596
2597 /* Select FPM registers. */
2598 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2599 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2600
2601 /* FPM Soft Reset. */
2602 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2603 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2604
2605 /* Toggle Fpm Reset. */
2606 if (!IS_QLA2200(ha)) {
2607 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2608 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2609 }
2610
2611 /* Select frame buffer registers. */
2612 WRT_REG_WORD(&reg->ctrl_status, 0x10);
2613 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2614
2615 /* Reset frame buffer FIFOs. */
2616 if (IS_QLA2200(ha)) {
2617 WRT_FB_CMD_REG(ha, reg, 0xa000);
2618 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2619 } else {
2620 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2621
2622 /* Read back fb_cmd until zero or 3 seconds max */
2623 for (cnt = 0; cnt < 3000; cnt++) {
2624 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2625 break;
2626 udelay(100);
2627 }
2628 }
2629
2630 /* Select RISC module registers. */
2631 WRT_REG_WORD(&reg->ctrl_status, 0);
2632 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2633
2634 /* Reset RISC processor. */
2635 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2636 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2637
2638 /* Release RISC processor. */
2639 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2640 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2641 }
2642
2643 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2644 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
2645
2646 /* Reset ISP chip. */
2647 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2648
2649 /* Wait for RISC to recover from reset. */
2650 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2651 /*
2652 * It is necessary to for a delay here since the card doesn't
2653 * respond to PCI reads during a reset. On some architectures
2654 * this will result in an MCA.
2655 */
2656 udelay(20);
2657 for (cnt = 30000; cnt; cnt--) {
2658 if ((RD_REG_WORD(&reg->ctrl_status) &
2659 CSR_ISP_SOFT_RESET) == 0)
2660 break;
2661 udelay(100);
2662 }
2663 } else
2664 udelay(10);
2665
2666 /* Reset RISC processor. */
2667 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2668
2669 WRT_REG_WORD(&reg->semaphore, 0);
2670
2671 /* Release RISC processor. */
2672 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2673 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2674
2675 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2676 for (cnt = 0; cnt < 30000; cnt++) {
2677 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2678 break;
2679
2680 udelay(100);
2681 }
2682 } else
2683 udelay(100);
2684
2685 /* Turn on master enable */
2686 cmd |= PCI_COMMAND_MASTER;
2687 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2688
2689 /* Disable RISC pause on FPM parity error. */
2690 if (!IS_QLA2100(ha)) {
2691 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2692 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2693 }
2694
2695 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2696
2697 return QLA_SUCCESS;
2698 }
2699
2700 /**
2701 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2702 * @vha: HA context
2703 *
2704 * Returns 0 on success.
2705 */
2706 static int
2707 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2708 {
2709 uint16_t mb[4] = {0x1010, 0, 1, 0};
2710
2711 if (!IS_QLA81XX(vha->hw))
2712 return QLA_SUCCESS;
2713
2714 return qla81xx_write_mpi_register(vha, mb);
2715 }
2716
2717 /**
2718 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2719 * @vha: HA context
2720 *
2721 * Returns 0 on success.
2722 */
2723 static inline int
2724 qla24xx_reset_risc(scsi_qla_host_t *vha)
2725 {
2726 unsigned long flags = 0;
2727 struct qla_hw_data *ha = vha->hw;
2728 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2729 uint32_t cnt;
2730 uint16_t wd;
2731 static int abts_cnt; /* ISP abort retry counts */
2732 int rval = QLA_SUCCESS;
2733
2734 spin_lock_irqsave(&ha->hardware_lock, flags);
2735
2736 /* Reset RISC. */
2737 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2738 for (cnt = 0; cnt < 30000; cnt++) {
2739 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2740 break;
2741
2742 udelay(10);
2743 }
2744
2745 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2746 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2747
2748 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2749 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2750 RD_REG_DWORD(&reg->hccr),
2751 RD_REG_DWORD(&reg->ctrl_status),
2752 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2753
2754 WRT_REG_DWORD(&reg->ctrl_status,
2755 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2756 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2757
2758 udelay(100);
2759
2760 /* Wait for firmware to complete NVRAM accesses. */
2761 RD_REG_WORD(&reg->mailbox0);
2762 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2763 rval == QLA_SUCCESS; cnt--) {
2764 barrier();
2765 if (cnt)
2766 udelay(5);
2767 else
2768 rval = QLA_FUNCTION_TIMEOUT;
2769 }
2770
2771 if (rval == QLA_SUCCESS)
2772 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2773
2774 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2775 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2776 RD_REG_DWORD(&reg->hccr),
2777 RD_REG_DWORD(&reg->mailbox0));
2778
2779 /* Wait for soft-reset to complete. */
2780 RD_REG_DWORD(&reg->ctrl_status);
2781 for (cnt = 0; cnt < 60; cnt++) {
2782 barrier();
2783 if ((RD_REG_DWORD(&reg->ctrl_status) &
2784 CSRX_ISP_SOFT_RESET) == 0)
2785 break;
2786
2787 udelay(5);
2788 }
2789 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2790 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2791
2792 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2793 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2794 RD_REG_DWORD(&reg->hccr),
2795 RD_REG_DWORD(&reg->ctrl_status));
2796
2797 /* If required, do an MPI FW reset now */
2798 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2799 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2800 if (++abts_cnt < 5) {
2801 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2802 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2803 } else {
2804 /*
2805 * We exhausted the ISP abort retries. We have to
2806 * set the board offline.
2807 */
2808 abts_cnt = 0;
2809 vha->flags.online = 0;
2810 }
2811 }
2812 }
2813
2814 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2815 RD_REG_DWORD(&reg->hccr);
2816
2817 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2818 RD_REG_DWORD(&reg->hccr);
2819
2820 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2821 RD_REG_DWORD(&reg->hccr);
2822
2823 RD_REG_WORD(&reg->mailbox0);
2824 for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
2825 rval == QLA_SUCCESS; cnt--) {
2826 barrier();
2827 if (cnt)
2828 udelay(5);
2829 else
2830 rval = QLA_FUNCTION_TIMEOUT;
2831 }
2832 if (rval == QLA_SUCCESS)
2833 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2834
2835 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2836 "Host Risc 0x%x, mailbox0 0x%x\n",
2837 RD_REG_DWORD(&reg->hccr),
2838 RD_REG_WORD(&reg->mailbox0));
2839
2840 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2841
2842 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2843 "Driver in %s mode\n",
2844 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2845
2846 if (IS_NOPOLLING_TYPE(ha))
2847 ha->isp_ops->enable_intrs(ha);
2848
2849 return rval;
2850 }
2851
2852 static void
2853 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2854 {
2855 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2856
2857 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2858 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2859
2860 }
2861
2862 static void
2863 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2864 {
2865 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2866
2867 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2868 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2869 }
2870
2871 static void
2872 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2873 {
2874 uint32_t wd32 = 0;
2875 uint delta_msec = 100;
2876 uint elapsed_msec = 0;
2877 uint timeout_msec;
2878 ulong n;
2879
2880 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2881 vha->hw->pdev->subsystem_device != 0x0240)
2882 return;
2883
2884 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2885 udelay(100);
2886
2887 attempt:
2888 timeout_msec = TIMEOUT_SEMAPHORE;
2889 n = timeout_msec / delta_msec;
2890 while (n--) {
2891 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2892 qla25xx_read_risc_sema_reg(vha, &wd32);
2893 if (wd32 & RISC_SEMAPHORE)
2894 break;
2895 msleep(delta_msec);
2896 elapsed_msec += delta_msec;
2897 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2898 goto force;
2899 }
2900
2901 if (!(wd32 & RISC_SEMAPHORE))
2902 goto force;
2903
2904 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2905 goto acquired;
2906
2907 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2908 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2909 n = timeout_msec / delta_msec;
2910 while (n--) {
2911 qla25xx_read_risc_sema_reg(vha, &wd32);
2912 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2913 break;
2914 msleep(delta_msec);
2915 elapsed_msec += delta_msec;
2916 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2917 goto force;
2918 }
2919
2920 if (wd32 & RISC_SEMAPHORE_FORCE)
2921 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2922
2923 goto attempt;
2924
2925 force:
2926 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2927
2928 acquired:
2929 return;
2930 }
2931
2932 /**
2933 * qla24xx_reset_chip() - Reset ISP24xx chip.
2934 * @vha: HA context
2935 *
2936 * Returns 0 on success.
2937 */
2938 int
2939 qla24xx_reset_chip(scsi_qla_host_t *vha)
2940 {
2941 struct qla_hw_data *ha = vha->hw;
2942 int rval = QLA_FUNCTION_FAILED;
2943
2944 if (pci_channel_offline(ha->pdev) &&
2945 ha->flags.pci_channel_io_perm_failure) {
2946 return rval;
2947 }
2948
2949 ha->isp_ops->disable_intrs(ha);
2950
2951 qla25xx_manipulate_risc_semaphore(vha);
2952
2953 /* Perform RISC reset. */
2954 rval = qla24xx_reset_risc(vha);
2955
2956 return rval;
2957 }
2958
2959 /**
2960 * qla2x00_chip_diag() - Test chip for proper operation.
2961 * @vha: HA context
2962 *
2963 * Returns 0 on success.
2964 */
2965 int
2966 qla2x00_chip_diag(scsi_qla_host_t *vha)
2967 {
2968 int rval;
2969 struct qla_hw_data *ha = vha->hw;
2970 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2971 unsigned long flags = 0;
2972 uint16_t data;
2973 uint32_t cnt;
2974 uint16_t mb[5];
2975 struct req_que *req = ha->req_q_map[0];
2976
2977 /* Assume a failed state */
2978 rval = QLA_FUNCTION_FAILED;
2979
2980 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2981 &reg->flash_address);
2982
2983 spin_lock_irqsave(&ha->hardware_lock, flags);
2984
2985 /* Reset ISP chip. */
2986 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2987
2988 /*
2989 * We need to have a delay here since the card will not respond while
2990 * in reset causing an MCA on some architectures.
2991 */
2992 udelay(20);
2993 data = qla2x00_debounce_register(&reg->ctrl_status);
2994 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2995 udelay(5);
2996 data = RD_REG_WORD(&reg->ctrl_status);
2997 barrier();
2998 }
2999
3000 if (!cnt)
3001 goto chip_diag_failed;
3002
3003 ql_dbg(ql_dbg_init, vha, 0x007c,
3004 "Reset register cleared by chip reset.\n");
3005
3006 /* Reset RISC processor. */
3007 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
3008 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
3009
3010 /* Workaround for QLA2312 PCI parity error */
3011 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3012 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3013 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3014 udelay(5);
3015 data = RD_MAILBOX_REG(ha, reg, 0);
3016 barrier();
3017 }
3018 } else
3019 udelay(10);
3020
3021 if (!cnt)
3022 goto chip_diag_failed;
3023
3024 /* Check product ID of chip */
3025 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
3026
3027 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3028 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3029 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3030 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3031 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3032 mb[3] != PROD_ID_3) {
3033 ql_log(ql_log_warn, vha, 0x0062,
3034 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3035 mb[1], mb[2], mb[3]);
3036
3037 goto chip_diag_failed;
3038 }
3039 ha->product_id[0] = mb[1];
3040 ha->product_id[1] = mb[2];
3041 ha->product_id[2] = mb[3];
3042 ha->product_id[3] = mb[4];
3043
3044 /* Adjust fw RISC transfer size */
3045 if (req->length > 1024)
3046 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3047 else
3048 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3049 req->length;
3050
3051 if (IS_QLA2200(ha) &&
3052 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3053 /* Limit firmware transfer size with a 2200A */
3054 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3055
3056 ha->device_type |= DT_ISP2200A;
3057 ha->fw_transfer_size = 128;
3058 }
3059
3060 /* Wrap Incoming Mailboxes Test. */
3061 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3062
3063 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3064 rval = qla2x00_mbx_reg_test(vha);
3065 if (rval)
3066 ql_log(ql_log_warn, vha, 0x0080,
3067 "Failed mailbox send register test.\n");
3068 else
3069 /* Flag a successful rval */
3070 rval = QLA_SUCCESS;
3071 spin_lock_irqsave(&ha->hardware_lock, flags);
3072
3073 chip_diag_failed:
3074 if (rval)
3075 ql_log(ql_log_info, vha, 0x0081,
3076 "Chip diagnostics **** FAILED ****.\n");
3077
3078 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3079
3080 return (rval);
3081 }
3082
3083 /**
3084 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3085 * @vha: HA context
3086 *
3087 * Returns 0 on success.
3088 */
3089 int
3090 qla24xx_chip_diag(scsi_qla_host_t *vha)
3091 {
3092 int rval;
3093 struct qla_hw_data *ha = vha->hw;
3094 struct req_que *req = ha->req_q_map[0];
3095
3096 if (IS_P3P_TYPE(ha))
3097 return QLA_SUCCESS;
3098
3099 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3100
3101 rval = qla2x00_mbx_reg_test(vha);
3102 if (rval) {
3103 ql_log(ql_log_warn, vha, 0x0082,
3104 "Failed mailbox send register test.\n");
3105 } else {
3106 /* Flag a successful rval */
3107 rval = QLA_SUCCESS;
3108 }
3109
3110 return rval;
3111 }
3112
3113 static void
3114 qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3115 {
3116 int rval;
3117 dma_addr_t tc_dma;
3118 void *tc;
3119 struct qla_hw_data *ha = vha->hw;
3120
3121 if (!IS_FWI2_CAPABLE(ha))
3122 return;
3123
3124 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3125 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3126 return;
3127
3128 if (ha->fce) {
3129 ql_dbg(ql_dbg_init, vha, 0x00bd,
3130 "%s: FCE Mem is already allocated.\n",
3131 __func__);
3132 return;
3133 }
3134
3135 /* Allocate memory for Fibre Channel Event Buffer. */
3136 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3137 GFP_KERNEL);
3138 if (!tc) {
3139 ql_log(ql_log_warn, vha, 0x00be,
3140 "Unable to allocate (%d KB) for FCE.\n",
3141 FCE_SIZE / 1024);
3142 return;
3143 }
3144
3145 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3146 ha->fce_mb, &ha->fce_bufs);
3147 if (rval) {
3148 ql_log(ql_log_warn, vha, 0x00bf,
3149 "Unable to initialize FCE (%d).\n", rval);
3150 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
3151 return;
3152 }
3153
3154 ql_dbg(ql_dbg_init, vha, 0x00c0,
3155 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3156
3157 ha->flags.fce_enabled = 1;
3158 ha->fce_dma = tc_dma;
3159 ha->fce = tc;
3160 }
3161
3162 static void
3163 qla2x00_init_eft_trace(scsi_qla_host_t *vha)
3164 {
3165 int rval;
3166 dma_addr_t tc_dma;
3167 void *tc;
3168 struct qla_hw_data *ha = vha->hw;
3169
3170 if (!IS_FWI2_CAPABLE(ha))
3171 return;
3172
3173 if (ha->eft) {
3174 ql_dbg(ql_dbg_init, vha, 0x00bd,
3175 "%s: EFT Mem is already allocated.\n",
3176 __func__);
3177 return;
3178 }
3179
3180 /* Allocate memory for Extended Trace Buffer. */
3181 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3182 GFP_KERNEL);
3183 if (!tc) {
3184 ql_log(ql_log_warn, vha, 0x00c1,
3185 "Unable to allocate (%d KB) for EFT.\n",
3186 EFT_SIZE / 1024);
3187 return;
3188 }
3189
3190 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3191 if (rval) {
3192 ql_log(ql_log_warn, vha, 0x00c2,
3193 "Unable to initialize EFT (%d).\n", rval);
3194 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
3195 return;
3196 }
3197
3198 ql_dbg(ql_dbg_init, vha, 0x00c3,
3199 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3200
3201 ha->eft_dma = tc_dma;
3202 ha->eft = tc;
3203 }
3204
3205 static void
3206 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3207 {
3208 qla2x00_init_fce_trace(vha);
3209 qla2x00_init_eft_trace(vha);
3210 }
3211
3212 void
3213 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3214 {
3215 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3216 eft_size, fce_size, mq_size;
3217 struct qla_hw_data *ha = vha->hw;
3218 struct req_que *req = ha->req_q_map[0];
3219 struct rsp_que *rsp = ha->rsp_q_map[0];
3220 struct qla2xxx_fw_dump *fw_dump;
3221
3222 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3223 req_q_size = rsp_q_size = 0;
3224
3225 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3226 fixed_size = sizeof(struct qla2100_fw_dump);
3227 } else if (IS_QLA23XX(ha)) {
3228 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3229 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3230 sizeof(uint16_t);
3231 } else if (IS_FWI2_CAPABLE(ha)) {
3232 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
3233 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3234 else if (IS_QLA81XX(ha))
3235 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3236 else if (IS_QLA25XX(ha))
3237 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3238 else
3239 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3240
3241 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3242 sizeof(uint32_t);
3243 if (ha->mqenable) {
3244 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) &&
3245 !IS_QLA28XX(ha))
3246 mq_size = sizeof(struct qla2xxx_mq_chain);
3247 /*
3248 * Allocate maximum buffer size for all queues - Q0.
3249 * Resizing must be done at end-of-dump processing.
3250 */
3251 mq_size += (ha->max_req_queues - 1) *
3252 (req->length * sizeof(request_t));
3253 mq_size += (ha->max_rsp_queues - 1) *
3254 (rsp->length * sizeof(response_t));
3255 }
3256 if (ha->tgt.atio_ring)
3257 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3258
3259 qla2x00_init_fce_trace(vha);
3260 if (ha->fce)
3261 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3262 qla2x00_init_eft_trace(vha);
3263 if (ha->eft)
3264 eft_size = EFT_SIZE;
3265 }
3266
3267 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3268 struct fwdt *fwdt = ha->fwdt;
3269 uint j;
3270
3271 for (j = 0; j < 2; j++, fwdt++) {
3272 if (!fwdt->template) {
3273 ql_dbg(ql_dbg_init, vha, 0x00ba,
3274 "-> fwdt%u no template\n", j);
3275 continue;
3276 }
3277 ql_dbg(ql_dbg_init, vha, 0x00fa,
3278 "-> fwdt%u calculating fwdump size...\n", j);
3279 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3280 vha, fwdt->template);
3281 ql_dbg(ql_dbg_init, vha, 0x00fa,
3282 "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3283 j, fwdt->dump_size);
3284 dump_size += fwdt->dump_size;
3285 }
3286 } else {
3287 req_q_size = req->length * sizeof(request_t);
3288 rsp_q_size = rsp->length * sizeof(response_t);
3289 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3290 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3291 + eft_size;
3292 ha->chain_offset = dump_size;
3293 dump_size += mq_size + fce_size;
3294 if (ha->exchoffld_buf)
3295 dump_size += sizeof(struct qla2xxx_offld_chain) +
3296 ha->exchoffld_size;
3297 if (ha->exlogin_buf)
3298 dump_size += sizeof(struct qla2xxx_offld_chain) +
3299 ha->exlogin_size;
3300 }
3301
3302 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3303
3304 ql_dbg(ql_dbg_init, vha, 0x00c5,
3305 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3306 __func__, dump_size, ha->fw_dump_len,
3307 ha->fw_dump_alloc_len);
3308
3309 fw_dump = vmalloc(dump_size);
3310 if (!fw_dump) {
3311 ql_log(ql_log_warn, vha, 0x00c4,
3312 "Unable to allocate (%d KB) for firmware dump.\n",
3313 dump_size / 1024);
3314 } else {
3315 mutex_lock(&ha->optrom_mutex);
3316 if (ha->fw_dumped) {
3317 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3318 vfree(ha->fw_dump);
3319 ha->fw_dump = fw_dump;
3320 ha->fw_dump_alloc_len = dump_size;
3321 ql_dbg(ql_dbg_init, vha, 0x00c5,
3322 "Re-Allocated (%d KB) and save firmware dump.\n",
3323 dump_size / 1024);
3324 } else {
3325 if (ha->fw_dump)
3326 vfree(ha->fw_dump);
3327 ha->fw_dump = fw_dump;
3328
3329 ha->fw_dump_len = ha->fw_dump_alloc_len =
3330 dump_size;
3331 ql_dbg(ql_dbg_init, vha, 0x00c5,
3332 "Allocated (%d KB) for firmware dump.\n",
3333 dump_size / 1024);
3334
3335 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3336 mutex_unlock(&ha->optrom_mutex);
3337 return;
3338 }
3339
3340 ha->fw_dump->signature[0] = 'Q';
3341 ha->fw_dump->signature[1] = 'L';
3342 ha->fw_dump->signature[2] = 'G';
3343 ha->fw_dump->signature[3] = 'C';
3344 ha->fw_dump->version = htonl(1);
3345
3346 ha->fw_dump->fixed_size = htonl(fixed_size);
3347 ha->fw_dump->mem_size = htonl(mem_size);
3348 ha->fw_dump->req_q_size = htonl(req_q_size);
3349 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3350
3351 ha->fw_dump->eft_size = htonl(eft_size);
3352 ha->fw_dump->eft_addr_l =
3353 htonl(LSD(ha->eft_dma));
3354 ha->fw_dump->eft_addr_h =
3355 htonl(MSD(ha->eft_dma));
3356
3357 ha->fw_dump->header_size =
3358 htonl(offsetof
3359 (struct qla2xxx_fw_dump, isp));
3360 }
3361 mutex_unlock(&ha->optrom_mutex);
3362 }
3363 }
3364 }
3365
3366 static int
3367 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3368 {
3369 #define MPS_MASK 0xe0
3370 int rval;
3371 uint16_t dc;
3372 uint32_t dw;
3373
3374 if (!IS_QLA81XX(vha->hw))
3375 return QLA_SUCCESS;
3376
3377 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3378 if (rval != QLA_SUCCESS) {
3379 ql_log(ql_log_warn, vha, 0x0105,
3380 "Unable to acquire semaphore.\n");
3381 goto done;
3382 }
3383
3384 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3385 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3386 if (rval != QLA_SUCCESS) {
3387 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3388 goto done_release;
3389 }
3390
3391 dc &= MPS_MASK;
3392 if (dc == (dw & MPS_MASK))
3393 goto done_release;
3394
3395 dw &= ~MPS_MASK;
3396 dw |= dc;
3397 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3398 if (rval != QLA_SUCCESS) {
3399 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3400 }
3401
3402 done_release:
3403 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3404 if (rval != QLA_SUCCESS) {
3405 ql_log(ql_log_warn, vha, 0x006d,
3406 "Unable to release semaphore.\n");
3407 }
3408
3409 done:
3410 return rval;
3411 }
3412
3413 int
3414 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3415 {
3416 /* Don't try to reallocate the array */
3417 if (req->outstanding_cmds)
3418 return QLA_SUCCESS;
3419
3420 if (!IS_FWI2_CAPABLE(ha))
3421 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3422 else {
3423 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3424 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3425 else
3426 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3427 }
3428
3429 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3430 sizeof(srb_t *),
3431 GFP_KERNEL);
3432
3433 if (!req->outstanding_cmds) {
3434 /*
3435 * Try to allocate a minimal size just so we can get through
3436 * initialization.
3437 */
3438 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3439 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3440 sizeof(srb_t *),
3441 GFP_KERNEL);
3442
3443 if (!req->outstanding_cmds) {
3444 ql_log(ql_log_fatal, NULL, 0x0126,
3445 "Failed to allocate memory for "
3446 "outstanding_cmds for req_que %p.\n", req);
3447 req->num_outstanding_cmds = 0;
3448 return QLA_FUNCTION_FAILED;
3449 }
3450 }
3451
3452 return QLA_SUCCESS;
3453 }
3454
3455 #define PRINT_FIELD(_field, _flag, _str) { \
3456 if (a0->_field & _flag) {\
3457 if (p) {\
3458 strcat(ptr, "|");\
3459 ptr++;\
3460 leftover--;\
3461 } \
3462 len = snprintf(ptr, leftover, "%s", _str); \
3463 p = 1;\
3464 leftover -= len;\
3465 ptr += len; \
3466 } \
3467 }
3468
3469 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3470 {
3471 #define STR_LEN 64
3472 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3473 u8 str[STR_LEN], *ptr, p;
3474 int leftover, len;
3475
3476 memset(str, 0, STR_LEN);
3477 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3478 ql_dbg(ql_dbg_init, vha, 0x015a,
3479 "SFP MFG Name: %s\n", str);
3480
3481 memset(str, 0, STR_LEN);
3482 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3483 ql_dbg(ql_dbg_init, vha, 0x015c,
3484 "SFP Part Name: %s\n", str);
3485
3486 /* media */
3487 memset(str, 0, STR_LEN);
3488 ptr = str;
3489 leftover = STR_LEN;
3490 p = len = 0;
3491 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3492 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3493 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3494 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3495 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3496 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3497 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3498 ql_dbg(ql_dbg_init, vha, 0x0160,
3499 "SFP Media: %s\n", str);
3500
3501 /* link length */
3502 memset(str, 0, STR_LEN);
3503 ptr = str;
3504 leftover = STR_LEN;
3505 p = len = 0;
3506 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3507 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3508 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3509 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3510 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3511 ql_dbg(ql_dbg_init, vha, 0x0196,
3512 "SFP Link Length: %s\n", str);
3513
3514 memset(str, 0, STR_LEN);
3515 ptr = str;
3516 leftover = STR_LEN;
3517 p = len = 0;
3518 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3519 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3520 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3521 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3522 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3523 ql_dbg(ql_dbg_init, vha, 0x016e,
3524 "SFP FC Link Tech: %s\n", str);
3525
3526 if (a0->length_km)
3527 ql_dbg(ql_dbg_init, vha, 0x016f,
3528 "SFP Distant: %d km\n", a0->length_km);
3529 if (a0->length_100m)
3530 ql_dbg(ql_dbg_init, vha, 0x0170,
3531 "SFP Distant: %d m\n", a0->length_100m*100);
3532 if (a0->length_50um_10m)
3533 ql_dbg(ql_dbg_init, vha, 0x0189,
3534 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3535 if (a0->length_62um_10m)
3536 ql_dbg(ql_dbg_init, vha, 0x018a,
3537 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3538 if (a0->length_om4_10m)
3539 ql_dbg(ql_dbg_init, vha, 0x0194,
3540 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3541 if (a0->length_om3_10m)
3542 ql_dbg(ql_dbg_init, vha, 0x0195,
3543 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3544 }
3545
3546
3547 /*
3548 * Return Code:
3549 * QLA_SUCCESS: no action
3550 * QLA_INTERFACE_ERROR: SFP is not there.
3551 * QLA_FUNCTION_FAILED: detected New SFP
3552 */
3553 int
3554 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3555 {
3556 int rc = QLA_SUCCESS;
3557 struct sff_8247_a0 *a;
3558 struct qla_hw_data *ha = vha->hw;
3559
3560 if (!AUTO_DETECT_SFP_SUPPORT(vha))
3561 goto out;
3562
3563 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3564 if (rc)
3565 goto out;
3566
3567 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3568 qla2xxx_print_sfp_info(vha);
3569
3570 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3571 /* long range */
3572 ha->flags.detected_lr_sfp = 1;
3573
3574 if (a->length_km > 5 || a->length_100m > 50)
3575 ha->long_range_distance = LR_DISTANCE_10K;
3576 else
3577 ha->long_range_distance = LR_DISTANCE_5K;
3578
3579 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3580 ql_dbg(ql_dbg_async, vha, 0x507b,
3581 "Detected Long Range SFP.\n");
3582 } else {
3583 /* short range */
3584 ha->flags.detected_lr_sfp = 0;
3585 if (ha->flags.using_lr_setting)
3586 ql_dbg(ql_dbg_async, vha, 0x5084,
3587 "Detected Short Range SFP.\n");
3588 }
3589
3590 if (!vha->flags.init_done)
3591 rc = QLA_SUCCESS;
3592 out:
3593 return rc;
3594 }
3595
3596 /**
3597 * qla2x00_setup_chip() - Load and start RISC firmware.
3598 * @vha: HA context
3599 *
3600 * Returns 0 on success.
3601 */
3602 static int
3603 qla2x00_setup_chip(scsi_qla_host_t *vha)
3604 {
3605 int rval;
3606 uint32_t srisc_address = 0;
3607 struct qla_hw_data *ha = vha->hw;
3608 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3609 unsigned long flags;
3610 uint16_t fw_major_version;
3611
3612 if (IS_P3P_TYPE(ha)) {
3613 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3614 if (rval == QLA_SUCCESS) {
3615 qla2x00_stop_firmware(vha);
3616 goto enable_82xx_npiv;
3617 } else
3618 goto failed;
3619 }
3620
3621 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3622 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3623 spin_lock_irqsave(&ha->hardware_lock, flags);
3624 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3625 RD_REG_WORD(&reg->hccr);
3626 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3627 }
3628
3629 qla81xx_mpi_sync(vha);
3630
3631 /* Load firmware sequences */
3632 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3633 if (rval == QLA_SUCCESS) {
3634 ql_dbg(ql_dbg_init, vha, 0x00c9,
3635 "Verifying Checksum of loaded RISC code.\n");
3636
3637 rval = qla2x00_verify_checksum(vha, srisc_address);
3638 if (rval == QLA_SUCCESS) {
3639 /* Start firmware execution. */
3640 ql_dbg(ql_dbg_init, vha, 0x00ca,
3641 "Starting firmware.\n");
3642
3643 if (ql2xexlogins)
3644 ha->flags.exlogins_enabled = 1;
3645
3646 if (qla_is_exch_offld_enabled(vha))
3647 ha->flags.exchoffld_enabled = 1;
3648
3649 rval = qla2x00_execute_fw(vha, srisc_address);
3650 /* Retrieve firmware information. */
3651 if (rval == QLA_SUCCESS) {
3652 qla24xx_detect_sfp(vha);
3653
3654 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3655 IS_QLA28XX(ha)) &&
3656 (ha->zio_mode == QLA_ZIO_MODE_6))
3657 qla27xx_set_zio_threshold(vha,
3658 ha->last_zio_threshold);
3659
3660 rval = qla2x00_set_exlogins_buffer(vha);
3661 if (rval != QLA_SUCCESS)
3662 goto failed;
3663
3664 rval = qla2x00_set_exchoffld_buffer(vha);
3665 if (rval != QLA_SUCCESS)
3666 goto failed;
3667
3668 enable_82xx_npiv:
3669 fw_major_version = ha->fw_major_version;
3670 if (IS_P3P_TYPE(ha))
3671 qla82xx_check_md_needed(vha);
3672 else
3673 rval = qla2x00_get_fw_version(vha);
3674 if (rval != QLA_SUCCESS)
3675 goto failed;
3676 ha->flags.npiv_supported = 0;
3677 if (IS_QLA2XXX_MIDTYPE(ha) &&
3678 (ha->fw_attributes & BIT_2)) {
3679 ha->flags.npiv_supported = 1;
3680 if ((!ha->max_npiv_vports) ||
3681 ((ha->max_npiv_vports + 1) %
3682 MIN_MULTI_ID_FABRIC))
3683 ha->max_npiv_vports =
3684 MIN_MULTI_ID_FABRIC - 1;
3685 }
3686 qla2x00_get_resource_cnts(vha);
3687
3688 /*
3689 * Allocate the array of outstanding commands
3690 * now that we know the firmware resources.
3691 */
3692 rval = qla2x00_alloc_outstanding_cmds(ha,
3693 vha->req);
3694 if (rval != QLA_SUCCESS)
3695 goto failed;
3696
3697 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3698 qla2x00_alloc_offload_mem(vha);
3699
3700 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3701 qla2x00_alloc_fw_dump(vha);
3702
3703 } else {
3704 goto failed;
3705 }
3706 } else {
3707 ql_log(ql_log_fatal, vha, 0x00cd,
3708 "ISP Firmware failed checksum.\n");
3709 goto failed;
3710 }
3711 } else
3712 goto failed;
3713
3714 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3715 /* Enable proper parity. */
3716 spin_lock_irqsave(&ha->hardware_lock, flags);
3717 if (IS_QLA2300(ha))
3718 /* SRAM parity */
3719 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3720 else
3721 /* SRAM, Instruction RAM and GP RAM parity */
3722 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3723 RD_REG_WORD(&reg->hccr);
3724 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3725 }
3726
3727 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
3728 ha->flags.fac_supported = 1;
3729 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3730 uint32_t size;
3731
3732 rval = qla81xx_fac_get_sector_size(vha, &size);
3733 if (rval == QLA_SUCCESS) {
3734 ha->flags.fac_supported = 1;
3735 ha->fdt_block_size = size << 2;
3736 } else {
3737 ql_log(ql_log_warn, vha, 0x00ce,
3738 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3739 ha->fw_major_version, ha->fw_minor_version,
3740 ha->fw_subminor_version);
3741
3742 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3743 IS_QLA28XX(ha)) {
3744 ha->flags.fac_supported = 0;
3745 rval = QLA_SUCCESS;
3746 }
3747 }
3748 }
3749 failed:
3750 if (rval) {
3751 ql_log(ql_log_fatal, vha, 0x00cf,
3752 "Setup chip ****FAILED****.\n");
3753 }
3754
3755 return (rval);
3756 }
3757
3758 /**
3759 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3760 * @rsp: response queue
3761 *
3762 * Beginning of request ring has initialization control block already built
3763 * by nvram config routine.
3764 *
3765 * Returns 0 on success.
3766 */
3767 void
3768 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3769 {
3770 uint16_t cnt;
3771 response_t *pkt;
3772
3773 rsp->ring_ptr = rsp->ring;
3774 rsp->ring_index = 0;
3775 rsp->status_srb = NULL;
3776 pkt = rsp->ring_ptr;
3777 for (cnt = 0; cnt < rsp->length; cnt++) {
3778 pkt->signature = RESPONSE_PROCESSED;
3779 pkt++;
3780 }
3781 }
3782
3783 /**
3784 * qla2x00_update_fw_options() - Read and process firmware options.
3785 * @vha: HA context
3786 *
3787 * Returns 0 on success.
3788 */
3789 void
3790 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3791 {
3792 uint16_t swing, emphasis, tx_sens, rx_sens;
3793 struct qla_hw_data *ha = vha->hw;
3794
3795 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3796 qla2x00_get_fw_options(vha, ha->fw_options);
3797
3798 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3799 return;
3800
3801 /* Serial Link options. */
3802 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3803 "Serial link options.\n");
3804 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3805 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
3806
3807 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3808 if (ha->fw_seriallink_options[3] & BIT_2) {
3809 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3810
3811 /* 1G settings */
3812 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3813 emphasis = (ha->fw_seriallink_options[2] &
3814 (BIT_4 | BIT_3)) >> 3;
3815 tx_sens = ha->fw_seriallink_options[0] &
3816 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3817 rx_sens = (ha->fw_seriallink_options[0] &
3818 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3819 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3820 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3821 if (rx_sens == 0x0)
3822 rx_sens = 0x3;
3823 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3824 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3825 ha->fw_options[10] |= BIT_5 |
3826 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3827 (tx_sens & (BIT_1 | BIT_0));
3828
3829 /* 2G settings */
3830 swing = (ha->fw_seriallink_options[2] &
3831 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3832 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3833 tx_sens = ha->fw_seriallink_options[1] &
3834 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3835 rx_sens = (ha->fw_seriallink_options[1] &
3836 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3837 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3838 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3839 if (rx_sens == 0x0)
3840 rx_sens = 0x3;
3841 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3842 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3843 ha->fw_options[11] |= BIT_5 |
3844 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3845 (tx_sens & (BIT_1 | BIT_0));
3846 }
3847
3848 /* FCP2 options. */
3849 /* Return command IOCBs without waiting for an ABTS to complete. */
3850 ha->fw_options[3] |= BIT_13;
3851
3852 /* LED scheme. */
3853 if (ha->flags.enable_led_scheme)
3854 ha->fw_options[2] |= BIT_12;
3855
3856 /* Detect ISP6312. */
3857 if (IS_QLA6312(ha))
3858 ha->fw_options[2] |= BIT_13;
3859
3860 /* Set Retry FLOGI in case of P2P connection */
3861 if (ha->operating_mode == P2P) {
3862 ha->fw_options[2] |= BIT_3;
3863 ql_dbg(ql_dbg_disc, vha, 0x2100,
3864 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3865 __func__, ha->fw_options[2]);
3866 }
3867
3868 /* Update firmware options. */
3869 qla2x00_set_fw_options(vha, ha->fw_options);
3870 }
3871
3872 void
3873 qla24xx_update_fw_options(scsi_qla_host_t *vha)
3874 {
3875 int rval;
3876 struct qla_hw_data *ha = vha->hw;
3877
3878 if (IS_P3P_TYPE(ha))
3879 return;
3880
3881 /* Hold status IOCBs until ABTS response received. */
3882 if (ql2xfwholdabts)
3883 ha->fw_options[3] |= BIT_12;
3884
3885 /* Set Retry FLOGI in case of P2P connection */
3886 if (ha->operating_mode == P2P) {
3887 ha->fw_options[2] |= BIT_3;
3888 ql_dbg(ql_dbg_disc, vha, 0x2101,
3889 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3890 __func__, ha->fw_options[2]);
3891 }
3892
3893 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3894 if (ql2xmvasynctoatio &&
3895 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
3896 if (qla_tgt_mode_enabled(vha) ||
3897 qla_dual_mode_enabled(vha))
3898 ha->fw_options[2] |= BIT_11;
3899 else
3900 ha->fw_options[2] &= ~BIT_11;
3901 }
3902
3903 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3904 IS_QLA28XX(ha)) {
3905 /*
3906 * Tell FW to track each exchange to prevent
3907 * driver from using stale exchange.
3908 */
3909 if (qla_tgt_mode_enabled(vha) ||
3910 qla_dual_mode_enabled(vha))
3911 ha->fw_options[2] |= BIT_4;
3912 else
3913 ha->fw_options[2] &= ~BIT_4;
3914
3915 /* Reserve 1/2 of emergency exchanges for ELS.*/
3916 if (qla2xuseresexchforels)
3917 ha->fw_options[2] |= BIT_8;
3918 else
3919 ha->fw_options[2] &= ~BIT_8;
3920 }
3921
3922 ql_dbg(ql_dbg_init, vha, 0x00e8,
3923 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3924 __func__, ha->fw_options[1], ha->fw_options[2],
3925 ha->fw_options[3], vha->host->active_mode);
3926
3927 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3928 qla2x00_set_fw_options(vha, ha->fw_options);
3929
3930 /* Update Serial Link options. */
3931 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
3932 return;
3933
3934 rval = qla2x00_set_serdes_params(vha,
3935 le16_to_cpu(ha->fw_seriallink_options24[1]),
3936 le16_to_cpu(ha->fw_seriallink_options24[2]),
3937 le16_to_cpu(ha->fw_seriallink_options24[3]));
3938 if (rval != QLA_SUCCESS) {
3939 ql_log(ql_log_warn, vha, 0x0104,
3940 "Unable to update Serial Link options (%x).\n", rval);
3941 }
3942 }
3943
3944 void
3945 qla2x00_config_rings(struct scsi_qla_host *vha)
3946 {
3947 struct qla_hw_data *ha = vha->hw;
3948 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3949 struct req_que *req = ha->req_q_map[0];
3950 struct rsp_que *rsp = ha->rsp_q_map[0];
3951
3952 /* Setup ring parameters in initialization control block. */
3953 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3954 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
3955 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3956 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3957 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
3958 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
3959
3960 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3961 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3962 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3963 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3964 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3965 }
3966
3967 void
3968 qla24xx_config_rings(struct scsi_qla_host *vha)
3969 {
3970 struct qla_hw_data *ha = vha->hw;
3971 device_reg_t *reg = ISP_QUE_REG(ha, 0);
3972 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3973 struct qla_msix_entry *msix;
3974 struct init_cb_24xx *icb;
3975 uint16_t rid = 0;
3976 struct req_que *req = ha->req_q_map[0];
3977 struct rsp_que *rsp = ha->rsp_q_map[0];
3978
3979 /* Setup ring parameters in initialization control block. */
3980 icb = (struct init_cb_24xx *)ha->init_cb;
3981 icb->request_q_outpointer = cpu_to_le16(0);
3982 icb->response_q_inpointer = cpu_to_le16(0);
3983 icb->request_q_length = cpu_to_le16(req->length);
3984 icb->response_q_length = cpu_to_le16(rsp->length);
3985 put_unaligned_le64(req->dma, &icb->request_q_address);
3986 put_unaligned_le64(rsp->dma, &icb->response_q_address);
3987
3988 /* Setup ATIO queue dma pointers for target mode */
3989 icb->atio_q_inpointer = cpu_to_le16(0);
3990 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3991 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
3992
3993 if (IS_SHADOW_REG_CAPABLE(ha))
3994 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
3995
3996 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3997 IS_QLA28XX(ha)) {
3998 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3999 icb->rid = cpu_to_le16(rid);
4000 if (ha->flags.msix_enabled) {
4001 msix = &ha->msix_entries[1];
4002 ql_dbg(ql_dbg_init, vha, 0x0019,
4003 "Registering vector 0x%x for base que.\n",
4004 msix->entry);
4005 icb->msix = cpu_to_le16(msix->entry);
4006 }
4007 /* Use alternate PCI bus number */
4008 if (MSB(rid))
4009 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4010 /* Use alternate PCI devfn */
4011 if (LSB(rid))
4012 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4013
4014 /* Use Disable MSIX Handshake mode for capable adapters */
4015 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4016 (ha->flags.msix_enabled)) {
4017 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4018 ha->flags.disable_msix_handshake = 1;
4019 ql_dbg(ql_dbg_init, vha, 0x00fe,
4020 "MSIX Handshake Disable Mode turned on.\n");
4021 } else {
4022 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4023 }
4024 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4025
4026 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
4027 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
4028 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
4029 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
4030 } else {
4031 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
4032 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
4033 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
4034 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
4035 }
4036
4037 qlt_24xx_config_rings(vha);
4038
4039 /* If the user has configured the speed, set it here */
4040 if (ha->set_data_rate) {
4041 ql_dbg(ql_dbg_init, vha, 0x00fd,
4042 "Speed set by user : %s Gbps \n",
4043 qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4044 icb->firmware_options_3 = (ha->set_data_rate << 13);
4045 }
4046
4047 /* PCI posting */
4048 RD_REG_DWORD(&ioreg->hccr);
4049 }
4050
4051 /**
4052 * qla2x00_init_rings() - Initializes firmware.
4053 * @vha: HA context
4054 *
4055 * Beginning of request ring has initialization control block already built
4056 * by nvram config routine.
4057 *
4058 * Returns 0 on success.
4059 */
4060 int
4061 qla2x00_init_rings(scsi_qla_host_t *vha)
4062 {
4063 int rval;
4064 unsigned long flags = 0;
4065 int cnt, que;
4066 struct qla_hw_data *ha = vha->hw;
4067 struct req_que *req;
4068 struct rsp_que *rsp;
4069 struct mid_init_cb_24xx *mid_init_cb =
4070 (struct mid_init_cb_24xx *) ha->init_cb;
4071
4072 spin_lock_irqsave(&ha->hardware_lock, flags);
4073
4074 /* Clear outstanding commands array. */
4075 for (que = 0; que < ha->max_req_queues; que++) {
4076 req = ha->req_q_map[que];
4077 if (!req || !test_bit(que, ha->req_qid_map))
4078 continue;
4079 req->out_ptr = (void *)(req->ring + req->length);
4080 *req->out_ptr = 0;
4081 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4082 req->outstanding_cmds[cnt] = NULL;
4083
4084 req->current_outstanding_cmd = 1;
4085
4086 /* Initialize firmware. */
4087 req->ring_ptr = req->ring;
4088 req->ring_index = 0;
4089 req->cnt = req->length;
4090 }
4091
4092 for (que = 0; que < ha->max_rsp_queues; que++) {
4093 rsp = ha->rsp_q_map[que];
4094 if (!rsp || !test_bit(que, ha->rsp_qid_map))
4095 continue;
4096 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
4097 *rsp->in_ptr = 0;
4098 /* Initialize response queue entries */
4099 if (IS_QLAFX00(ha))
4100 qlafx00_init_response_q_entries(rsp);
4101 else
4102 qla2x00_init_response_q_entries(rsp);
4103 }
4104
4105 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4106 ha->tgt.atio_ring_index = 0;
4107 /* Initialize ATIO queue entries */
4108 qlt_init_atio_q_entries(vha);
4109
4110 ha->isp_ops->config_rings(vha);
4111
4112 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4113
4114 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4115
4116 if (IS_QLAFX00(ha)) {
4117 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4118 goto next_check;
4119 }
4120
4121 /* Update any ISP specific firmware options before initialization. */
4122 ha->isp_ops->update_fw_options(vha);
4123
4124 if (ha->flags.npiv_supported) {
4125 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4126 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4127 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4128 }
4129
4130 if (IS_FWI2_CAPABLE(ha)) {
4131 mid_init_cb->options = cpu_to_le16(BIT_1);
4132 mid_init_cb->init_cb.execution_throttle =
4133 cpu_to_le16(ha->cur_fw_xcb_count);
4134 ha->flags.dport_enabled =
4135 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
4136 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4137 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4138 /* FA-WWPN Status */
4139 ha->flags.fawwpn_enabled =
4140 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
4141 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4142 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4143 }
4144
4145 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4146 next_check:
4147 if (rval) {
4148 ql_log(ql_log_fatal, vha, 0x00d2,
4149 "Init Firmware **** FAILED ****.\n");
4150 } else {
4151 ql_dbg(ql_dbg_init, vha, 0x00d3,
4152 "Init Firmware -- success.\n");
4153 QLA_FW_STARTED(ha);
4154 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4155 }
4156
4157 return (rval);
4158 }
4159
4160 /**
4161 * qla2x00_fw_ready() - Waits for firmware ready.
4162 * @vha: HA context
4163 *
4164 * Returns 0 on success.
4165 */
4166 static int
4167 qla2x00_fw_ready(scsi_qla_host_t *vha)
4168 {
4169 int rval;
4170 unsigned long wtime, mtime, cs84xx_time;
4171 uint16_t min_wait; /* Minimum wait time if loop is down */
4172 uint16_t wait_time; /* Wait time if loop is coming ready */
4173 uint16_t state[6];
4174 struct qla_hw_data *ha = vha->hw;
4175
4176 if (IS_QLAFX00(vha->hw))
4177 return qlafx00_fw_ready(vha);
4178
4179 rval = QLA_SUCCESS;
4180
4181 /* Time to wait for loop down */
4182 if (IS_P3P_TYPE(ha))
4183 min_wait = 30;
4184 else
4185 min_wait = 20;
4186
4187 /*
4188 * Firmware should take at most one RATOV to login, plus 5 seconds for
4189 * our own processing.
4190 */
4191 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4192 wait_time = min_wait;
4193 }
4194
4195 /* Min wait time if loop down */
4196 mtime = jiffies + (min_wait * HZ);
4197
4198 /* wait time before firmware ready */
4199 wtime = jiffies + (wait_time * HZ);
4200
4201 /* Wait for ISP to finish LIP */
4202 if (!vha->flags.init_done)
4203 ql_log(ql_log_info, vha, 0x801e,
4204 "Waiting for LIP to complete.\n");
4205
4206 do {
4207 memset(state, -1, sizeof(state));
4208 rval = qla2x00_get_firmware_state(vha, state);
4209 if (rval == QLA_SUCCESS) {
4210 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4211 vha->device_flags &= ~DFLG_NO_CABLE;
4212 }
4213 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4214 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4215 "fw_state=%x 84xx=%x.\n", state[0],
4216 state[2]);
4217 if ((state[2] & FSTATE_LOGGED_IN) &&
4218 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4219 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4220 "Sending verify iocb.\n");
4221
4222 cs84xx_time = jiffies;
4223 rval = qla84xx_init_chip(vha);
4224 if (rval != QLA_SUCCESS) {
4225 ql_log(ql_log_warn,
4226 vha, 0x8007,
4227 "Init chip failed.\n");
4228 break;
4229 }
4230
4231 /* Add time taken to initialize. */
4232 cs84xx_time = jiffies - cs84xx_time;
4233 wtime += cs84xx_time;
4234 mtime += cs84xx_time;
4235 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4236 "Increasing wait time by %ld. "
4237 "New time %ld.\n", cs84xx_time,
4238 wtime);
4239 }
4240 } else if (state[0] == FSTATE_READY) {
4241 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4242 "F/W Ready - OK.\n");
4243
4244 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4245 &ha->login_timeout, &ha->r_a_tov);
4246
4247 rval = QLA_SUCCESS;
4248 break;
4249 }
4250
4251 rval = QLA_FUNCTION_FAILED;
4252
4253 if (atomic_read(&vha->loop_down_timer) &&
4254 state[0] != FSTATE_READY) {
4255 /* Loop down. Timeout on min_wait for states
4256 * other than Wait for Login.
4257 */
4258 if (time_after_eq(jiffies, mtime)) {
4259 ql_log(ql_log_info, vha, 0x8038,
4260 "Cable is unplugged...\n");
4261
4262 vha->device_flags |= DFLG_NO_CABLE;
4263 break;
4264 }
4265 }
4266 } else {
4267 /* Mailbox cmd failed. Timeout on min_wait. */
4268 if (time_after_eq(jiffies, mtime) ||
4269 ha->flags.isp82xx_fw_hung)
4270 break;
4271 }
4272
4273 if (time_after_eq(jiffies, wtime))
4274 break;
4275
4276 /* Delay for a while */
4277 msleep(500);
4278 } while (1);
4279
4280 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4281 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4282 state[1], state[2], state[3], state[4], state[5], jiffies);
4283
4284 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4285 ql_log(ql_log_warn, vha, 0x803b,
4286 "Firmware ready **** FAILED ****.\n");
4287 }
4288
4289 return (rval);
4290 }
4291
4292 /*
4293 * qla2x00_configure_hba
4294 * Setup adapter context.
4295 *
4296 * Input:
4297 * ha = adapter state pointer.
4298 *
4299 * Returns:
4300 * 0 = success
4301 *
4302 * Context:
4303 * Kernel context.
4304 */
4305 static int
4306 qla2x00_configure_hba(scsi_qla_host_t *vha)
4307 {
4308 int rval;
4309 uint16_t loop_id;
4310 uint16_t topo;
4311 uint16_t sw_cap;
4312 uint8_t al_pa;
4313 uint8_t area;
4314 uint8_t domain;
4315 char connect_type[22];
4316 struct qla_hw_data *ha = vha->hw;
4317 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4318 port_id_t id;
4319 unsigned long flags;
4320
4321 /* Get host addresses. */
4322 rval = qla2x00_get_adapter_id(vha,
4323 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4324 if (rval != QLA_SUCCESS) {
4325 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4326 IS_CNA_CAPABLE(ha) ||
4327 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4328 ql_dbg(ql_dbg_disc, vha, 0x2008,
4329 "Loop is in a transition state.\n");
4330 } else {
4331 ql_log(ql_log_warn, vha, 0x2009,
4332 "Unable to get host loop ID.\n");
4333 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4334 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4335 ql_log(ql_log_warn, vha, 0x1151,
4336 "Doing link init.\n");
4337 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4338 return rval;
4339 }
4340 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4341 }
4342 return (rval);
4343 }
4344
4345 if (topo == 4) {
4346 ql_log(ql_log_info, vha, 0x200a,
4347 "Cannot get topology - retrying.\n");
4348 return (QLA_FUNCTION_FAILED);
4349 }
4350
4351 vha->loop_id = loop_id;
4352
4353 /* initialize */
4354 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4355 ha->operating_mode = LOOP;
4356 ha->switch_cap = 0;
4357
4358 switch (topo) {
4359 case 0:
4360 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4361 ha->current_topology = ISP_CFG_NL;
4362 strcpy(connect_type, "(Loop)");
4363 break;
4364
4365 case 1:
4366 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4367 ha->switch_cap = sw_cap;
4368 ha->current_topology = ISP_CFG_FL;
4369 strcpy(connect_type, "(FL_Port)");
4370 break;
4371
4372 case 2:
4373 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4374 ha->operating_mode = P2P;
4375 ha->current_topology = ISP_CFG_N;
4376 strcpy(connect_type, "(N_Port-to-N_Port)");
4377 break;
4378
4379 case 3:
4380 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4381 ha->switch_cap = sw_cap;
4382 ha->operating_mode = P2P;
4383 ha->current_topology = ISP_CFG_F;
4384 strcpy(connect_type, "(F_Port)");
4385 break;
4386
4387 default:
4388 ql_dbg(ql_dbg_disc, vha, 0x200f,
4389 "HBA in unknown topology %x, using NL.\n", topo);
4390 ha->current_topology = ISP_CFG_NL;
4391 strcpy(connect_type, "(Loop)");
4392 break;
4393 }
4394
4395 /* Save Host port and loop ID. */
4396 /* byte order - Big Endian */
4397 id.b.domain = domain;
4398 id.b.area = area;
4399 id.b.al_pa = al_pa;
4400 id.b.rsvd_1 = 0;
4401 spin_lock_irqsave(&ha->hardware_lock, flags);
4402 if (!(topo == 2 && ha->flags.n2n_bigger))
4403 qlt_update_host_map(vha, id);
4404 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4405
4406 if (!vha->flags.init_done)
4407 ql_log(ql_log_info, vha, 0x2010,
4408 "Topology - %s, Host Loop address 0x%x.\n",
4409 connect_type, vha->loop_id);
4410
4411 return(rval);
4412 }
4413
4414 inline void
4415 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4416 const char *def)
4417 {
4418 char *st, *en;
4419 uint16_t index;
4420 uint64_t zero[2] = { 0 };
4421 struct qla_hw_data *ha = vha->hw;
4422 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4423 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4424
4425 if (len > sizeof(zero))
4426 len = sizeof(zero);
4427 if (memcmp(model, &zero, len) != 0) {
4428 memcpy(ha->model_number, model, len);
4429 st = en = ha->model_number;
4430 en += len - 1;
4431 while (en > st) {
4432 if (*en != 0x20 && *en != 0x00)
4433 break;
4434 *en-- = '\0';
4435 }
4436
4437 index = (ha->pdev->subsystem_device & 0xff);
4438 if (use_tbl &&
4439 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4440 index < QLA_MODEL_NAMES)
4441 strlcpy(ha->model_desc,
4442 qla2x00_model_name[index * 2 + 1],
4443 sizeof(ha->model_desc));
4444 } else {
4445 index = (ha->pdev->subsystem_device & 0xff);
4446 if (use_tbl &&
4447 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4448 index < QLA_MODEL_NAMES) {
4449 strlcpy(ha->model_number,
4450 qla2x00_model_name[index * 2],
4451 sizeof(ha->model_number));
4452 strlcpy(ha->model_desc,
4453 qla2x00_model_name[index * 2 + 1],
4454 sizeof(ha->model_desc));
4455 } else {
4456 strlcpy(ha->model_number, def,
4457 sizeof(ha->model_number));
4458 }
4459 }
4460 if (IS_FWI2_CAPABLE(ha))
4461 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4462 sizeof(ha->model_desc));
4463 }
4464
4465 /* On sparc systems, obtain port and node WWN from firmware
4466 * properties.
4467 */
4468 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4469 {
4470 #ifdef CONFIG_SPARC
4471 struct qla_hw_data *ha = vha->hw;
4472 struct pci_dev *pdev = ha->pdev;
4473 struct device_node *dp = pci_device_to_OF_node(pdev);
4474 const u8 *val;
4475 int len;
4476
4477 val = of_get_property(dp, "port-wwn", &len);
4478 if (val && len >= WWN_SIZE)
4479 memcpy(nv->port_name, val, WWN_SIZE);
4480
4481 val = of_get_property(dp, "node-wwn", &len);
4482 if (val && len >= WWN_SIZE)
4483 memcpy(nv->node_name, val, WWN_SIZE);
4484 #endif
4485 }
4486
4487 /*
4488 * NVRAM configuration for ISP 2xxx
4489 *
4490 * Input:
4491 * ha = adapter block pointer.
4492 *
4493 * Output:
4494 * initialization control block in response_ring
4495 * host adapters parameters in host adapter block
4496 *
4497 * Returns:
4498 * 0 = success.
4499 */
4500 int
4501 qla2x00_nvram_config(scsi_qla_host_t *vha)
4502 {
4503 int rval;
4504 uint8_t chksum = 0;
4505 uint16_t cnt;
4506 uint8_t *dptr1, *dptr2;
4507 struct qla_hw_data *ha = vha->hw;
4508 init_cb_t *icb = ha->init_cb;
4509 nvram_t *nv = ha->nvram;
4510 uint8_t *ptr = ha->nvram;
4511 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4512
4513 rval = QLA_SUCCESS;
4514
4515 /* Determine NVRAM starting address. */
4516 ha->nvram_size = sizeof(*nv);
4517 ha->nvram_base = 0;
4518 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4519 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
4520 ha->nvram_base = 0x80;
4521
4522 /* Get NVRAM data and calculate checksum. */
4523 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4524 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4525 chksum += *ptr++;
4526
4527 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4528 "Contents of NVRAM.\n");
4529 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4530 nv, ha->nvram_size);
4531
4532 /* Bad NVRAM data, set defaults parameters. */
4533 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
4534 nv->nvram_version < 1) {
4535 /* Reset NVRAM data. */
4536 ql_log(ql_log_warn, vha, 0x0064,
4537 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
4538 chksum, nv->id, nv->nvram_version);
4539 ql_log(ql_log_warn, vha, 0x0065,
4540 "Falling back to "
4541 "functioning (yet invalid -- WWPN) defaults.\n");
4542
4543 /*
4544 * Set default initialization control block.
4545 */
4546 memset(nv, 0, ha->nvram_size);
4547 nv->parameter_block_version = ICB_VERSION;
4548
4549 if (IS_QLA23XX(ha)) {
4550 nv->firmware_options[0] = BIT_2 | BIT_1;
4551 nv->firmware_options[1] = BIT_7 | BIT_5;
4552 nv->add_firmware_options[0] = BIT_5;
4553 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4554 nv->frame_payload_size = 2048;
4555 nv->special_options[1] = BIT_7;
4556 } else if (IS_QLA2200(ha)) {
4557 nv->firmware_options[0] = BIT_2 | BIT_1;
4558 nv->firmware_options[1] = BIT_7 | BIT_5;
4559 nv->add_firmware_options[0] = BIT_5;
4560 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4561 nv->frame_payload_size = 1024;
4562 } else if (IS_QLA2100(ha)) {
4563 nv->firmware_options[0] = BIT_3 | BIT_1;
4564 nv->firmware_options[1] = BIT_5;
4565 nv->frame_payload_size = 1024;
4566 }
4567
4568 nv->max_iocb_allocation = cpu_to_le16(256);
4569 nv->execution_throttle = cpu_to_le16(16);
4570 nv->retry_count = 8;
4571 nv->retry_delay = 1;
4572
4573 nv->port_name[0] = 33;
4574 nv->port_name[3] = 224;
4575 nv->port_name[4] = 139;
4576
4577 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4578
4579 nv->login_timeout = 4;
4580
4581 /*
4582 * Set default host adapter parameters
4583 */
4584 nv->host_p[1] = BIT_2;
4585 nv->reset_delay = 5;
4586 nv->port_down_retry_count = 8;
4587 nv->max_luns_per_target = cpu_to_le16(8);
4588 nv->link_down_timeout = 60;
4589
4590 rval = 1;
4591 }
4592
4593 /* Reset Initialization control block */
4594 memset(icb, 0, ha->init_cb_size);
4595
4596 /*
4597 * Setup driver NVRAM options.
4598 */
4599 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4600 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4601 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4602 nv->firmware_options[1] &= ~BIT_4;
4603
4604 if (IS_QLA23XX(ha)) {
4605 nv->firmware_options[0] |= BIT_2;
4606 nv->firmware_options[0] &= ~BIT_3;
4607 nv->special_options[0] &= ~BIT_6;
4608 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4609
4610 if (IS_QLA2300(ha)) {
4611 if (ha->fb_rev == FPM_2310) {
4612 strcpy(ha->model_number, "QLA2310");
4613 } else {
4614 strcpy(ha->model_number, "QLA2300");
4615 }
4616 } else {
4617 qla2x00_set_model_info(vha, nv->model_number,
4618 sizeof(nv->model_number), "QLA23xx");
4619 }
4620 } else if (IS_QLA2200(ha)) {
4621 nv->firmware_options[0] |= BIT_2;
4622 /*
4623 * 'Point-to-point preferred, else loop' is not a safe
4624 * connection mode setting.
4625 */
4626 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4627 (BIT_5 | BIT_4)) {
4628 /* Force 'loop preferred, else point-to-point'. */
4629 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4630 nv->add_firmware_options[0] |= BIT_5;
4631 }
4632 strcpy(ha->model_number, "QLA22xx");
4633 } else /*if (IS_QLA2100(ha))*/ {
4634 strcpy(ha->model_number, "QLA2100");
4635 }
4636
4637 /*
4638 * Copy over NVRAM RISC parameter block to initialization control block.
4639 */
4640 dptr1 = (uint8_t *)icb;
4641 dptr2 = (uint8_t *)&nv->parameter_block_version;
4642 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4643 while (cnt--)
4644 *dptr1++ = *dptr2++;
4645
4646 /* Copy 2nd half. */
4647 dptr1 = (uint8_t *)icb->add_firmware_options;
4648 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4649 while (cnt--)
4650 *dptr1++ = *dptr2++;
4651 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4652 /* Use alternate WWN? */
4653 if (nv->host_p[1] & BIT_7) {
4654 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4655 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4656 }
4657
4658 /* Prepare nodename */
4659 if ((icb->firmware_options[1] & BIT_6) == 0) {
4660 /*
4661 * Firmware will apply the following mask if the nodename was
4662 * not provided.
4663 */
4664 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4665 icb->node_name[0] &= 0xF0;
4666 }
4667
4668 /*
4669 * Set host adapter parameters.
4670 */
4671
4672 /*
4673 * BIT_7 in the host-parameters section allows for modification to
4674 * internal driver logging.
4675 */
4676 if (nv->host_p[0] & BIT_7)
4677 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4678 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4679 /* Always load RISC code on non ISP2[12]00 chips. */
4680 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4681 ha->flags.disable_risc_code_load = 0;
4682 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4683 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4684 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4685 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4686 ha->flags.disable_serdes = 0;
4687
4688 ha->operating_mode =
4689 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4690
4691 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4692 sizeof(ha->fw_seriallink_options));
4693
4694 /* save HBA serial number */
4695 ha->serial0 = icb->port_name[5];
4696 ha->serial1 = icb->port_name[6];
4697 ha->serial2 = icb->port_name[7];
4698 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4699 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4700
4701 icb->execution_throttle = cpu_to_le16(0xFFFF);
4702
4703 ha->retry_count = nv->retry_count;
4704
4705 /* Set minimum login_timeout to 4 seconds. */
4706 if (nv->login_timeout != ql2xlogintimeout)
4707 nv->login_timeout = ql2xlogintimeout;
4708 if (nv->login_timeout < 4)
4709 nv->login_timeout = 4;
4710 ha->login_timeout = nv->login_timeout;
4711
4712 /* Set minimum RATOV to 100 tenths of a second. */
4713 ha->r_a_tov = 100;
4714
4715 ha->loop_reset_delay = nv->reset_delay;
4716
4717 /* Link Down Timeout = 0:
4718 *
4719 * When Port Down timer expires we will start returning
4720 * I/O's to OS with "DID_NO_CONNECT".
4721 *
4722 * Link Down Timeout != 0:
4723 *
4724 * The driver waits for the link to come up after link down
4725 * before returning I/Os to OS with "DID_NO_CONNECT".
4726 */
4727 if (nv->link_down_timeout == 0) {
4728 ha->loop_down_abort_time =
4729 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4730 } else {
4731 ha->link_down_timeout = nv->link_down_timeout;
4732 ha->loop_down_abort_time =
4733 (LOOP_DOWN_TIME - ha->link_down_timeout);
4734 }
4735
4736 /*
4737 * Need enough time to try and get the port back.
4738 */
4739 ha->port_down_retry_count = nv->port_down_retry_count;
4740 if (qlport_down_retry)
4741 ha->port_down_retry_count = qlport_down_retry;
4742 /* Set login_retry_count */
4743 ha->login_retry_count = nv->retry_count;
4744 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4745 ha->port_down_retry_count > 3)
4746 ha->login_retry_count = ha->port_down_retry_count;
4747 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4748 ha->login_retry_count = ha->port_down_retry_count;
4749 if (ql2xloginretrycount)
4750 ha->login_retry_count = ql2xloginretrycount;
4751
4752 icb->lun_enables = cpu_to_le16(0);
4753 icb->command_resource_count = 0;
4754 icb->immediate_notify_resource_count = 0;
4755 icb->timeout = cpu_to_le16(0);
4756
4757 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4758 /* Enable RIO */
4759 icb->firmware_options[0] &= ~BIT_3;
4760 icb->add_firmware_options[0] &=
4761 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4762 icb->add_firmware_options[0] |= BIT_2;
4763 icb->response_accumulation_timer = 3;
4764 icb->interrupt_delay_timer = 5;
4765
4766 vha->flags.process_response_queue = 1;
4767 } else {
4768 /* Enable ZIO. */
4769 if (!vha->flags.init_done) {
4770 ha->zio_mode = icb->add_firmware_options[0] &
4771 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4772 ha->zio_timer = icb->interrupt_delay_timer ?
4773 icb->interrupt_delay_timer : 2;
4774 }
4775 icb->add_firmware_options[0] &=
4776 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4777 vha->flags.process_response_queue = 0;
4778 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4779 ha->zio_mode = QLA_ZIO_MODE_6;
4780
4781 ql_log(ql_log_info, vha, 0x0068,
4782 "ZIO mode %d enabled; timer delay (%d us).\n",
4783 ha->zio_mode, ha->zio_timer * 100);
4784
4785 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4786 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4787 vha->flags.process_response_queue = 1;
4788 }
4789 }
4790
4791 if (rval) {
4792 ql_log(ql_log_warn, vha, 0x0069,
4793 "NVRAM configuration failed.\n");
4794 }
4795 return (rval);
4796 }
4797
4798 static void
4799 qla2x00_rport_del(void *data)
4800 {
4801 fc_port_t *fcport = data;
4802 struct fc_rport *rport;
4803 unsigned long flags;
4804
4805 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4806 rport = fcport->drport ? fcport->drport : fcport->rport;
4807 fcport->drport = NULL;
4808 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4809 if (rport) {
4810 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4811 "%s %8phN. rport %p roles %x\n",
4812 __func__, fcport->port_name, rport,
4813 rport->roles);
4814
4815 fc_remote_port_delete(rport);
4816 }
4817 }
4818
4819 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
4820 {
4821 int old_state;
4822
4823 old_state = atomic_read(&fcport->state);
4824 atomic_set(&fcport->state, state);
4825
4826 /* Don't print state transitions during initial allocation of fcport */
4827 if (old_state && old_state != state) {
4828 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
4829 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
4830 fcport->port_name, port_state_str[old_state],
4831 port_state_str[state], fcport->d_id.b.domain,
4832 fcport->d_id.b.area, fcport->d_id.b.al_pa);
4833 }
4834 }
4835
4836 /**
4837 * qla2x00_alloc_fcport() - Allocate a generic fcport.
4838 * @vha: HA context
4839 * @flags: allocation flags
4840 *
4841 * Returns a pointer to the allocated fcport, or NULL, if none available.
4842 */
4843 fc_port_t *
4844 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
4845 {
4846 fc_port_t *fcport;
4847
4848 fcport = kzalloc(sizeof(fc_port_t), flags);
4849 if (!fcport)
4850 return NULL;
4851
4852 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4853 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4854 flags);
4855 if (!fcport->ct_desc.ct_sns) {
4856 ql_log(ql_log_warn, vha, 0xd049,
4857 "Failed to allocate ct_sns request.\n");
4858 kfree(fcport);
4859 return NULL;
4860 }
4861
4862 /* Setup fcport template structure. */
4863 fcport->vha = vha;
4864 fcport->port_type = FCT_UNKNOWN;
4865 fcport->loop_id = FC_NO_LOOP_ID;
4866 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
4867 fcport->supported_classes = FC_COS_UNSPECIFIED;
4868 fcport->fp_speed = PORT_SPEED_UNKNOWN;
4869
4870 fcport->disc_state = DSC_DELETED;
4871 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4872 fcport->deleted = QLA_SESS_DELETED;
4873 fcport->login_retry = vha->hw->login_retry_count;
4874 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
4875 fcport->logout_on_delete = 1;
4876
4877 if (!fcport->ct_desc.ct_sns) {
4878 ql_log(ql_log_warn, vha, 0xd049,
4879 "Failed to allocate ct_sns request.\n");
4880 kfree(fcport);
4881 return NULL;
4882 }
4883
4884 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4885 INIT_WORK(&fcport->free_work, qlt_free_session_done);
4886 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
4887 INIT_LIST_HEAD(&fcport->gnl_entry);
4888 INIT_LIST_HEAD(&fcport->list);
4889
4890 return fcport;
4891 }
4892
4893 void
4894 qla2x00_free_fcport(fc_port_t *fcport)
4895 {
4896 if (fcport->ct_desc.ct_sns) {
4897 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4898 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4899 fcport->ct_desc.ct_sns_dma);
4900
4901 fcport->ct_desc.ct_sns = NULL;
4902 }
4903 list_del(&fcport->list);
4904 qla2x00_clear_loop_id(fcport);
4905 kfree(fcport);
4906 }
4907
4908 /*
4909 * qla2x00_configure_loop
4910 * Updates Fibre Channel Device Database with what is actually on loop.
4911 *
4912 * Input:
4913 * ha = adapter block pointer.
4914 *
4915 * Returns:
4916 * 0 = success.
4917 * 1 = error.
4918 * 2 = database was full and device was not configured.
4919 */
4920 static int
4921 qla2x00_configure_loop(scsi_qla_host_t *vha)
4922 {
4923 int rval;
4924 unsigned long flags, save_flags;
4925 struct qla_hw_data *ha = vha->hw;
4926
4927 rval = QLA_SUCCESS;
4928
4929 /* Get Initiator ID */
4930 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4931 rval = qla2x00_configure_hba(vha);
4932 if (rval != QLA_SUCCESS) {
4933 ql_dbg(ql_dbg_disc, vha, 0x2013,
4934 "Unable to configure HBA.\n");
4935 return (rval);
4936 }
4937 }
4938
4939 save_flags = flags = vha->dpc_flags;
4940 ql_dbg(ql_dbg_disc, vha, 0x2014,
4941 "Configure loop -- dpc flags = 0x%lx.\n", flags);
4942
4943 /*
4944 * If we have both an RSCN and PORT UPDATE pending then handle them
4945 * both at the same time.
4946 */
4947 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4948 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
4949
4950 qla2x00_get_data_rate(vha);
4951
4952 /* Determine what we need to do */
4953 if ((ha->current_topology == ISP_CFG_FL ||
4954 ha->current_topology == ISP_CFG_F) &&
4955 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4956
4957 set_bit(RSCN_UPDATE, &flags);
4958 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4959
4960 } else if (ha->current_topology == ISP_CFG_NL ||
4961 ha->current_topology == ISP_CFG_N) {
4962 clear_bit(RSCN_UPDATE, &flags);
4963 set_bit(LOCAL_LOOP_UPDATE, &flags);
4964 } else if (!vha->flags.online ||
4965 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
4966 set_bit(RSCN_UPDATE, &flags);
4967 set_bit(LOCAL_LOOP_UPDATE, &flags);
4968 }
4969
4970 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
4971 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4972 ql_dbg(ql_dbg_disc, vha, 0x2015,
4973 "Loop resync needed, failing.\n");
4974 rval = QLA_FUNCTION_FAILED;
4975 } else
4976 rval = qla2x00_configure_local_loop(vha);
4977 }
4978
4979 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
4980 if (LOOP_TRANSITION(vha)) {
4981 ql_dbg(ql_dbg_disc, vha, 0x2099,
4982 "Needs RSCN update and loop transition.\n");
4983 rval = QLA_FUNCTION_FAILED;
4984 }
4985 else
4986 rval = qla2x00_configure_fabric(vha);
4987 }
4988
4989 if (rval == QLA_SUCCESS) {
4990 if (atomic_read(&vha->loop_down_timer) ||
4991 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4992 rval = QLA_FUNCTION_FAILED;
4993 } else {
4994 atomic_set(&vha->loop_state, LOOP_READY);
4995 ql_dbg(ql_dbg_disc, vha, 0x2069,
4996 "LOOP READY.\n");
4997 ha->flags.fw_init_done = 1;
4998
4999 /*
5000 * Process any ATIO queue entries that came in
5001 * while we weren't online.
5002 */
5003 if (qla_tgt_mode_enabled(vha) ||
5004 qla_dual_mode_enabled(vha)) {
5005 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5006 qlt_24xx_process_atio_queue(vha, 0);
5007 spin_unlock_irqrestore(&ha->tgt.atio_lock,
5008 flags);
5009 }
5010 }
5011 }
5012
5013 if (rval) {
5014 ql_dbg(ql_dbg_disc, vha, 0x206a,
5015 "%s *** FAILED ***.\n", __func__);
5016 } else {
5017 ql_dbg(ql_dbg_disc, vha, 0x206b,
5018 "%s: exiting normally.\n", __func__);
5019 }
5020
5021 /* Restore state if a resync event occurred during processing */
5022 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5023 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5024 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5025 if (test_bit(RSCN_UPDATE, &save_flags)) {
5026 set_bit(RSCN_UPDATE, &vha->dpc_flags);
5027 }
5028 }
5029
5030 return (rval);
5031 }
5032
5033 /*
5034 * qla2x00_configure_local_loop
5035 * Updates Fibre Channel Device Database with local loop devices.
5036 *
5037 * Input:
5038 * ha = adapter block pointer.
5039 *
5040 * Returns:
5041 * 0 = success.
5042 */
5043 static int
5044 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5045 {
5046 int rval, rval2;
5047 int found_devs;
5048 int found;
5049 fc_port_t *fcport, *new_fcport;
5050
5051 uint16_t index;
5052 uint16_t entries;
5053 struct gid_list_info *gid;
5054 uint16_t loop_id;
5055 uint8_t domain, area, al_pa;
5056 struct qla_hw_data *ha = vha->hw;
5057 unsigned long flags;
5058
5059 /* Inititae N2N login. */
5060 if (N2N_TOPO(ha)) {
5061 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
5062 /* borrowing */
5063 u32 *bp, i, sz;
5064
5065 memset(ha->init_cb, 0, ha->init_cb_size);
5066 sz = min_t(int, sizeof(struct els_plogi_payload),
5067 ha->init_cb_size);
5068 rval = qla24xx_get_port_login_templ(vha,
5069 ha->init_cb_dma, (void *)ha->init_cb, sz);
5070 if (rval == QLA_SUCCESS) {
5071 bp = (uint32_t *)ha->init_cb;
5072 for (i = 0; i < sz/4 ; i++, bp++)
5073 *bp = cpu_to_be32(*bp);
5074
5075 memcpy(&ha->plogi_els_payld.data,
5076 (void *)ha->init_cb,
5077 sizeof(ha->plogi_els_payld.data));
5078 } else {
5079 ql_dbg(ql_dbg_init, vha, 0x00d1,
5080 "PLOGI ELS param read fail.\n");
5081 goto skip_login;
5082 }
5083 }
5084
5085 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5086 if (fcport->n2n_flag) {
5087 qla24xx_fcport_handle_login(vha, fcport);
5088 return QLA_SUCCESS;
5089 }
5090 }
5091 skip_login:
5092 spin_lock_irqsave(&vha->work_lock, flags);
5093 vha->scan.scan_retry++;
5094 spin_unlock_irqrestore(&vha->work_lock, flags);
5095
5096 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5097 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5098 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5099 }
5100 }
5101
5102 found_devs = 0;
5103 new_fcport = NULL;
5104 entries = MAX_FIBRE_DEVICES_LOOP;
5105
5106 /* Get list of logged in devices. */
5107 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5108 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5109 &entries);
5110 if (rval != QLA_SUCCESS)
5111 goto err;
5112
5113 ql_dbg(ql_dbg_disc, vha, 0x2011,
5114 "Entries in ID list (%d).\n", entries);
5115 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5116 ha->gid_list, entries * sizeof(*ha->gid_list));
5117
5118 if (entries == 0) {
5119 spin_lock_irqsave(&vha->work_lock, flags);
5120 vha->scan.scan_retry++;
5121 spin_unlock_irqrestore(&vha->work_lock, flags);
5122
5123 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5124 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5125 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5126 }
5127 } else {
5128 vha->scan.scan_retry = 0;
5129 }
5130
5131 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5132 fcport->scan_state = QLA_FCPORT_SCAN;
5133 }
5134
5135 /* Allocate temporary fcport for any new fcports discovered. */
5136 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5137 if (new_fcport == NULL) {
5138 ql_log(ql_log_warn, vha, 0x2012,
5139 "Memory allocation failed for fcport.\n");
5140 rval = QLA_MEMORY_ALLOC_FAILED;
5141 goto err;
5142 }
5143 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5144
5145 /* Add devices to port list. */
5146 gid = ha->gid_list;
5147 for (index = 0; index < entries; index++) {
5148 domain = gid->domain;
5149 area = gid->area;
5150 al_pa = gid->al_pa;
5151 if (IS_QLA2100(ha) || IS_QLA2200(ha))
5152 loop_id = gid->loop_id_2100;
5153 else
5154 loop_id = le16_to_cpu(gid->loop_id);
5155 gid = (void *)gid + ha->gid_list_info_size;
5156
5157 /* Bypass reserved domain fields. */
5158 if ((domain & 0xf0) == 0xf0)
5159 continue;
5160
5161 /* Bypass if not same domain and area of adapter. */
5162 if (area && domain && ((area != vha->d_id.b.area) ||
5163 (domain != vha->d_id.b.domain)) &&
5164 (ha->current_topology == ISP_CFG_NL))
5165 continue;
5166
5167
5168 /* Bypass invalid local loop ID. */
5169 if (loop_id > LAST_LOCAL_LOOP_ID)
5170 continue;
5171
5172 memset(new_fcport->port_name, 0, WWN_SIZE);
5173
5174 /* Fill in member data. */
5175 new_fcport->d_id.b.domain = domain;
5176 new_fcport->d_id.b.area = area;
5177 new_fcport->d_id.b.al_pa = al_pa;
5178 new_fcport->loop_id = loop_id;
5179 new_fcport->scan_state = QLA_FCPORT_FOUND;
5180
5181 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5182 if (rval2 != QLA_SUCCESS) {
5183 ql_dbg(ql_dbg_disc, vha, 0x2097,
5184 "Failed to retrieve fcport information "
5185 "-- get_port_database=%x, loop_id=0x%04x.\n",
5186 rval2, new_fcport->loop_id);
5187 /* Skip retry if N2N */
5188 if (ha->current_topology != ISP_CFG_N) {
5189 ql_dbg(ql_dbg_disc, vha, 0x2105,
5190 "Scheduling resync.\n");
5191 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5192 continue;
5193 }
5194 }
5195
5196 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5197 /* Check for matching device in port list. */
5198 found = 0;
5199 fcport = NULL;
5200 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5201 if (memcmp(new_fcport->port_name, fcport->port_name,
5202 WWN_SIZE))
5203 continue;
5204
5205 fcport->flags &= ~FCF_FABRIC_DEVICE;
5206 fcport->loop_id = new_fcport->loop_id;
5207 fcport->port_type = new_fcport->port_type;
5208 fcport->d_id.b24 = new_fcport->d_id.b24;
5209 memcpy(fcport->node_name, new_fcport->node_name,
5210 WWN_SIZE);
5211 fcport->scan_state = QLA_FCPORT_FOUND;
5212 found++;
5213 break;
5214 }
5215
5216 if (!found) {
5217 /* New device, add to fcports list. */
5218 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5219
5220 /* Allocate a new replacement fcport. */
5221 fcport = new_fcport;
5222
5223 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5224
5225 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5226
5227 if (new_fcport == NULL) {
5228 ql_log(ql_log_warn, vha, 0xd031,
5229 "Failed to allocate memory for fcport.\n");
5230 rval = QLA_MEMORY_ALLOC_FAILED;
5231 goto err;
5232 }
5233 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5234 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5235 }
5236
5237 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5238
5239 /* Base iIDMA settings on HBA port speed. */
5240 fcport->fp_speed = ha->link_data_rate;
5241
5242 found_devs++;
5243 }
5244
5245 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5246 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5247 break;
5248
5249 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5250 if ((qla_dual_mode_enabled(vha) ||
5251 qla_ini_mode_enabled(vha)) &&
5252 atomic_read(&fcport->state) == FCS_ONLINE) {
5253 qla2x00_mark_device_lost(vha, fcport,
5254 ql2xplogiabsentdevice);
5255 if (fcport->loop_id != FC_NO_LOOP_ID &&
5256 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5257 fcport->port_type != FCT_INITIATOR &&
5258 fcport->port_type != FCT_BROADCAST) {
5259 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5260 "%s %d %8phC post del sess\n",
5261 __func__, __LINE__,
5262 fcport->port_name);
5263
5264 qlt_schedule_sess_for_deletion(fcport);
5265 continue;
5266 }
5267 }
5268 }
5269
5270 if (fcport->scan_state == QLA_FCPORT_FOUND)
5271 qla24xx_fcport_handle_login(vha, fcport);
5272 }
5273
5274 qla2x00_free_fcport(new_fcport);
5275
5276 return rval;
5277
5278 err:
5279 ql_dbg(ql_dbg_disc, vha, 0x2098,
5280 "Configure local loop error exit: rval=%x.\n", rval);
5281 return rval;
5282 }
5283
5284 static void
5285 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5286 {
5287 int rval;
5288 uint16_t mb[MAILBOX_REGISTER_COUNT];
5289 struct qla_hw_data *ha = vha->hw;
5290
5291 if (!IS_IIDMA_CAPABLE(ha))
5292 return;
5293
5294 if (atomic_read(&fcport->state) != FCS_ONLINE)
5295 return;
5296
5297 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5298 fcport->fp_speed > ha->link_data_rate ||
5299 !ha->flags.gpsc_supported)
5300 return;
5301
5302 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5303 mb);
5304 if (rval != QLA_SUCCESS) {
5305 ql_dbg(ql_dbg_disc, vha, 0x2004,
5306 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5307 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5308 } else {
5309 ql_dbg(ql_dbg_disc, vha, 0x2005,
5310 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5311 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5312 fcport->fp_speed, fcport->port_name);
5313 }
5314 }
5315
5316 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5317 {
5318 qla2x00_iidma_fcport(vha, fcport);
5319 qla24xx_update_fcport_fcp_prio(vha, fcport);
5320 }
5321
5322 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5323 {
5324 struct qla_work_evt *e;
5325
5326 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5327 if (!e)
5328 return QLA_FUNCTION_FAILED;
5329
5330 e->u.fcport.fcport = fcport;
5331 return qla2x00_post_work(vha, e);
5332 }
5333
5334 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5335 static void
5336 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5337 {
5338 struct fc_rport_identifiers rport_ids;
5339 struct fc_rport *rport;
5340 unsigned long flags;
5341
5342 if (atomic_read(&fcport->state) == FCS_ONLINE)
5343 return;
5344
5345 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5346 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5347 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5348 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5349 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5350 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5351 if (!rport) {
5352 ql_log(ql_log_warn, vha, 0x2006,
5353 "Unable to allocate fc remote port.\n");
5354 return;
5355 }
5356
5357 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5358 *((fc_port_t **)rport->dd_data) = fcport;
5359 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5360
5361 rport->supported_classes = fcport->supported_classes;
5362
5363 rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5364 if (fcport->port_type == FCT_INITIATOR)
5365 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
5366 if (fcport->port_type == FCT_TARGET)
5367 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
5368 if (fcport->port_type & FCT_NVME_INITIATOR)
5369 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
5370 if (fcport->port_type & FCT_NVME_TARGET)
5371 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
5372 if (fcport->port_type & FCT_NVME_DISCOVERY)
5373 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
5374
5375 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5376 "%s %8phN. rport %p is %s mode\n",
5377 __func__, fcport->port_name, rport,
5378 (fcport->port_type == FCT_TARGET) ? "tgt" :
5379 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
5380
5381 fc_remote_port_rolechg(rport, rport_ids.roles);
5382 }
5383
5384 /*
5385 * qla2x00_update_fcport
5386 * Updates device on list.
5387 *
5388 * Input:
5389 * ha = adapter block pointer.
5390 * fcport = port structure pointer.
5391 *
5392 * Return:
5393 * 0 - Success
5394 * BIT_0 - error
5395 *
5396 * Context:
5397 * Kernel context.
5398 */
5399 void
5400 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5401 {
5402 if (IS_SW_RESV_ADDR(fcport->d_id))
5403 return;
5404
5405 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5406 __func__, fcport->port_name);
5407
5408 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5409 fcport->login_retry = vha->hw->login_retry_count;
5410 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5411 fcport->deleted = 0;
5412 if (vha->hw->current_topology == ISP_CFG_NL)
5413 fcport->logout_on_delete = 0;
5414 else
5415 fcport->logout_on_delete = 1;
5416 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5417
5418 switch (vha->hw->current_topology) {
5419 case ISP_CFG_N:
5420 case ISP_CFG_NL:
5421 fcport->keep_nport_handle = 1;
5422 break;
5423 default:
5424 break;
5425 }
5426
5427 qla2x00_iidma_fcport(vha, fcport);
5428
5429 if (NVME_TARGET(vha->hw, fcport)) {
5430 qla_nvme_register_remote(vha, fcport);
5431 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5432 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5433 return;
5434 }
5435
5436 qla24xx_update_fcport_fcp_prio(vha, fcport);
5437
5438 switch (vha->host->active_mode) {
5439 case MODE_INITIATOR:
5440 qla2x00_reg_remote_port(vha, fcport);
5441 break;
5442 case MODE_TARGET:
5443 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5444 !vha->vha_tgt.qla_tgt->tgt_stopped)
5445 qlt_fc_port_added(vha, fcport);
5446 break;
5447 case MODE_DUAL:
5448 qla2x00_reg_remote_port(vha, fcport);
5449 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5450 !vha->vha_tgt.qla_tgt->tgt_stopped)
5451 qlt_fc_port_added(vha, fcport);
5452 break;
5453 default:
5454 break;
5455 }
5456
5457 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5458
5459 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5460 if (fcport->id_changed) {
5461 fcport->id_changed = 0;
5462 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5463 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5464 __func__, __LINE__, fcport->port_name,
5465 vha->fcport_count);
5466 qla24xx_post_gfpnid_work(vha, fcport);
5467 } else {
5468 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5469 "%s %d %8phC post gpsc fcp_cnt %d\n",
5470 __func__, __LINE__, fcport->port_name,
5471 vha->fcport_count);
5472 qla24xx_post_gpsc_work(vha, fcport);
5473 }
5474 }
5475
5476 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5477 }
5478
5479 void qla_register_fcport_fn(struct work_struct *work)
5480 {
5481 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5482 u32 rscn_gen = fcport->rscn_gen;
5483 u16 data[2];
5484
5485 if (IS_SW_RESV_ADDR(fcport->d_id))
5486 return;
5487
5488 qla2x00_update_fcport(fcport->vha, fcport);
5489
5490 if (rscn_gen != fcport->rscn_gen) {
5491 /* RSCN(s) came in while registration */
5492 switch (fcport->next_disc_state) {
5493 case DSC_DELETE_PEND:
5494 qlt_schedule_sess_for_deletion(fcport);
5495 break;
5496 case DSC_ADISC:
5497 data[0] = data[1] = 0;
5498 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5499 data);
5500 break;
5501 default:
5502 break;
5503 }
5504 }
5505 }
5506
5507 /*
5508 * qla2x00_configure_fabric
5509 * Setup SNS devices with loop ID's.
5510 *
5511 * Input:
5512 * ha = adapter block pointer.
5513 *
5514 * Returns:
5515 * 0 = success.
5516 * BIT_0 = error
5517 */
5518 static int
5519 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5520 {
5521 int rval;
5522 fc_port_t *fcport;
5523 uint16_t mb[MAILBOX_REGISTER_COUNT];
5524 uint16_t loop_id;
5525 LIST_HEAD(new_fcports);
5526 struct qla_hw_data *ha = vha->hw;
5527 int discovery_gen;
5528
5529 /* If FL port exists, then SNS is present */
5530 if (IS_FWI2_CAPABLE(ha))
5531 loop_id = NPH_F_PORT;
5532 else
5533 loop_id = SNS_FL_PORT;
5534 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5535 if (rval != QLA_SUCCESS) {
5536 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5537 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5538
5539 vha->device_flags &= ~SWITCH_FOUND;
5540 return (QLA_SUCCESS);
5541 }
5542 vha->device_flags |= SWITCH_FOUND;
5543
5544
5545 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5546 rval = qla2x00_send_change_request(vha, 0x3, 0);
5547 if (rval != QLA_SUCCESS)
5548 ql_log(ql_log_warn, vha, 0x121,
5549 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5550 rval);
5551 }
5552
5553
5554 do {
5555 qla2x00_mgmt_svr_login(vha);
5556
5557 /* FDMI support. */
5558 if (ql2xfdmienable &&
5559 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5560 qla2x00_fdmi_register(vha);
5561
5562 /* Ensure we are logged into the SNS. */
5563 loop_id = NPH_SNS_LID(ha);
5564 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5565 0xfc, mb, BIT_1|BIT_0);
5566 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5567 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5568 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5569 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5570 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5571 return rval;
5572 }
5573 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5574 if (qla2x00_rft_id(vha)) {
5575 /* EMPTY */
5576 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5577 "Register FC-4 TYPE failed.\n");
5578 if (test_bit(LOOP_RESYNC_NEEDED,
5579 &vha->dpc_flags))
5580 break;
5581 }
5582 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5583 /* EMPTY */
5584 ql_dbg(ql_dbg_disc, vha, 0x209a,
5585 "Register FC-4 Features failed.\n");
5586 if (test_bit(LOOP_RESYNC_NEEDED,
5587 &vha->dpc_flags))
5588 break;
5589 }
5590 if (vha->flags.nvme_enabled) {
5591 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5592 ql_dbg(ql_dbg_disc, vha, 0x2049,
5593 "Register NVME FC Type Features failed.\n");
5594 }
5595 }
5596 if (qla2x00_rnn_id(vha)) {
5597 /* EMPTY */
5598 ql_dbg(ql_dbg_disc, vha, 0x2104,
5599 "Register Node Name failed.\n");
5600 if (test_bit(LOOP_RESYNC_NEEDED,
5601 &vha->dpc_flags))
5602 break;
5603 } else if (qla2x00_rsnn_nn(vha)) {
5604 /* EMPTY */
5605 ql_dbg(ql_dbg_disc, vha, 0x209b,
5606 "Register Symbolic Node Name failed.\n");
5607 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5608 break;
5609 }
5610 }
5611
5612
5613 /* Mark the time right before querying FW for connected ports.
5614 * This process is long, asynchronous and by the time it's done,
5615 * collected information might not be accurate anymore. E.g.
5616 * disconnected port might have re-connected and a brand new
5617 * session has been created. In this case session's generation
5618 * will be newer than discovery_gen. */
5619 qlt_do_generation_tick(vha, &discovery_gen);
5620
5621 if (USE_ASYNC_SCAN(ha)) {
5622 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5623 NULL);
5624 if (rval)
5625 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5626 } else {
5627 list_for_each_entry(fcport, &vha->vp_fcports, list)
5628 fcport->scan_state = QLA_FCPORT_SCAN;
5629
5630 rval = qla2x00_find_all_fabric_devs(vha);
5631 }
5632 if (rval != QLA_SUCCESS)
5633 break;
5634 } while (0);
5635
5636 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5637 qla_nvme_register_hba(vha);
5638
5639 if (rval)
5640 ql_dbg(ql_dbg_disc, vha, 0x2068,
5641 "Configure fabric error exit rval=%d.\n", rval);
5642
5643 return (rval);
5644 }
5645
5646 /*
5647 * qla2x00_find_all_fabric_devs
5648 *
5649 * Input:
5650 * ha = adapter block pointer.
5651 * dev = database device entry pointer.
5652 *
5653 * Returns:
5654 * 0 = success.
5655 *
5656 * Context:
5657 * Kernel context.
5658 */
5659 static int
5660 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5661 {
5662 int rval;
5663 uint16_t loop_id;
5664 fc_port_t *fcport, *new_fcport;
5665 int found;
5666
5667 sw_info_t *swl;
5668 int swl_idx;
5669 int first_dev, last_dev;
5670 port_id_t wrap = {}, nxt_d_id;
5671 struct qla_hw_data *ha = vha->hw;
5672 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5673 unsigned long flags;
5674
5675 rval = QLA_SUCCESS;
5676
5677 /* Try GID_PT to get device list, else GAN. */
5678 if (!ha->swl)
5679 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5680 GFP_KERNEL);
5681 swl = ha->swl;
5682 if (!swl) {
5683 /*EMPTY*/
5684 ql_dbg(ql_dbg_disc, vha, 0x209c,
5685 "GID_PT allocations failed, fallback on GA_NXT.\n");
5686 } else {
5687 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5688 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5689 swl = NULL;
5690 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5691 return rval;
5692 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5693 swl = NULL;
5694 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5695 return rval;
5696 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5697 swl = NULL;
5698 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5699 return rval;
5700 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5701 swl = NULL;
5702 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5703 return rval;
5704 }
5705
5706 /* If other queries succeeded probe for FC-4 type */
5707 if (swl) {
5708 qla2x00_gff_id(vha, swl);
5709 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5710 return rval;
5711 }
5712 }
5713 swl_idx = 0;
5714
5715 /* Allocate temporary fcport for any new fcports discovered. */
5716 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5717 if (new_fcport == NULL) {
5718 ql_log(ql_log_warn, vha, 0x209d,
5719 "Failed to allocate memory for fcport.\n");
5720 return (QLA_MEMORY_ALLOC_FAILED);
5721 }
5722 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5723 /* Set start port ID scan at adapter ID. */
5724 first_dev = 1;
5725 last_dev = 0;
5726
5727 /* Starting free loop ID. */
5728 loop_id = ha->min_external_loopid;
5729 for (; loop_id <= ha->max_loop_id; loop_id++) {
5730 if (qla2x00_is_reserved_id(vha, loop_id))
5731 continue;
5732
5733 if (ha->current_topology == ISP_CFG_FL &&
5734 (atomic_read(&vha->loop_down_timer) ||
5735 LOOP_TRANSITION(vha))) {
5736 atomic_set(&vha->loop_down_timer, 0);
5737 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5738 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5739 break;
5740 }
5741
5742 if (swl != NULL) {
5743 if (last_dev) {
5744 wrap.b24 = new_fcport->d_id.b24;
5745 } else {
5746 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5747 memcpy(new_fcport->node_name,
5748 swl[swl_idx].node_name, WWN_SIZE);
5749 memcpy(new_fcport->port_name,
5750 swl[swl_idx].port_name, WWN_SIZE);
5751 memcpy(new_fcport->fabric_port_name,
5752 swl[swl_idx].fabric_port_name, WWN_SIZE);
5753 new_fcport->fp_speed = swl[swl_idx].fp_speed;
5754 new_fcport->fc4_type = swl[swl_idx].fc4_type;
5755
5756 new_fcport->nvme_flag = 0;
5757 if (vha->flags.nvme_enabled &&
5758 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
5759 ql_log(ql_log_info, vha, 0x2131,
5760 "FOUND: NVME port %8phC as FC Type 28h\n",
5761 new_fcport->port_name);
5762 }
5763
5764 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5765 last_dev = 1;
5766 }
5767 swl_idx++;
5768 }
5769 } else {
5770 /* Send GA_NXT to the switch */
5771 rval = qla2x00_ga_nxt(vha, new_fcport);
5772 if (rval != QLA_SUCCESS) {
5773 ql_log(ql_log_warn, vha, 0x209e,
5774 "SNS scan failed -- assuming "
5775 "zero-entry result.\n");
5776 rval = QLA_SUCCESS;
5777 break;
5778 }
5779 }
5780
5781 /* If wrap on switch device list, exit. */
5782 if (first_dev) {
5783 wrap.b24 = new_fcport->d_id.b24;
5784 first_dev = 0;
5785 } else if (new_fcport->d_id.b24 == wrap.b24) {
5786 ql_dbg(ql_dbg_disc, vha, 0x209f,
5787 "Device wrap (%02x%02x%02x).\n",
5788 new_fcport->d_id.b.domain,
5789 new_fcport->d_id.b.area,
5790 new_fcport->d_id.b.al_pa);
5791 break;
5792 }
5793
5794 /* Bypass if same physical adapter. */
5795 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5796 continue;
5797
5798 /* Bypass virtual ports of the same host. */
5799 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5800 continue;
5801
5802 /* Bypass if same domain and area of adapter. */
5803 if (((new_fcport->d_id.b24 & 0xffff00) ==
5804 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5805 ISP_CFG_FL)
5806 continue;
5807
5808 /* Bypass reserved domain fields. */
5809 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5810 continue;
5811
5812 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
5813 if (ql2xgffidenable &&
5814 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
5815 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
5816 continue;
5817
5818 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5819
5820 /* Locate matching device in database. */
5821 found = 0;
5822 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5823 if (memcmp(new_fcport->port_name, fcport->port_name,
5824 WWN_SIZE))
5825 continue;
5826
5827 fcport->scan_state = QLA_FCPORT_FOUND;
5828
5829 found++;
5830
5831 /* Update port state. */
5832 memcpy(fcport->fabric_port_name,
5833 new_fcport->fabric_port_name, WWN_SIZE);
5834 fcport->fp_speed = new_fcport->fp_speed;
5835
5836 /*
5837 * If address the same and state FCS_ONLINE
5838 * (or in target mode), nothing changed.
5839 */
5840 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
5841 (atomic_read(&fcport->state) == FCS_ONLINE ||
5842 (vha->host->active_mode == MODE_TARGET))) {
5843 break;
5844 }
5845
5846 /*
5847 * If device was not a fabric device before.
5848 */
5849 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5850 fcport->d_id.b24 = new_fcport->d_id.b24;
5851 qla2x00_clear_loop_id(fcport);
5852 fcport->flags |= (FCF_FABRIC_DEVICE |
5853 FCF_LOGIN_NEEDED);
5854 break;
5855 }
5856
5857 /*
5858 * Port ID changed or device was marked to be updated;
5859 * Log it out if still logged in and mark it for
5860 * relogin later.
5861 */
5862 if (qla_tgt_mode_enabled(base_vha)) {
5863 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5864 "port changed FC ID, %8phC"
5865 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5866 fcport->port_name,
5867 fcport->d_id.b.domain,
5868 fcport->d_id.b.area,
5869 fcport->d_id.b.al_pa,
5870 fcport->loop_id,
5871 new_fcport->d_id.b.domain,
5872 new_fcport->d_id.b.area,
5873 new_fcport->d_id.b.al_pa);
5874 fcport->d_id.b24 = new_fcport->d_id.b24;
5875 break;
5876 }
5877
5878 fcport->d_id.b24 = new_fcport->d_id.b24;
5879 fcport->flags |= FCF_LOGIN_NEEDED;
5880 break;
5881 }
5882
5883 if (NVME_TARGET(vha->hw, fcport)) {
5884 if (fcport->disc_state == DSC_DELETE_PEND) {
5885 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
5886 vha->fcport_count--;
5887 fcport->login_succ = 0;
5888 }
5889 }
5890
5891 if (found) {
5892 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5893 continue;
5894 }
5895 /* If device was not in our fcports list, then add it. */
5896 new_fcport->scan_state = QLA_FCPORT_FOUND;
5897 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5898
5899 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5900
5901
5902 /* Allocate a new replacement fcport. */
5903 nxt_d_id.b24 = new_fcport->d_id.b24;
5904 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5905 if (new_fcport == NULL) {
5906 ql_log(ql_log_warn, vha, 0xd032,
5907 "Memory allocation failed for fcport.\n");
5908 return (QLA_MEMORY_ALLOC_FAILED);
5909 }
5910 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5911 new_fcport->d_id.b24 = nxt_d_id.b24;
5912 }
5913
5914 qla2x00_free_fcport(new_fcport);
5915
5916 /*
5917 * Logout all previous fabric dev marked lost, except FCP2 devices.
5918 */
5919 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5920 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5921 break;
5922
5923 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
5924 continue;
5925
5926 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5927 if ((qla_dual_mode_enabled(vha) ||
5928 qla_ini_mode_enabled(vha)) &&
5929 atomic_read(&fcport->state) == FCS_ONLINE) {
5930 qla2x00_mark_device_lost(vha, fcport,
5931 ql2xplogiabsentdevice);
5932 if (fcport->loop_id != FC_NO_LOOP_ID &&
5933 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5934 fcport->port_type != FCT_INITIATOR &&
5935 fcport->port_type != FCT_BROADCAST) {
5936 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5937 "%s %d %8phC post del sess\n",
5938 __func__, __LINE__,
5939 fcport->port_name);
5940 qlt_schedule_sess_for_deletion(fcport);
5941 continue;
5942 }
5943 }
5944 }
5945
5946 if (fcport->scan_state == QLA_FCPORT_FOUND &&
5947 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
5948 qla24xx_fcport_handle_login(vha, fcport);
5949 }
5950 return (rval);
5951 }
5952
5953 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
5954 int
5955 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
5956 {
5957 int loop_id = FC_NO_LOOP_ID;
5958 int lid = NPH_MGMT_SERVER - vha->vp_idx;
5959 unsigned long flags;
5960 struct qla_hw_data *ha = vha->hw;
5961
5962 if (vha->vp_idx == 0) {
5963 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
5964 return NPH_MGMT_SERVER;
5965 }
5966
5967 /* pick id from high and work down to low */
5968 spin_lock_irqsave(&ha->vport_slock, flags);
5969 for (; lid > 0; lid--) {
5970 if (!test_bit(lid, vha->hw->loop_id_map)) {
5971 set_bit(lid, vha->hw->loop_id_map);
5972 loop_id = lid;
5973 break;
5974 }
5975 }
5976 spin_unlock_irqrestore(&ha->vport_slock, flags);
5977
5978 return loop_id;
5979 }
5980
5981 /*
5982 * qla2x00_fabric_login
5983 * Issue fabric login command.
5984 *
5985 * Input:
5986 * ha = adapter block pointer.
5987 * device = pointer to FC device type structure.
5988 *
5989 * Returns:
5990 * 0 - Login successfully
5991 * 1 - Login failed
5992 * 2 - Initiator device
5993 * 3 - Fatal error
5994 */
5995 int
5996 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
5997 uint16_t *next_loopid)
5998 {
5999 int rval;
6000 int retry;
6001 uint16_t tmp_loopid;
6002 uint16_t mb[MAILBOX_REGISTER_COUNT];
6003 struct qla_hw_data *ha = vha->hw;
6004
6005 retry = 0;
6006 tmp_loopid = 0;
6007
6008 for (;;) {
6009 ql_dbg(ql_dbg_disc, vha, 0x2000,
6010 "Trying Fabric Login w/loop id 0x%04x for port "
6011 "%02x%02x%02x.\n",
6012 fcport->loop_id, fcport->d_id.b.domain,
6013 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6014
6015 /* Login fcport on switch. */
6016 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6017 fcport->d_id.b.domain, fcport->d_id.b.area,
6018 fcport->d_id.b.al_pa, mb, BIT_0);
6019 if (rval != QLA_SUCCESS) {
6020 return rval;
6021 }
6022 if (mb[0] == MBS_PORT_ID_USED) {
6023 /*
6024 * Device has another loop ID. The firmware team
6025 * recommends the driver perform an implicit login with
6026 * the specified ID again. The ID we just used is save
6027 * here so we return with an ID that can be tried by
6028 * the next login.
6029 */
6030 retry++;
6031 tmp_loopid = fcport->loop_id;
6032 fcport->loop_id = mb[1];
6033
6034 ql_dbg(ql_dbg_disc, vha, 0x2001,
6035 "Fabric Login: port in use - next loop "
6036 "id=0x%04x, port id= %02x%02x%02x.\n",
6037 fcport->loop_id, fcport->d_id.b.domain,
6038 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6039
6040 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
6041 /*
6042 * Login succeeded.
6043 */
6044 if (retry) {
6045 /* A retry occurred before. */
6046 *next_loopid = tmp_loopid;
6047 } else {
6048 /*
6049 * No retry occurred before. Just increment the
6050 * ID value for next login.
6051 */
6052 *next_loopid = (fcport->loop_id + 1);
6053 }
6054
6055 if (mb[1] & BIT_0) {
6056 fcport->port_type = FCT_INITIATOR;
6057 } else {
6058 fcport->port_type = FCT_TARGET;
6059 if (mb[1] & BIT_1) {
6060 fcport->flags |= FCF_FCP2_DEVICE;
6061 }
6062 }
6063
6064 if (mb[10] & BIT_0)
6065 fcport->supported_classes |= FC_COS_CLASS2;
6066 if (mb[10] & BIT_1)
6067 fcport->supported_classes |= FC_COS_CLASS3;
6068
6069 if (IS_FWI2_CAPABLE(ha)) {
6070 if (mb[10] & BIT_7)
6071 fcport->flags |=
6072 FCF_CONF_COMP_SUPPORTED;
6073 }
6074
6075 rval = QLA_SUCCESS;
6076 break;
6077 } else if (mb[0] == MBS_LOOP_ID_USED) {
6078 /*
6079 * Loop ID already used, try next loop ID.
6080 */
6081 fcport->loop_id++;
6082 rval = qla2x00_find_new_loop_id(vha, fcport);
6083 if (rval != QLA_SUCCESS) {
6084 /* Ran out of loop IDs to use */
6085 break;
6086 }
6087 } else if (mb[0] == MBS_COMMAND_ERROR) {
6088 /*
6089 * Firmware possibly timed out during login. If NO
6090 * retries are left to do then the device is declared
6091 * dead.
6092 */
6093 *next_loopid = fcport->loop_id;
6094 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6095 fcport->d_id.b.domain, fcport->d_id.b.area,
6096 fcport->d_id.b.al_pa);
6097 qla2x00_mark_device_lost(vha, fcport, 1);
6098
6099 rval = 1;
6100 break;
6101 } else {
6102 /*
6103 * unrecoverable / not handled error
6104 */
6105 ql_dbg(ql_dbg_disc, vha, 0x2002,
6106 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6107 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6108 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6109 fcport->loop_id, jiffies);
6110
6111 *next_loopid = fcport->loop_id;
6112 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6113 fcport->d_id.b.domain, fcport->d_id.b.area,
6114 fcport->d_id.b.al_pa);
6115 qla2x00_clear_loop_id(fcport);
6116 fcport->login_retry = 0;
6117
6118 rval = 3;
6119 break;
6120 }
6121 }
6122
6123 return (rval);
6124 }
6125
6126 /*
6127 * qla2x00_local_device_login
6128 * Issue local device login command.
6129 *
6130 * Input:
6131 * ha = adapter block pointer.
6132 * loop_id = loop id of device to login to.
6133 *
6134 * Returns (Where's the #define!!!!):
6135 * 0 - Login successfully
6136 * 1 - Login failed
6137 * 3 - Fatal error
6138 */
6139 int
6140 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6141 {
6142 int rval;
6143 uint16_t mb[MAILBOX_REGISTER_COUNT];
6144
6145 memset(mb, 0, sizeof(mb));
6146 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6147 if (rval == QLA_SUCCESS) {
6148 /* Interrogate mailbox registers for any errors */
6149 if (mb[0] == MBS_COMMAND_ERROR)
6150 rval = 1;
6151 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6152 /* device not in PCB table */
6153 rval = 3;
6154 }
6155
6156 return (rval);
6157 }
6158
6159 /*
6160 * qla2x00_loop_resync
6161 * Resync with fibre channel devices.
6162 *
6163 * Input:
6164 * ha = adapter block pointer.
6165 *
6166 * Returns:
6167 * 0 = success
6168 */
6169 int
6170 qla2x00_loop_resync(scsi_qla_host_t *vha)
6171 {
6172 int rval = QLA_SUCCESS;
6173 uint32_t wait_time;
6174
6175 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6176 if (vha->flags.online) {
6177 if (!(rval = qla2x00_fw_ready(vha))) {
6178 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6179 wait_time = 256;
6180 do {
6181 if (!IS_QLAFX00(vha->hw)) {
6182 /*
6183 * Issue a marker after FW becomes
6184 * ready.
6185 */
6186 qla2x00_marker(vha, vha->hw->base_qpair,
6187 0, 0, MK_SYNC_ALL);
6188 vha->marker_needed = 0;
6189 }
6190
6191 /* Remap devices on Loop. */
6192 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6193
6194 if (IS_QLAFX00(vha->hw))
6195 qlafx00_configure_devices(vha);
6196 else
6197 qla2x00_configure_loop(vha);
6198
6199 wait_time--;
6200 } while (!atomic_read(&vha->loop_down_timer) &&
6201 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6202 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6203 &vha->dpc_flags)));
6204 }
6205 }
6206
6207 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6208 return (QLA_FUNCTION_FAILED);
6209
6210 if (rval)
6211 ql_dbg(ql_dbg_disc, vha, 0x206c,
6212 "%s *** FAILED ***.\n", __func__);
6213
6214 return (rval);
6215 }
6216
6217 /*
6218 * qla2x00_perform_loop_resync
6219 * Description: This function will set the appropriate flags and call
6220 * qla2x00_loop_resync. If successful loop will be resynced
6221 * Arguments : scsi_qla_host_t pointer
6222 * returm : Success or Failure
6223 */
6224
6225 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6226 {
6227 int32_t rval = 0;
6228
6229 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6230 /*Configure the flags so that resync happens properly*/
6231 atomic_set(&ha->loop_down_timer, 0);
6232 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6233 atomic_set(&ha->loop_state, LOOP_UP);
6234 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6235 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6236 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6237
6238 rval = qla2x00_loop_resync(ha);
6239 } else
6240 atomic_set(&ha->loop_state, LOOP_DEAD);
6241
6242 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6243 }
6244
6245 return rval;
6246 }
6247
6248 void
6249 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6250 {
6251 fc_port_t *fcport;
6252 struct scsi_qla_host *vha;
6253 struct qla_hw_data *ha = base_vha->hw;
6254 unsigned long flags;
6255
6256 spin_lock_irqsave(&ha->vport_slock, flags);
6257 /* Go with deferred removal of rport references. */
6258 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6259 atomic_inc(&vha->vref_count);
6260 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6261 if (fcport->drport &&
6262 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6263 spin_unlock_irqrestore(&ha->vport_slock, flags);
6264 qla2x00_rport_del(fcport);
6265
6266 spin_lock_irqsave(&ha->vport_slock, flags);
6267 }
6268 }
6269 atomic_dec(&vha->vref_count);
6270 wake_up(&vha->vref_waitq);
6271 }
6272 spin_unlock_irqrestore(&ha->vport_slock, flags);
6273 }
6274
6275 /* Assumes idc_lock always held on entry */
6276 void
6277 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6278 {
6279 struct qla_hw_data *ha = vha->hw;
6280 uint32_t drv_presence, drv_presence_mask;
6281 uint32_t dev_part_info1, dev_part_info2, class_type;
6282 uint32_t class_type_mask = 0x3;
6283 uint16_t fcoe_other_function = 0xffff, i;
6284
6285 if (IS_QLA8044(ha)) {
6286 drv_presence = qla8044_rd_direct(vha,
6287 QLA8044_CRB_DRV_ACTIVE_INDEX);
6288 dev_part_info1 = qla8044_rd_direct(vha,
6289 QLA8044_CRB_DEV_PART_INFO_INDEX);
6290 dev_part_info2 = qla8044_rd_direct(vha,
6291 QLA8044_CRB_DEV_PART_INFO2);
6292 } else {
6293 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6294 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6295 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6296 }
6297 for (i = 0; i < 8; i++) {
6298 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6299 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6300 (i != ha->portnum)) {
6301 fcoe_other_function = i;
6302 break;
6303 }
6304 }
6305 if (fcoe_other_function == 0xffff) {
6306 for (i = 0; i < 8; i++) {
6307 class_type = ((dev_part_info2 >> (i * 4)) &
6308 class_type_mask);
6309 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6310 ((i + 8) != ha->portnum)) {
6311 fcoe_other_function = i + 8;
6312 break;
6313 }
6314 }
6315 }
6316 /*
6317 * Prepare drv-presence mask based on fcoe functions present.
6318 * However consider only valid physical fcoe function numbers (0-15).
6319 */
6320 drv_presence_mask = ~((1 << (ha->portnum)) |
6321 ((fcoe_other_function == 0xffff) ?
6322 0 : (1 << (fcoe_other_function))));
6323
6324 /* We are the reset owner iff:
6325 * - No other protocol drivers present.
6326 * - This is the lowest among fcoe functions. */
6327 if (!(drv_presence & drv_presence_mask) &&
6328 (ha->portnum < fcoe_other_function)) {
6329 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6330 "This host is Reset owner.\n");
6331 ha->flags.nic_core_reset_owner = 1;
6332 }
6333 }
6334
6335 static int
6336 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6337 {
6338 int rval = QLA_SUCCESS;
6339 struct qla_hw_data *ha = vha->hw;
6340 uint32_t drv_ack;
6341
6342 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6343 if (rval == QLA_SUCCESS) {
6344 drv_ack |= (1 << ha->portnum);
6345 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6346 }
6347
6348 return rval;
6349 }
6350
6351 static int
6352 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6353 {
6354 int rval = QLA_SUCCESS;
6355 struct qla_hw_data *ha = vha->hw;
6356 uint32_t drv_ack;
6357
6358 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6359 if (rval == QLA_SUCCESS) {
6360 drv_ack &= ~(1 << ha->portnum);
6361 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6362 }
6363
6364 return rval;
6365 }
6366
6367 static const char *
6368 qla83xx_dev_state_to_string(uint32_t dev_state)
6369 {
6370 switch (dev_state) {
6371 case QLA8XXX_DEV_COLD:
6372 return "COLD/RE-INIT";
6373 case QLA8XXX_DEV_INITIALIZING:
6374 return "INITIALIZING";
6375 case QLA8XXX_DEV_READY:
6376 return "READY";
6377 case QLA8XXX_DEV_NEED_RESET:
6378 return "NEED RESET";
6379 case QLA8XXX_DEV_NEED_QUIESCENT:
6380 return "NEED QUIESCENT";
6381 case QLA8XXX_DEV_FAILED:
6382 return "FAILED";
6383 case QLA8XXX_DEV_QUIESCENT:
6384 return "QUIESCENT";
6385 default:
6386 return "Unknown";
6387 }
6388 }
6389
6390 /* Assumes idc-lock always held on entry */
6391 void
6392 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6393 {
6394 struct qla_hw_data *ha = vha->hw;
6395 uint32_t idc_audit_reg = 0, duration_secs = 0;
6396
6397 switch (audit_type) {
6398 case IDC_AUDIT_TIMESTAMP:
6399 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6400 idc_audit_reg = (ha->portnum) |
6401 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6402 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6403 break;
6404
6405 case IDC_AUDIT_COMPLETION:
6406 duration_secs = ((jiffies_to_msecs(jiffies) -
6407 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6408 idc_audit_reg = (ha->portnum) |
6409 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6410 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6411 break;
6412
6413 default:
6414 ql_log(ql_log_warn, vha, 0xb078,
6415 "Invalid audit type specified.\n");
6416 break;
6417 }
6418 }
6419
6420 /* Assumes idc_lock always held on entry */
6421 static int
6422 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6423 {
6424 struct qla_hw_data *ha = vha->hw;
6425 uint32_t idc_control, dev_state;
6426
6427 __qla83xx_get_idc_control(vha, &idc_control);
6428 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6429 ql_log(ql_log_info, vha, 0xb080,
6430 "NIC Core reset has been disabled. idc-control=0x%x\n",
6431 idc_control);
6432 return QLA_FUNCTION_FAILED;
6433 }
6434
6435 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6436 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6437 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6438 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6439 QLA8XXX_DEV_NEED_RESET);
6440 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6441 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6442 } else {
6443 const char *state = qla83xx_dev_state_to_string(dev_state);
6444
6445 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6446
6447 /* SV: XXX: Is timeout required here? */
6448 /* Wait for IDC state change READY -> NEED_RESET */
6449 while (dev_state == QLA8XXX_DEV_READY) {
6450 qla83xx_idc_unlock(vha, 0);
6451 msleep(200);
6452 qla83xx_idc_lock(vha, 0);
6453 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6454 }
6455 }
6456
6457 /* Send IDC ack by writing to drv-ack register */
6458 __qla83xx_set_drv_ack(vha);
6459
6460 return QLA_SUCCESS;
6461 }
6462
6463 int
6464 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6465 {
6466 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6467 }
6468
6469 int
6470 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6471 {
6472 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6473 }
6474
6475 static int
6476 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6477 {
6478 uint32_t drv_presence = 0;
6479 struct qla_hw_data *ha = vha->hw;
6480
6481 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6482 if (drv_presence & (1 << ha->portnum))
6483 return QLA_SUCCESS;
6484 else
6485 return QLA_TEST_FAILED;
6486 }
6487
6488 int
6489 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6490 {
6491 int rval = QLA_SUCCESS;
6492 struct qla_hw_data *ha = vha->hw;
6493
6494 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6495 "Entered %s().\n", __func__);
6496
6497 if (vha->device_flags & DFLG_DEV_FAILED) {
6498 ql_log(ql_log_warn, vha, 0xb059,
6499 "Device in unrecoverable FAILED state.\n");
6500 return QLA_FUNCTION_FAILED;
6501 }
6502
6503 qla83xx_idc_lock(vha, 0);
6504
6505 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6506 ql_log(ql_log_warn, vha, 0xb05a,
6507 "Function=0x%x has been removed from IDC participation.\n",
6508 ha->portnum);
6509 rval = QLA_FUNCTION_FAILED;
6510 goto exit;
6511 }
6512
6513 qla83xx_reset_ownership(vha);
6514
6515 rval = qla83xx_initiating_reset(vha);
6516
6517 /*
6518 * Perform reset if we are the reset-owner,
6519 * else wait till IDC state changes to READY/FAILED.
6520 */
6521 if (rval == QLA_SUCCESS) {
6522 rval = qla83xx_idc_state_handler(vha);
6523
6524 if (rval == QLA_SUCCESS)
6525 ha->flags.nic_core_hung = 0;
6526 __qla83xx_clear_drv_ack(vha);
6527 }
6528
6529 exit:
6530 qla83xx_idc_unlock(vha, 0);
6531
6532 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6533
6534 return rval;
6535 }
6536
6537 int
6538 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6539 {
6540 struct qla_hw_data *ha = vha->hw;
6541 int rval = QLA_FUNCTION_FAILED;
6542
6543 if (!IS_MCTP_CAPABLE(ha)) {
6544 /* This message can be removed from the final version */
6545 ql_log(ql_log_info, vha, 0x506d,
6546 "This board is not MCTP capable\n");
6547 return rval;
6548 }
6549
6550 if (!ha->mctp_dump) {
6551 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6552 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6553
6554 if (!ha->mctp_dump) {
6555 ql_log(ql_log_warn, vha, 0x506e,
6556 "Failed to allocate memory for mctp dump\n");
6557 return rval;
6558 }
6559 }
6560
6561 #define MCTP_DUMP_STR_ADDR 0x00000000
6562 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6563 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6564 if (rval != QLA_SUCCESS) {
6565 ql_log(ql_log_warn, vha, 0x506f,
6566 "Failed to capture mctp dump\n");
6567 } else {
6568 ql_log(ql_log_info, vha, 0x5070,
6569 "Mctp dump capture for host (%ld/%p).\n",
6570 vha->host_no, ha->mctp_dump);
6571 ha->mctp_dumped = 1;
6572 }
6573
6574 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6575 ha->flags.nic_core_reset_hdlr_active = 1;
6576 rval = qla83xx_restart_nic_firmware(vha);
6577 if (rval)
6578 /* NIC Core reset failed. */
6579 ql_log(ql_log_warn, vha, 0x5071,
6580 "Failed to restart nic firmware\n");
6581 else
6582 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6583 "Restarted NIC firmware successfully.\n");
6584 ha->flags.nic_core_reset_hdlr_active = 0;
6585 }
6586
6587 return rval;
6588
6589 }
6590
6591 /*
6592 * qla2x00_quiesce_io
6593 * Description: This function will block the new I/Os
6594 * Its not aborting any I/Os as context
6595 * is not destroyed during quiescence
6596 * Arguments: scsi_qla_host_t
6597 * return : void
6598 */
6599 void
6600 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6601 {
6602 struct qla_hw_data *ha = vha->hw;
6603 struct scsi_qla_host *vp;
6604
6605 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6606 "Quiescing I/O - ha=%p.\n", ha);
6607
6608 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6609 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6610 atomic_set(&vha->loop_state, LOOP_DOWN);
6611 qla2x00_mark_all_devices_lost(vha);
6612 list_for_each_entry(vp, &ha->vp_list, list)
6613 qla2x00_mark_all_devices_lost(vp);
6614 } else {
6615 if (!atomic_read(&vha->loop_down_timer))
6616 atomic_set(&vha->loop_down_timer,
6617 LOOP_DOWN_TIME);
6618 }
6619 /* Wait for pending cmds to complete */
6620 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
6621 != QLA_SUCCESS);
6622 }
6623
6624 void
6625 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6626 {
6627 struct qla_hw_data *ha = vha->hw;
6628 struct scsi_qla_host *vp;
6629 unsigned long flags;
6630 fc_port_t *fcport;
6631 u16 i;
6632
6633 /* For ISP82XX, driver waits for completion of the commands.
6634 * online flag should be set.
6635 */
6636 if (!(IS_P3P_TYPE(ha)))
6637 vha->flags.online = 0;
6638 ha->flags.chip_reset_done = 0;
6639 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6640 vha->qla_stats.total_isp_aborts++;
6641
6642 ql_log(ql_log_info, vha, 0x00af,
6643 "Performing ISP error recovery - ha=%p.\n", ha);
6644
6645 ha->flags.purge_mbox = 1;
6646 /* For ISP82XX, reset_chip is just disabling interrupts.
6647 * Driver waits for the completion of the commands.
6648 * the interrupts need to be enabled.
6649 */
6650 if (!(IS_P3P_TYPE(ha)))
6651 ha->isp_ops->reset_chip(vha);
6652
6653 ha->link_data_rate = PORT_SPEED_UNKNOWN;
6654 SAVE_TOPO(ha);
6655 ha->flags.rida_fmt2 = 0;
6656 ha->flags.n2n_ae = 0;
6657 ha->flags.lip_ae = 0;
6658 ha->current_topology = 0;
6659 ha->flags.fw_started = 0;
6660 ha->flags.fw_init_done = 0;
6661 ha->chip_reset++;
6662 ha->base_qpair->chip_reset = ha->chip_reset;
6663 for (i = 0; i < ha->max_qpairs; i++) {
6664 if (ha->queue_pair_map[i])
6665 ha->queue_pair_map[i]->chip_reset =
6666 ha->base_qpair->chip_reset;
6667 }
6668
6669 /* purge MBox commands */
6670 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6671 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6672 complete(&ha->mbx_intr_comp);
6673 }
6674
6675 i = 0;
6676 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6677 atomic_read(&ha->num_pend_mbx_stage2) ||
6678 atomic_read(&ha->num_pend_mbx_stage1)) {
6679 msleep(20);
6680 i++;
6681 if (i > 50)
6682 break;
6683 }
6684 ha->flags.purge_mbox = 0;
6685
6686 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6687 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6688 atomic_set(&vha->loop_state, LOOP_DOWN);
6689 qla2x00_mark_all_devices_lost(vha);
6690
6691 spin_lock_irqsave(&ha->vport_slock, flags);
6692 list_for_each_entry(vp, &ha->vp_list, list) {
6693 atomic_inc(&vp->vref_count);
6694 spin_unlock_irqrestore(&ha->vport_slock, flags);
6695
6696 qla2x00_mark_all_devices_lost(vp);
6697
6698 spin_lock_irqsave(&ha->vport_slock, flags);
6699 atomic_dec(&vp->vref_count);
6700 }
6701 spin_unlock_irqrestore(&ha->vport_slock, flags);
6702 } else {
6703 if (!atomic_read(&vha->loop_down_timer))
6704 atomic_set(&vha->loop_down_timer,
6705 LOOP_DOWN_TIME);
6706 }
6707
6708 /* Clear all async request states across all VPs. */
6709 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6710 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6711 fcport->scan_state = 0;
6712 }
6713 spin_lock_irqsave(&ha->vport_slock, flags);
6714 list_for_each_entry(vp, &ha->vp_list, list) {
6715 atomic_inc(&vp->vref_count);
6716 spin_unlock_irqrestore(&ha->vport_slock, flags);
6717
6718 list_for_each_entry(fcport, &vp->vp_fcports, list)
6719 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6720
6721 spin_lock_irqsave(&ha->vport_slock, flags);
6722 atomic_dec(&vp->vref_count);
6723 }
6724 spin_unlock_irqrestore(&ha->vport_slock, flags);
6725
6726 if (!ha->flags.eeh_busy) {
6727 /* Make sure for ISP 82XX IO DMA is complete */
6728 if (IS_P3P_TYPE(ha)) {
6729 qla82xx_chip_reset_cleanup(vha);
6730 ql_log(ql_log_info, vha, 0x00b4,
6731 "Done chip reset cleanup.\n");
6732
6733 /* Done waiting for pending commands.
6734 * Reset the online flag.
6735 */
6736 vha->flags.online = 0;
6737 }
6738
6739 /* Requeue all commands in outstanding command list. */
6740 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6741 }
6742 /* memory barrier */
6743 wmb();
6744 }
6745
6746 /*
6747 * qla2x00_abort_isp
6748 * Resets ISP and aborts all outstanding commands.
6749 *
6750 * Input:
6751 * ha = adapter block pointer.
6752 *
6753 * Returns:
6754 * 0 = success
6755 */
6756 int
6757 qla2x00_abort_isp(scsi_qla_host_t *vha)
6758 {
6759 int rval;
6760 uint8_t status = 0;
6761 struct qla_hw_data *ha = vha->hw;
6762 struct scsi_qla_host *vp;
6763 struct req_que *req = ha->req_q_map[0];
6764 unsigned long flags;
6765
6766 if (vha->flags.online) {
6767 qla2x00_abort_isp_cleanup(vha);
6768
6769 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
6770 ha->flags.chip_reset_done = 1;
6771 vha->flags.online = 1;
6772 status = 0;
6773 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6774 return status;
6775 }
6776
6777 if (IS_QLA8031(ha)) {
6778 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6779 "Clearing fcoe driver presence.\n");
6780 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6781 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6782 "Error while clearing DRV-Presence.\n");
6783 }
6784
6785 if (unlikely(pci_channel_offline(ha->pdev) &&
6786 ha->flags.pci_channel_io_perm_failure)) {
6787 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6788 status = 0;
6789 return status;
6790 }
6791
6792 switch (vha->qlini_mode) {
6793 case QLA2XXX_INI_MODE_DISABLED:
6794 if (!qla_tgt_mode_enabled(vha))
6795 return 0;
6796 break;
6797 case QLA2XXX_INI_MODE_DUAL:
6798 if (!qla_dual_mode_enabled(vha))
6799 return 0;
6800 break;
6801 case QLA2XXX_INI_MODE_ENABLED:
6802 default:
6803 break;
6804 }
6805
6806 ha->isp_ops->get_flash_version(vha, req->ring);
6807
6808 ha->isp_ops->nvram_config(vha);
6809
6810 if (!qla2x00_restart_isp(vha)) {
6811 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6812
6813 if (!atomic_read(&vha->loop_down_timer)) {
6814 /*
6815 * Issue marker command only when we are going
6816 * to start the I/O .
6817 */
6818 vha->marker_needed = 1;
6819 }
6820
6821 vha->flags.online = 1;
6822
6823 ha->isp_ops->enable_intrs(ha);
6824
6825 ha->isp_abort_cnt = 0;
6826 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6827
6828 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6829 qla2x00_get_fw_version(vha);
6830 if (ha->fce) {
6831 ha->flags.fce_enabled = 1;
6832 memset(ha->fce, 0,
6833 fce_calc_size(ha->fce_bufs));
6834 rval = qla2x00_enable_fce_trace(vha,
6835 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6836 &ha->fce_bufs);
6837 if (rval) {
6838 ql_log(ql_log_warn, vha, 0x8033,
6839 "Unable to reinitialize FCE "
6840 "(%d).\n", rval);
6841 ha->flags.fce_enabled = 0;
6842 }
6843 }
6844
6845 if (ha->eft) {
6846 memset(ha->eft, 0, EFT_SIZE);
6847 rval = qla2x00_enable_eft_trace(vha,
6848 ha->eft_dma, EFT_NUM_BUFFERS);
6849 if (rval) {
6850 ql_log(ql_log_warn, vha, 0x8034,
6851 "Unable to reinitialize EFT "
6852 "(%d).\n", rval);
6853 }
6854 }
6855 } else { /* failed the ISP abort */
6856 vha->flags.online = 1;
6857 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
6858 if (ha->isp_abort_cnt == 0) {
6859 ql_log(ql_log_fatal, vha, 0x8035,
6860 "ISP error recover failed - "
6861 "board disabled.\n");
6862 /*
6863 * The next call disables the board
6864 * completely.
6865 */
6866 qla2x00_abort_isp_cleanup(vha);
6867 vha->flags.online = 0;
6868 clear_bit(ISP_ABORT_RETRY,
6869 &vha->dpc_flags);
6870 status = 0;
6871 } else { /* schedule another ISP abort */
6872 ha->isp_abort_cnt--;
6873 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6874 "ISP abort - retry remaining %d.\n",
6875 ha->isp_abort_cnt);
6876 status = 1;
6877 }
6878 } else {
6879 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
6880 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6881 "ISP error recovery - retrying (%d) "
6882 "more times.\n", ha->isp_abort_cnt);
6883 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6884 status = 1;
6885 }
6886 }
6887
6888 }
6889
6890 if (!status) {
6891 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
6892 qla2x00_configure_hba(vha);
6893 spin_lock_irqsave(&ha->vport_slock, flags);
6894 list_for_each_entry(vp, &ha->vp_list, list) {
6895 if (vp->vp_idx) {
6896 atomic_inc(&vp->vref_count);
6897 spin_unlock_irqrestore(&ha->vport_slock, flags);
6898
6899 qla2x00_vp_abort_isp(vp);
6900
6901 spin_lock_irqsave(&ha->vport_slock, flags);
6902 atomic_dec(&vp->vref_count);
6903 }
6904 }
6905 spin_unlock_irqrestore(&ha->vport_slock, flags);
6906
6907 if (IS_QLA8031(ha)) {
6908 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6909 "Setting back fcoe driver presence.\n");
6910 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6911 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6912 "Error while setting DRV-Presence.\n");
6913 }
6914 } else {
6915 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6916 __func__);
6917 }
6918
6919 return(status);
6920 }
6921
6922 /*
6923 * qla2x00_restart_isp
6924 * restarts the ISP after a reset
6925 *
6926 * Input:
6927 * ha = adapter block pointer.
6928 *
6929 * Returns:
6930 * 0 = success
6931 */
6932 static int
6933 qla2x00_restart_isp(scsi_qla_host_t *vha)
6934 {
6935 int status = 0;
6936 struct qla_hw_data *ha = vha->hw;
6937
6938 /* If firmware needs to be loaded */
6939 if (qla2x00_isp_firmware(vha)) {
6940 vha->flags.online = 0;
6941 status = ha->isp_ops->chip_diag(vha);
6942 if (!status)
6943 status = qla2x00_setup_chip(vha);
6944 }
6945
6946 if (!status && !(status = qla2x00_init_rings(vha))) {
6947 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6948 ha->flags.chip_reset_done = 1;
6949
6950 /* Initialize the queues in use */
6951 qla25xx_init_queues(ha);
6952
6953 status = qla2x00_fw_ready(vha);
6954 if (!status) {
6955 /* Issue a marker after FW becomes ready. */
6956 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
6957 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6958 }
6959
6960 /* if no cable then assume it's good */
6961 if ((vha->device_flags & DFLG_NO_CABLE))
6962 status = 0;
6963 }
6964 return (status);
6965 }
6966
6967 static int
6968 qla25xx_init_queues(struct qla_hw_data *ha)
6969 {
6970 struct rsp_que *rsp = NULL;
6971 struct req_que *req = NULL;
6972 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6973 int ret = -1;
6974 int i;
6975
6976 for (i = 1; i < ha->max_rsp_queues; i++) {
6977 rsp = ha->rsp_q_map[i];
6978 if (rsp && test_bit(i, ha->rsp_qid_map)) {
6979 rsp->options &= ~BIT_0;
6980 ret = qla25xx_init_rsp_que(base_vha, rsp);
6981 if (ret != QLA_SUCCESS)
6982 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6983 "%s Rsp que: %d init failed.\n",
6984 __func__, rsp->id);
6985 else
6986 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6987 "%s Rsp que: %d inited.\n",
6988 __func__, rsp->id);
6989 }
6990 }
6991 for (i = 1; i < ha->max_req_queues; i++) {
6992 req = ha->req_q_map[i];
6993 if (req && test_bit(i, ha->req_qid_map)) {
6994 /* Clear outstanding commands array. */
6995 req->options &= ~BIT_0;
6996 ret = qla25xx_init_req_que(base_vha, req);
6997 if (ret != QLA_SUCCESS)
6998 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6999 "%s Req que: %d init failed.\n",
7000 __func__, req->id);
7001 else
7002 ql_dbg(ql_dbg_init, base_vha, 0x0102,
7003 "%s Req que: %d inited.\n",
7004 __func__, req->id);
7005 }
7006 }
7007 return ret;
7008 }
7009
7010 /*
7011 * qla2x00_reset_adapter
7012 * Reset adapter.
7013 *
7014 * Input:
7015 * ha = adapter block pointer.
7016 */
7017 int
7018 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7019 {
7020 unsigned long flags = 0;
7021 struct qla_hw_data *ha = vha->hw;
7022 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7023
7024 vha->flags.online = 0;
7025 ha->isp_ops->disable_intrs(ha);
7026
7027 spin_lock_irqsave(&ha->hardware_lock, flags);
7028 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
7029 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
7030 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
7031 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
7032 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7033
7034 return QLA_SUCCESS;
7035 }
7036
7037 int
7038 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7039 {
7040 unsigned long flags = 0;
7041 struct qla_hw_data *ha = vha->hw;
7042 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7043 int rval = QLA_SUCCESS;
7044
7045 if (IS_P3P_TYPE(ha))
7046 return rval;
7047
7048 vha->flags.online = 0;
7049 ha->isp_ops->disable_intrs(ha);
7050
7051 spin_lock_irqsave(&ha->hardware_lock, flags);
7052 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
7053 RD_REG_DWORD(&reg->hccr);
7054 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
7055 RD_REG_DWORD(&reg->hccr);
7056 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7057
7058 if (IS_NOPOLLING_TYPE(ha))
7059 ha->isp_ops->enable_intrs(ha);
7060
7061 return rval;
7062 }
7063
7064 /* On sparc systems, obtain port and node WWN from firmware
7065 * properties.
7066 */
7067 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7068 struct nvram_24xx *nv)
7069 {
7070 #ifdef CONFIG_SPARC
7071 struct qla_hw_data *ha = vha->hw;
7072 struct pci_dev *pdev = ha->pdev;
7073 struct device_node *dp = pci_device_to_OF_node(pdev);
7074 const u8 *val;
7075 int len;
7076
7077 val = of_get_property(dp, "port-wwn", &len);
7078 if (val && len >= WWN_SIZE)
7079 memcpy(nv->port_name, val, WWN_SIZE);
7080
7081 val = of_get_property(dp, "node-wwn", &len);
7082 if (val && len >= WWN_SIZE)
7083 memcpy(nv->node_name, val, WWN_SIZE);
7084 #endif
7085 }
7086
7087 int
7088 qla24xx_nvram_config(scsi_qla_host_t *vha)
7089 {
7090 int rval;
7091 struct init_cb_24xx *icb;
7092 struct nvram_24xx *nv;
7093 uint32_t *dptr;
7094 uint8_t *dptr1, *dptr2;
7095 uint32_t chksum;
7096 uint16_t cnt;
7097 struct qla_hw_data *ha = vha->hw;
7098
7099 rval = QLA_SUCCESS;
7100 icb = (struct init_cb_24xx *)ha->init_cb;
7101 nv = ha->nvram;
7102
7103 /* Determine NVRAM starting address. */
7104 if (ha->port_no == 0) {
7105 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7106 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7107 } else {
7108 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7109 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7110 }
7111
7112 ha->nvram_size = sizeof(*nv);
7113 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7114
7115 /* Get VPD data into cache */
7116 ha->vpd = ha->nvram + VPD_OFFSET;
7117 ha->isp_ops->read_nvram(vha, ha->vpd,
7118 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7119
7120 /* Get NVRAM data into cache and calculate checksum. */
7121 dptr = (uint32_t *)nv;
7122 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7123 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7124 chksum += le32_to_cpu(*dptr);
7125
7126 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7127 "Contents of NVRAM\n");
7128 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7129 nv, ha->nvram_size);
7130
7131 /* Bad NVRAM data, set defaults parameters. */
7132 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7133 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7134 /* Reset NVRAM data. */
7135 ql_log(ql_log_warn, vha, 0x006b,
7136 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7137 chksum, nv->id, nv->nvram_version);
7138 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7139 ql_log(ql_log_warn, vha, 0x006c,
7140 "Falling back to functioning (yet invalid -- WWPN) "
7141 "defaults.\n");
7142
7143 /*
7144 * Set default initialization control block.
7145 */
7146 memset(nv, 0, ha->nvram_size);
7147 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7148 nv->version = cpu_to_le16(ICB_VERSION);
7149 nv->frame_payload_size = 2048;
7150 nv->execution_throttle = cpu_to_le16(0xFFFF);
7151 nv->exchange_count = cpu_to_le16(0);
7152 nv->hard_address = cpu_to_le16(124);
7153 nv->port_name[0] = 0x21;
7154 nv->port_name[1] = 0x00 + ha->port_no + 1;
7155 nv->port_name[2] = 0x00;
7156 nv->port_name[3] = 0xe0;
7157 nv->port_name[4] = 0x8b;
7158 nv->port_name[5] = 0x1c;
7159 nv->port_name[6] = 0x55;
7160 nv->port_name[7] = 0x86;
7161 nv->node_name[0] = 0x20;
7162 nv->node_name[1] = 0x00;
7163 nv->node_name[2] = 0x00;
7164 nv->node_name[3] = 0xe0;
7165 nv->node_name[4] = 0x8b;
7166 nv->node_name[5] = 0x1c;
7167 nv->node_name[6] = 0x55;
7168 nv->node_name[7] = 0x86;
7169 qla24xx_nvram_wwn_from_ofw(vha, nv);
7170 nv->login_retry_count = cpu_to_le16(8);
7171 nv->interrupt_delay_timer = cpu_to_le16(0);
7172 nv->login_timeout = cpu_to_le16(0);
7173 nv->firmware_options_1 =
7174 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7175 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7176 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7177 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7178 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7179 nv->efi_parameters = cpu_to_le32(0);
7180 nv->reset_delay = 5;
7181 nv->max_luns_per_target = cpu_to_le16(128);
7182 nv->port_down_retry_count = cpu_to_le16(30);
7183 nv->link_down_timeout = cpu_to_le16(30);
7184
7185 rval = 1;
7186 }
7187
7188 if (qla_tgt_mode_enabled(vha)) {
7189 /* Don't enable full login after initial LIP */
7190 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7191 /* Don't enable LIP full login for initiator */
7192 nv->host_p &= cpu_to_le32(~BIT_10);
7193 }
7194
7195 qlt_24xx_config_nvram_stage1(vha, nv);
7196
7197 /* Reset Initialization control block */
7198 memset(icb, 0, ha->init_cb_size);
7199
7200 /* Copy 1st segment. */
7201 dptr1 = (uint8_t *)icb;
7202 dptr2 = (uint8_t *)&nv->version;
7203 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7204 while (cnt--)
7205 *dptr1++ = *dptr2++;
7206
7207 icb->login_retry_count = nv->login_retry_count;
7208 icb->link_down_on_nos = nv->link_down_on_nos;
7209
7210 /* Copy 2nd segment. */
7211 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7212 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7213 cnt = (uint8_t *)&icb->reserved_3 -
7214 (uint8_t *)&icb->interrupt_delay_timer;
7215 while (cnt--)
7216 *dptr1++ = *dptr2++;
7217 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7218 /*
7219 * Setup driver NVRAM options.
7220 */
7221 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7222 "QLA2462");
7223
7224 qlt_24xx_config_nvram_stage2(vha, icb);
7225
7226 if (nv->host_p & cpu_to_le32(BIT_15)) {
7227 /* Use alternate WWN? */
7228 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7229 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7230 }
7231
7232 /* Prepare nodename */
7233 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7234 /*
7235 * Firmware will apply the following mask if the nodename was
7236 * not provided.
7237 */
7238 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7239 icb->node_name[0] &= 0xF0;
7240 }
7241
7242 /* Set host adapter parameters. */
7243 ha->flags.disable_risc_code_load = 0;
7244 ha->flags.enable_lip_reset = 0;
7245 ha->flags.enable_lip_full_login =
7246 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7247 ha->flags.enable_target_reset =
7248 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7249 ha->flags.enable_led_scheme = 0;
7250 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7251
7252 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7253 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7254
7255 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7256 sizeof(ha->fw_seriallink_options24));
7257
7258 /* save HBA serial number */
7259 ha->serial0 = icb->port_name[5];
7260 ha->serial1 = icb->port_name[6];
7261 ha->serial2 = icb->port_name[7];
7262 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7263 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7264
7265 icb->execution_throttle = cpu_to_le16(0xFFFF);
7266
7267 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7268
7269 /* Set minimum login_timeout to 4 seconds. */
7270 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7271 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7272 if (le16_to_cpu(nv->login_timeout) < 4)
7273 nv->login_timeout = cpu_to_le16(4);
7274 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7275
7276 /* Set minimum RATOV to 100 tenths of a second. */
7277 ha->r_a_tov = 100;
7278
7279 ha->loop_reset_delay = nv->reset_delay;
7280
7281 /* Link Down Timeout = 0:
7282 *
7283 * When Port Down timer expires we will start returning
7284 * I/O's to OS with "DID_NO_CONNECT".
7285 *
7286 * Link Down Timeout != 0:
7287 *
7288 * The driver waits for the link to come up after link down
7289 * before returning I/Os to OS with "DID_NO_CONNECT".
7290 */
7291 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7292 ha->loop_down_abort_time =
7293 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7294 } else {
7295 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7296 ha->loop_down_abort_time =
7297 (LOOP_DOWN_TIME - ha->link_down_timeout);
7298 }
7299
7300 /* Need enough time to try and get the port back. */
7301 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7302 if (qlport_down_retry)
7303 ha->port_down_retry_count = qlport_down_retry;
7304
7305 /* Set login_retry_count */
7306 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7307 if (ha->port_down_retry_count ==
7308 le16_to_cpu(nv->port_down_retry_count) &&
7309 ha->port_down_retry_count > 3)
7310 ha->login_retry_count = ha->port_down_retry_count;
7311 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7312 ha->login_retry_count = ha->port_down_retry_count;
7313 if (ql2xloginretrycount)
7314 ha->login_retry_count = ql2xloginretrycount;
7315
7316 /* N2N: driver will initiate Login instead of FW */
7317 icb->firmware_options_3 |= BIT_8;
7318
7319 /* Enable ZIO. */
7320 if (!vha->flags.init_done) {
7321 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7322 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7323 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7324 le16_to_cpu(icb->interrupt_delay_timer) : 2;
7325 }
7326 icb->firmware_options_2 &= cpu_to_le32(
7327 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7328 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7329 ha->zio_mode = QLA_ZIO_MODE_6;
7330
7331 ql_log(ql_log_info, vha, 0x006f,
7332 "ZIO mode %d enabled; timer delay (%d us).\n",
7333 ha->zio_mode, ha->zio_timer * 100);
7334
7335 icb->firmware_options_2 |= cpu_to_le32(
7336 (uint32_t)ha->zio_mode);
7337 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7338 }
7339
7340 if (rval) {
7341 ql_log(ql_log_warn, vha, 0x0070,
7342 "NVRAM configuration failed.\n");
7343 }
7344 return (rval);
7345 }
7346
7347 static void
7348 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
7349 struct qla27xx_image_status *image_status)
7350 {
7351 ql_dbg(ql_dbg_init, vha, 0x018b,
7352 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
7353 name, "status",
7354 image_status->image_status_mask,
7355 le16_to_cpu(image_status->generation),
7356 image_status->ver_major,
7357 image_status->ver_minor,
7358 image_status->bitmap,
7359 le32_to_cpu(image_status->checksum),
7360 le32_to_cpu(image_status->signature));
7361 }
7362
7363 static bool
7364 qla28xx_check_aux_image_status_signature(
7365 struct qla27xx_image_status *image_status)
7366 {
7367 ulong signature = le32_to_cpu(image_status->signature);
7368
7369 return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
7370 }
7371
7372 static bool
7373 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
7374 {
7375 ulong signature = le32_to_cpu(image_status->signature);
7376
7377 return
7378 signature != QLA27XX_IMG_STATUS_SIGN &&
7379 signature != QLA28XX_IMG_STATUS_SIGN;
7380 }
7381
7382 static ulong
7383 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
7384 {
7385 uint32_t *p = (void *)image_status;
7386 uint n = sizeof(*image_status) / sizeof(*p);
7387 uint32_t sum = 0;
7388
7389 for ( ; n--; p++)
7390 sum += le32_to_cpup(p);
7391
7392 return sum;
7393 }
7394
7395 static inline uint
7396 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
7397 {
7398 return aux->bitmap & bitmask ?
7399 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
7400 }
7401
7402 static void
7403 qla28xx_component_status(
7404 struct active_regions *active_regions, struct qla27xx_image_status *aux)
7405 {
7406 active_regions->aux.board_config =
7407 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
7408
7409 active_regions->aux.vpd_nvram =
7410 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
7411
7412 active_regions->aux.npiv_config_0_1 =
7413 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
7414
7415 active_regions->aux.npiv_config_2_3 =
7416 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
7417 }
7418
7419 static int
7420 qla27xx_compare_image_generation(
7421 struct qla27xx_image_status *pri_image_status,
7422 struct qla27xx_image_status *sec_image_status)
7423 {
7424 /* calculate generation delta as uint16 (this accounts for wrap) */
7425 int16_t delta =
7426 le16_to_cpu(pri_image_status->generation) -
7427 le16_to_cpu(sec_image_status->generation);
7428
7429 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
7430
7431 return delta;
7432 }
7433
7434 void
7435 qla28xx_get_aux_images(
7436 struct scsi_qla_host *vha, struct active_regions *active_regions)
7437 {
7438 struct qla_hw_data *ha = vha->hw;
7439 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
7440 bool valid_pri_image = false, valid_sec_image = false;
7441 bool active_pri_image = false, active_sec_image = false;
7442
7443 if (!ha->flt_region_aux_img_status_pri) {
7444 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
7445 goto check_sec_image;
7446 }
7447
7448 qla24xx_read_flash_data(vha, (void *)&pri_aux_image_status,
7449 ha->flt_region_aux_img_status_pri,
7450 sizeof(pri_aux_image_status) >> 2);
7451 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
7452
7453 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
7454 ql_dbg(ql_dbg_init, vha, 0x018b,
7455 "Primary aux image signature (%#x) not valid\n",
7456 le32_to_cpu(pri_aux_image_status.signature));
7457 goto check_sec_image;
7458 }
7459
7460 if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
7461 ql_dbg(ql_dbg_init, vha, 0x018c,
7462 "Primary aux image checksum failed\n");
7463 goto check_sec_image;
7464 }
7465
7466 valid_pri_image = true;
7467
7468 if (pri_aux_image_status.image_status_mask & 1) {
7469 ql_dbg(ql_dbg_init, vha, 0x018d,
7470 "Primary aux image is active\n");
7471 active_pri_image = true;
7472 }
7473
7474 check_sec_image:
7475 if (!ha->flt_region_aux_img_status_sec) {
7476 ql_dbg(ql_dbg_init, vha, 0x018a,
7477 "Secondary aux image not addressed\n");
7478 goto check_valid_image;
7479 }
7480
7481 qla24xx_read_flash_data(vha, (void *)&sec_aux_image_status,
7482 ha->flt_region_aux_img_status_sec,
7483 sizeof(sec_aux_image_status) >> 2);
7484 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
7485
7486 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
7487 ql_dbg(ql_dbg_init, vha, 0x018b,
7488 "Secondary aux image signature (%#x) not valid\n",
7489 le32_to_cpu(sec_aux_image_status.signature));
7490 goto check_valid_image;
7491 }
7492
7493 if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
7494 ql_dbg(ql_dbg_init, vha, 0x018c,
7495 "Secondary aux image checksum failed\n");
7496 goto check_valid_image;
7497 }
7498
7499 valid_sec_image = true;
7500
7501 if (sec_aux_image_status.image_status_mask & 1) {
7502 ql_dbg(ql_dbg_init, vha, 0x018d,
7503 "Secondary aux image is active\n");
7504 active_sec_image = true;
7505 }
7506
7507 check_valid_image:
7508 if (valid_pri_image && active_pri_image &&
7509 valid_sec_image && active_sec_image) {
7510 if (qla27xx_compare_image_generation(&pri_aux_image_status,
7511 &sec_aux_image_status) >= 0) {
7512 qla28xx_component_status(active_regions,
7513 &pri_aux_image_status);
7514 } else {
7515 qla28xx_component_status(active_regions,
7516 &sec_aux_image_status);
7517 }
7518 } else if (valid_pri_image && active_pri_image) {
7519 qla28xx_component_status(active_regions, &pri_aux_image_status);
7520 } else if (valid_sec_image && active_sec_image) {
7521 qla28xx_component_status(active_regions, &sec_aux_image_status);
7522 }
7523
7524 ql_dbg(ql_dbg_init, vha, 0x018f,
7525 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
7526 active_regions->aux.board_config,
7527 active_regions->aux.vpd_nvram,
7528 active_regions->aux.npiv_config_0_1,
7529 active_regions->aux.npiv_config_2_3);
7530 }
7531
7532 void
7533 qla27xx_get_active_image(struct scsi_qla_host *vha,
7534 struct active_regions *active_regions)
7535 {
7536 struct qla_hw_data *ha = vha->hw;
7537 struct qla27xx_image_status pri_image_status, sec_image_status;
7538 bool valid_pri_image = false, valid_sec_image = false;
7539 bool active_pri_image = false, active_sec_image = false;
7540
7541 if (!ha->flt_region_img_status_pri) {
7542 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
7543 goto check_sec_image;
7544 }
7545
7546 if (qla24xx_read_flash_data(vha, (void *)(&pri_image_status),
7547 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
7548 QLA_SUCCESS) {
7549 WARN_ON_ONCE(true);
7550 goto check_sec_image;
7551 }
7552 qla27xx_print_image(vha, "Primary image", &pri_image_status);
7553
7554 if (qla27xx_check_image_status_signature(&pri_image_status)) {
7555 ql_dbg(ql_dbg_init, vha, 0x018b,
7556 "Primary image signature (%#x) not valid\n",
7557 le32_to_cpu(pri_image_status.signature));
7558 goto check_sec_image;
7559 }
7560
7561 if (qla27xx_image_status_checksum(&pri_image_status)) {
7562 ql_dbg(ql_dbg_init, vha, 0x018c,
7563 "Primary image checksum failed\n");
7564 goto check_sec_image;
7565 }
7566
7567 valid_pri_image = true;
7568
7569 if (pri_image_status.image_status_mask & 1) {
7570 ql_dbg(ql_dbg_init, vha, 0x018d,
7571 "Primary image is active\n");
7572 active_pri_image = true;
7573 }
7574
7575 check_sec_image:
7576 if (!ha->flt_region_img_status_sec) {
7577 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
7578 goto check_valid_image;
7579 }
7580
7581 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7582 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
7583 qla27xx_print_image(vha, "Secondary image", &sec_image_status);
7584
7585 if (qla27xx_check_image_status_signature(&sec_image_status)) {
7586 ql_dbg(ql_dbg_init, vha, 0x018b,
7587 "Secondary image signature (%#x) not valid\n",
7588 le32_to_cpu(sec_image_status.signature));
7589 goto check_valid_image;
7590 }
7591
7592 if (qla27xx_image_status_checksum(&sec_image_status)) {
7593 ql_dbg(ql_dbg_init, vha, 0x018c,
7594 "Secondary image checksum failed\n");
7595 goto check_valid_image;
7596 }
7597
7598 valid_sec_image = true;
7599
7600 if (sec_image_status.image_status_mask & 1) {
7601 ql_dbg(ql_dbg_init, vha, 0x018d,
7602 "Secondary image is active\n");
7603 active_sec_image = true;
7604 }
7605
7606 check_valid_image:
7607 if (valid_pri_image && active_pri_image)
7608 active_regions->global = QLA27XX_PRIMARY_IMAGE;
7609
7610 if (valid_sec_image && active_sec_image) {
7611 if (!active_regions->global ||
7612 qla27xx_compare_image_generation(
7613 &pri_image_status, &sec_image_status) < 0) {
7614 active_regions->global = QLA27XX_SECONDARY_IMAGE;
7615 }
7616 }
7617
7618 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
7619 active_regions->global == QLA27XX_DEFAULT_IMAGE ?
7620 "default (boot/fw)" :
7621 active_regions->global == QLA27XX_PRIMARY_IMAGE ?
7622 "primary" :
7623 active_regions->global == QLA27XX_SECONDARY_IMAGE ?
7624 "secondary" : "invalid",
7625 active_regions->global);
7626 }
7627
7628 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
7629 {
7630 return
7631 !(dword[4] | dword[5] | dword[6] | dword[7]) ||
7632 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
7633 }
7634
7635 static int
7636 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7637 uint32_t faddr)
7638 {
7639 int rval;
7640 uint templates, segments, fragment;
7641 ulong i;
7642 uint j;
7643 ulong dlen;
7644 uint32_t *dcode;
7645 uint32_t risc_addr, risc_size, risc_attr = 0;
7646 struct qla_hw_data *ha = vha->hw;
7647 struct req_que *req = ha->req_q_map[0];
7648 struct fwdt *fwdt = ha->fwdt;
7649
7650 ql_dbg(ql_dbg_init, vha, 0x008b,
7651 "FW: Loading firmware from flash (%x).\n", faddr);
7652
7653 dcode = (void *)req->ring;
7654 qla24xx_read_flash_data(vha, dcode, faddr, 8);
7655 if (qla24xx_risc_firmware_invalid(dcode)) {
7656 ql_log(ql_log_fatal, vha, 0x008c,
7657 "Unable to verify the integrity of flash firmware "
7658 "image.\n");
7659 ql_log(ql_log_fatal, vha, 0x008d,
7660 "Firmware data: %08x %08x %08x %08x.\n",
7661 dcode[0], dcode[1], dcode[2], dcode[3]);
7662
7663 return QLA_FUNCTION_FAILED;
7664 }
7665
7666 dcode = (void *)req->ring;
7667 *srisc_addr = 0;
7668 segments = FA_RISC_CODE_SEGMENTS;
7669 for (j = 0; j < segments; j++) {
7670 ql_dbg(ql_dbg_init, vha, 0x008d,
7671 "-> Loading segment %u...\n", j);
7672 qla24xx_read_flash_data(vha, dcode, faddr, 10);
7673 risc_addr = be32_to_cpu(dcode[2]);
7674 risc_size = be32_to_cpu(dcode[3]);
7675 if (!*srisc_addr) {
7676 *srisc_addr = risc_addr;
7677 risc_attr = be32_to_cpu(dcode[9]);
7678 }
7679
7680 dlen = ha->fw_transfer_size >> 2;
7681 for (fragment = 0; risc_size; fragment++) {
7682 if (dlen > risc_size)
7683 dlen = risc_size;
7684
7685 ql_dbg(ql_dbg_init, vha, 0x008e,
7686 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
7687 fragment, risc_addr, faddr, dlen);
7688 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7689 for (i = 0; i < dlen; i++)
7690 dcode[i] = swab32(dcode[i]);
7691
7692 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7693 if (rval) {
7694 ql_log(ql_log_fatal, vha, 0x008f,
7695 "-> Failed load firmware fragment %u.\n",
7696 fragment);
7697 return QLA_FUNCTION_FAILED;
7698 }
7699
7700 faddr += dlen;
7701 risc_addr += dlen;
7702 risc_size -= dlen;
7703 }
7704 }
7705
7706 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7707 return QLA_SUCCESS;
7708
7709 templates = (risc_attr & BIT_9) ? 2 : 1;
7710 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
7711 for (j = 0; j < templates; j++, fwdt++) {
7712 if (fwdt->template)
7713 vfree(fwdt->template);
7714 fwdt->template = NULL;
7715 fwdt->length = 0;
7716
7717 dcode = (void *)req->ring;
7718 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7719 risc_size = be32_to_cpu(dcode[2]);
7720 ql_dbg(ql_dbg_init, vha, 0x0161,
7721 "-> fwdt%u template array at %#x (%#x dwords)\n",
7722 j, faddr, risc_size);
7723 if (!risc_size || !~risc_size) {
7724 ql_dbg(ql_dbg_init, vha, 0x0162,
7725 "-> fwdt%u failed to read array\n", j);
7726 goto failed;
7727 }
7728
7729 /* skip header and ignore checksum */
7730 faddr += 7;
7731 risc_size -= 8;
7732
7733 ql_dbg(ql_dbg_init, vha, 0x0163,
7734 "-> fwdt%u template allocate template %#x words...\n",
7735 j, risc_size);
7736 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7737 if (!fwdt->template) {
7738 ql_log(ql_log_warn, vha, 0x0164,
7739 "-> fwdt%u failed allocate template.\n", j);
7740 goto failed;
7741 }
7742
7743 dcode = fwdt->template;
7744 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7745
7746 if (!qla27xx_fwdt_template_valid(dcode)) {
7747 ql_log(ql_log_warn, vha, 0x0165,
7748 "-> fwdt%u failed template validate\n", j);
7749 goto failed;
7750 }
7751
7752 dlen = qla27xx_fwdt_template_size(dcode);
7753 ql_dbg(ql_dbg_init, vha, 0x0166,
7754 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
7755 j, dlen, dlen / sizeof(*dcode));
7756 if (dlen > risc_size * sizeof(*dcode)) {
7757 ql_log(ql_log_warn, vha, 0x0167,
7758 "-> fwdt%u template exceeds array (%-lu bytes)\n",
7759 j, dlen - risc_size * sizeof(*dcode));
7760 goto failed;
7761 }
7762
7763 fwdt->length = dlen;
7764 ql_dbg(ql_dbg_init, vha, 0x0168,
7765 "-> fwdt%u loaded template ok\n", j);
7766
7767 faddr += risc_size + 1;
7768 }
7769
7770 return QLA_SUCCESS;
7771
7772 failed:
7773 if (fwdt->template)
7774 vfree(fwdt->template);
7775 fwdt->template = NULL;
7776 fwdt->length = 0;
7777
7778 return QLA_SUCCESS;
7779 }
7780
7781 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7782
7783 int
7784 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7785 {
7786 int rval;
7787 int i, fragment;
7788 uint16_t *wcode, *fwcode;
7789 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7790 struct fw_blob *blob;
7791 struct qla_hw_data *ha = vha->hw;
7792 struct req_que *req = ha->req_q_map[0];
7793
7794 /* Load firmware blob. */
7795 blob = qla2x00_request_firmware(vha);
7796 if (!blob) {
7797 ql_log(ql_log_info, vha, 0x0083,
7798 "Firmware image unavailable.\n");
7799 ql_log(ql_log_info, vha, 0x0084,
7800 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7801 return QLA_FUNCTION_FAILED;
7802 }
7803
7804 rval = QLA_SUCCESS;
7805
7806 wcode = (uint16_t *)req->ring;
7807 *srisc_addr = 0;
7808 fwcode = (uint16_t *)blob->fw->data;
7809 fwclen = 0;
7810
7811 /* Validate firmware image by checking version. */
7812 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7813 ql_log(ql_log_fatal, vha, 0x0085,
7814 "Unable to verify integrity of firmware image (%zd).\n",
7815 blob->fw->size);
7816 goto fail_fw_integrity;
7817 }
7818 for (i = 0; i < 4; i++)
7819 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7820 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7821 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7822 wcode[2] == 0 && wcode[3] == 0)) {
7823 ql_log(ql_log_fatal, vha, 0x0086,
7824 "Unable to verify integrity of firmware image.\n");
7825 ql_log(ql_log_fatal, vha, 0x0087,
7826 "Firmware data: %04x %04x %04x %04x.\n",
7827 wcode[0], wcode[1], wcode[2], wcode[3]);
7828 goto fail_fw_integrity;
7829 }
7830
7831 seg = blob->segs;
7832 while (*seg && rval == QLA_SUCCESS) {
7833 risc_addr = *seg;
7834 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7835 risc_size = be16_to_cpu(fwcode[3]);
7836
7837 /* Validate firmware image size. */
7838 fwclen += risc_size * sizeof(uint16_t);
7839 if (blob->fw->size < fwclen) {
7840 ql_log(ql_log_fatal, vha, 0x0088,
7841 "Unable to verify integrity of firmware image "
7842 "(%zd).\n", blob->fw->size);
7843 goto fail_fw_integrity;
7844 }
7845
7846 fragment = 0;
7847 while (risc_size > 0 && rval == QLA_SUCCESS) {
7848 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7849 if (wlen > risc_size)
7850 wlen = risc_size;
7851 ql_dbg(ql_dbg_init, vha, 0x0089,
7852 "Loading risc segment@ risc addr %x number of "
7853 "words 0x%x.\n", risc_addr, wlen);
7854
7855 for (i = 0; i < wlen; i++)
7856 wcode[i] = swab16(fwcode[i]);
7857
7858 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7859 wlen);
7860 if (rval) {
7861 ql_log(ql_log_fatal, vha, 0x008a,
7862 "Failed to load segment %d of firmware.\n",
7863 fragment);
7864 break;
7865 }
7866
7867 fwcode += wlen;
7868 risc_addr += wlen;
7869 risc_size -= wlen;
7870 fragment++;
7871 }
7872
7873 /* Next segment. */
7874 seg++;
7875 }
7876 return rval;
7877
7878 fail_fw_integrity:
7879 return QLA_FUNCTION_FAILED;
7880 }
7881
7882 static int
7883 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7884 {
7885 int rval;
7886 uint templates, segments, fragment;
7887 uint32_t *dcode;
7888 ulong dlen;
7889 uint32_t risc_addr, risc_size, risc_attr = 0;
7890 ulong i;
7891 uint j;
7892 struct fw_blob *blob;
7893 uint32_t *fwcode;
7894 struct qla_hw_data *ha = vha->hw;
7895 struct req_que *req = ha->req_q_map[0];
7896 struct fwdt *fwdt = ha->fwdt;
7897
7898 ql_dbg(ql_dbg_init, vha, 0x0090,
7899 "-> FW: Loading via request-firmware.\n");
7900
7901 blob = qla2x00_request_firmware(vha);
7902 if (!blob) {
7903 ql_log(ql_log_warn, vha, 0x0092,
7904 "-> Firmware file not found.\n");
7905
7906 return QLA_FUNCTION_FAILED;
7907 }
7908
7909 fwcode = (void *)blob->fw->data;
7910 dcode = fwcode;
7911 if (qla24xx_risc_firmware_invalid(dcode)) {
7912 ql_log(ql_log_fatal, vha, 0x0093,
7913 "Unable to verify integrity of firmware image (%zd).\n",
7914 blob->fw->size);
7915 ql_log(ql_log_fatal, vha, 0x0095,
7916 "Firmware data: %08x %08x %08x %08x.\n",
7917 dcode[0], dcode[1], dcode[2], dcode[3]);
7918 return QLA_FUNCTION_FAILED;
7919 }
7920
7921 dcode = (void *)req->ring;
7922 *srisc_addr = 0;
7923 segments = FA_RISC_CODE_SEGMENTS;
7924 for (j = 0; j < segments; j++) {
7925 ql_dbg(ql_dbg_init, vha, 0x0096,
7926 "-> Loading segment %u...\n", j);
7927 risc_addr = be32_to_cpu(fwcode[2]);
7928 risc_size = be32_to_cpu(fwcode[3]);
7929
7930 if (!*srisc_addr) {
7931 *srisc_addr = risc_addr;
7932 risc_attr = be32_to_cpu(fwcode[9]);
7933 }
7934
7935 dlen = ha->fw_transfer_size >> 2;
7936 for (fragment = 0; risc_size; fragment++) {
7937 if (dlen > risc_size)
7938 dlen = risc_size;
7939
7940 ql_dbg(ql_dbg_init, vha, 0x0097,
7941 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
7942 fragment, risc_addr,
7943 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
7944 dlen);
7945
7946 for (i = 0; i < dlen; i++)
7947 dcode[i] = swab32(fwcode[i]);
7948
7949 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7950 if (rval) {
7951 ql_log(ql_log_fatal, vha, 0x0098,
7952 "-> Failed load firmware fragment %u.\n",
7953 fragment);
7954 return QLA_FUNCTION_FAILED;
7955 }
7956
7957 fwcode += dlen;
7958 risc_addr += dlen;
7959 risc_size -= dlen;
7960 }
7961 }
7962
7963 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7964 return QLA_SUCCESS;
7965
7966 templates = (risc_attr & BIT_9) ? 2 : 1;
7967 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
7968 for (j = 0; j < templates; j++, fwdt++) {
7969 if (fwdt->template)
7970 vfree(fwdt->template);
7971 fwdt->template = NULL;
7972 fwdt->length = 0;
7973
7974 risc_size = be32_to_cpu(fwcode[2]);
7975 ql_dbg(ql_dbg_init, vha, 0x0171,
7976 "-> fwdt%u template array at %#x (%#x dwords)\n",
7977 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
7978 risc_size);
7979 if (!risc_size || !~risc_size) {
7980 ql_dbg(ql_dbg_init, vha, 0x0172,
7981 "-> fwdt%u failed to read array\n", j);
7982 goto failed;
7983 }
7984
7985 /* skip header and ignore checksum */
7986 fwcode += 7;
7987 risc_size -= 8;
7988
7989 ql_dbg(ql_dbg_init, vha, 0x0173,
7990 "-> fwdt%u template allocate template %#x words...\n",
7991 j, risc_size);
7992 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7993 if (!fwdt->template) {
7994 ql_log(ql_log_warn, vha, 0x0174,
7995 "-> fwdt%u failed allocate template.\n", j);
7996 goto failed;
7997 }
7998
7999 dcode = fwdt->template;
8000 for (i = 0; i < risc_size; i++)
8001 dcode[i] = fwcode[i];
8002
8003 if (!qla27xx_fwdt_template_valid(dcode)) {
8004 ql_log(ql_log_warn, vha, 0x0175,
8005 "-> fwdt%u failed template validate\n", j);
8006 goto failed;
8007 }
8008
8009 dlen = qla27xx_fwdt_template_size(dcode);
8010 ql_dbg(ql_dbg_init, vha, 0x0176,
8011 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8012 j, dlen, dlen / sizeof(*dcode));
8013 if (dlen > risc_size * sizeof(*dcode)) {
8014 ql_log(ql_log_warn, vha, 0x0177,
8015 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8016 j, dlen - risc_size * sizeof(*dcode));
8017 goto failed;
8018 }
8019
8020 fwdt->length = dlen;
8021 ql_dbg(ql_dbg_init, vha, 0x0178,
8022 "-> fwdt%u loaded template ok\n", j);
8023
8024 fwcode += risc_size + 1;
8025 }
8026
8027 return QLA_SUCCESS;
8028
8029 failed:
8030 if (fwdt->template)
8031 vfree(fwdt->template);
8032 fwdt->template = NULL;
8033 fwdt->length = 0;
8034
8035 return QLA_SUCCESS;
8036 }
8037
8038 int
8039 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8040 {
8041 int rval;
8042
8043 if (ql2xfwloadbin == 1)
8044 return qla81xx_load_risc(vha, srisc_addr);
8045
8046 /*
8047 * FW Load priority:
8048 * 1) Firmware via request-firmware interface (.bin file).
8049 * 2) Firmware residing in flash.
8050 */
8051 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8052 if (rval == QLA_SUCCESS)
8053 return rval;
8054
8055 return qla24xx_load_risc_flash(vha, srisc_addr,
8056 vha->hw->flt_region_fw);
8057 }
8058
8059 int
8060 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8061 {
8062 int rval;
8063 struct qla_hw_data *ha = vha->hw;
8064 struct active_regions active_regions = { };
8065
8066 if (ql2xfwloadbin == 2)
8067 goto try_blob_fw;
8068
8069 /* FW Load priority:
8070 * 1) Firmware residing in flash.
8071 * 2) Firmware via request-firmware interface (.bin file).
8072 * 3) Golden-Firmware residing in flash -- (limited operation).
8073 */
8074
8075 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8076 goto try_primary_fw;
8077
8078 qla27xx_get_active_image(vha, &active_regions);
8079
8080 if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8081 goto try_primary_fw;
8082
8083 ql_dbg(ql_dbg_init, vha, 0x008b,
8084 "Loading secondary firmware image.\n");
8085 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8086 if (!rval)
8087 return rval;
8088
8089 try_primary_fw:
8090 ql_dbg(ql_dbg_init, vha, 0x008b,
8091 "Loading primary firmware image.\n");
8092 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8093 if (!rval)
8094 return rval;
8095
8096 try_blob_fw:
8097 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8098 if (!rval || !ha->flt_region_gold_fw)
8099 return rval;
8100
8101 ql_log(ql_log_info, vha, 0x0099,
8102 "Attempting to fallback to golden firmware.\n");
8103 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8104 if (rval)
8105 return rval;
8106
8107 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8108 ha->flags.running_gold_fw = 1;
8109 return rval;
8110 }
8111
8112 void
8113 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8114 {
8115 int ret, retries;
8116 struct qla_hw_data *ha = vha->hw;
8117
8118 if (ha->flags.pci_channel_io_perm_failure)
8119 return;
8120 if (!IS_FWI2_CAPABLE(ha))
8121 return;
8122 if (!ha->fw_major_version)
8123 return;
8124 if (!ha->flags.fw_started)
8125 return;
8126
8127 ret = qla2x00_stop_firmware(vha);
8128 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8129 ret != QLA_INVALID_COMMAND && retries ; retries--) {
8130 ha->isp_ops->reset_chip(vha);
8131 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8132 continue;
8133 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8134 continue;
8135 ql_log(ql_log_info, vha, 0x8015,
8136 "Attempting retry of stop-firmware command.\n");
8137 ret = qla2x00_stop_firmware(vha);
8138 }
8139
8140 QLA_FW_STOPPED(ha);
8141 ha->flags.fw_init_done = 0;
8142 }
8143
8144 int
8145 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8146 {
8147 int rval = QLA_SUCCESS;
8148 int rval2;
8149 uint16_t mb[MAILBOX_REGISTER_COUNT];
8150 struct qla_hw_data *ha = vha->hw;
8151 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8152
8153 if (!vha->vp_idx)
8154 return -EINVAL;
8155
8156 rval = qla2x00_fw_ready(base_vha);
8157
8158 if (rval == QLA_SUCCESS) {
8159 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8160 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8161 }
8162
8163 vha->flags.management_server_logged_in = 0;
8164
8165 /* Login to SNS first */
8166 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8167 BIT_1);
8168 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8169 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8170 ql_dbg(ql_dbg_init, vha, 0x0120,
8171 "Failed SNS login: loop_id=%x, rval2=%d\n",
8172 NPH_SNS, rval2);
8173 else
8174 ql_dbg(ql_dbg_init, vha, 0x0103,
8175 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8176 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8177 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8178 return (QLA_FUNCTION_FAILED);
8179 }
8180
8181 atomic_set(&vha->loop_down_timer, 0);
8182 atomic_set(&vha->loop_state, LOOP_UP);
8183 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8184 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
8185 rval = qla2x00_loop_resync(base_vha);
8186
8187 return rval;
8188 }
8189
8190 /* 84XX Support **************************************************************/
8191
8192 static LIST_HEAD(qla_cs84xx_list);
8193 static DEFINE_MUTEX(qla_cs84xx_mutex);
8194
8195 static struct qla_chip_state_84xx *
8196 qla84xx_get_chip(struct scsi_qla_host *vha)
8197 {
8198 struct qla_chip_state_84xx *cs84xx;
8199 struct qla_hw_data *ha = vha->hw;
8200
8201 mutex_lock(&qla_cs84xx_mutex);
8202
8203 /* Find any shared 84xx chip. */
8204 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8205 if (cs84xx->bus == ha->pdev->bus) {
8206 kref_get(&cs84xx->kref);
8207 goto done;
8208 }
8209 }
8210
8211 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
8212 if (!cs84xx)
8213 goto done;
8214
8215 kref_init(&cs84xx->kref);
8216 spin_lock_init(&cs84xx->access_lock);
8217 mutex_init(&cs84xx->fw_update_mutex);
8218 cs84xx->bus = ha->pdev->bus;
8219
8220 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8221 done:
8222 mutex_unlock(&qla_cs84xx_mutex);
8223 return cs84xx;
8224 }
8225
8226 static void
8227 __qla84xx_chip_release(struct kref *kref)
8228 {
8229 struct qla_chip_state_84xx *cs84xx =
8230 container_of(kref, struct qla_chip_state_84xx, kref);
8231
8232 mutex_lock(&qla_cs84xx_mutex);
8233 list_del(&cs84xx->list);
8234 mutex_unlock(&qla_cs84xx_mutex);
8235 kfree(cs84xx);
8236 }
8237
8238 void
8239 qla84xx_put_chip(struct scsi_qla_host *vha)
8240 {
8241 struct qla_hw_data *ha = vha->hw;
8242
8243 if (ha->cs84xx)
8244 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8245 }
8246
8247 static int
8248 qla84xx_init_chip(scsi_qla_host_t *vha)
8249 {
8250 int rval;
8251 uint16_t status[2];
8252 struct qla_hw_data *ha = vha->hw;
8253
8254 mutex_lock(&ha->cs84xx->fw_update_mutex);
8255
8256 rval = qla84xx_verify_chip(vha, status);
8257
8258 mutex_unlock(&ha->cs84xx->fw_update_mutex);
8259
8260 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
8261 QLA_SUCCESS;
8262 }
8263
8264 /* 81XX Support **************************************************************/
8265
8266 int
8267 qla81xx_nvram_config(scsi_qla_host_t *vha)
8268 {
8269 int rval;
8270 struct init_cb_81xx *icb;
8271 struct nvram_81xx *nv;
8272 uint32_t *dptr;
8273 uint8_t *dptr1, *dptr2;
8274 uint32_t chksum;
8275 uint16_t cnt;
8276 struct qla_hw_data *ha = vha->hw;
8277 uint32_t faddr;
8278 struct active_regions active_regions = { };
8279
8280 rval = QLA_SUCCESS;
8281 icb = (struct init_cb_81xx *)ha->init_cb;
8282 nv = ha->nvram;
8283
8284 /* Determine NVRAM starting address. */
8285 ha->nvram_size = sizeof(*nv);
8286 ha->vpd_size = FA_NVRAM_VPD_SIZE;
8287 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8288 ha->vpd_size = FA_VPD_SIZE_82XX;
8289
8290 if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
8291 qla28xx_get_aux_images(vha, &active_regions);
8292
8293 /* Get VPD data into cache */
8294 ha->vpd = ha->nvram + VPD_OFFSET;
8295
8296 faddr = ha->flt_region_vpd;
8297 if (IS_QLA28XX(ha)) {
8298 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8299 faddr = ha->flt_region_vpd_sec;
8300 ql_dbg(ql_dbg_init, vha, 0x0110,
8301 "Loading %s nvram image.\n",
8302 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8303 "primary" : "secondary");
8304 }
8305 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
8306
8307 /* Get NVRAM data into cache and calculate checksum. */
8308 faddr = ha->flt_region_nvram;
8309 if (IS_QLA28XX(ha)) {
8310 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8311 faddr = ha->flt_region_nvram_sec;
8312 }
8313 ql_dbg(ql_dbg_init, vha, 0x0110,
8314 "Loading %s nvram image.\n",
8315 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8316 "primary" : "secondary");
8317 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
8318
8319 dptr = (uint32_t *)nv;
8320 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8321 chksum += le32_to_cpu(*dptr);
8322
8323 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8324 "Contents of NVRAM:\n");
8325 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8326 nv, ha->nvram_size);
8327
8328 /* Bad NVRAM data, set defaults parameters. */
8329 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
8330 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8331 /* Reset NVRAM data. */
8332 ql_log(ql_log_info, vha, 0x0073,
8333 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
8334 chksum, nv->id, le16_to_cpu(nv->nvram_version));
8335 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8336 ql_log(ql_log_info, vha, 0x0074,
8337 "Falling back to functioning (yet invalid -- WWPN) "
8338 "defaults.\n");
8339
8340 /*
8341 * Set default initialization control block.
8342 */
8343 memset(nv, 0, ha->nvram_size);
8344 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8345 nv->version = cpu_to_le16(ICB_VERSION);
8346 nv->frame_payload_size = 2048;
8347 nv->execution_throttle = cpu_to_le16(0xFFFF);
8348 nv->exchange_count = cpu_to_le16(0);
8349 nv->port_name[0] = 0x21;
8350 nv->port_name[1] = 0x00 + ha->port_no + 1;
8351 nv->port_name[2] = 0x00;
8352 nv->port_name[3] = 0xe0;
8353 nv->port_name[4] = 0x8b;
8354 nv->port_name[5] = 0x1c;
8355 nv->port_name[6] = 0x55;
8356 nv->port_name[7] = 0x86;
8357 nv->node_name[0] = 0x20;
8358 nv->node_name[1] = 0x00;
8359 nv->node_name[2] = 0x00;
8360 nv->node_name[3] = 0xe0;
8361 nv->node_name[4] = 0x8b;
8362 nv->node_name[5] = 0x1c;
8363 nv->node_name[6] = 0x55;
8364 nv->node_name[7] = 0x86;
8365 nv->login_retry_count = cpu_to_le16(8);
8366 nv->interrupt_delay_timer = cpu_to_le16(0);
8367 nv->login_timeout = cpu_to_le16(0);
8368 nv->firmware_options_1 =
8369 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8370 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8371 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8372 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8373 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8374 nv->efi_parameters = cpu_to_le32(0);
8375 nv->reset_delay = 5;
8376 nv->max_luns_per_target = cpu_to_le16(128);
8377 nv->port_down_retry_count = cpu_to_le16(30);
8378 nv->link_down_timeout = cpu_to_le16(180);
8379 nv->enode_mac[0] = 0x00;
8380 nv->enode_mac[1] = 0xC0;
8381 nv->enode_mac[2] = 0xDD;
8382 nv->enode_mac[3] = 0x04;
8383 nv->enode_mac[4] = 0x05;
8384 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8385
8386 rval = 1;
8387 }
8388
8389 if (IS_T10_PI_CAPABLE(ha))
8390 nv->frame_payload_size &= ~7;
8391
8392 qlt_81xx_config_nvram_stage1(vha, nv);
8393
8394 /* Reset Initialization control block */
8395 memset(icb, 0, ha->init_cb_size);
8396
8397 /* Copy 1st segment. */
8398 dptr1 = (uint8_t *)icb;
8399 dptr2 = (uint8_t *)&nv->version;
8400 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8401 while (cnt--)
8402 *dptr1++ = *dptr2++;
8403
8404 icb->login_retry_count = nv->login_retry_count;
8405
8406 /* Copy 2nd segment. */
8407 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8408 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8409 cnt = (uint8_t *)&icb->reserved_5 -
8410 (uint8_t *)&icb->interrupt_delay_timer;
8411 while (cnt--)
8412 *dptr1++ = *dptr2++;
8413
8414 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8415 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8416 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8417 icb->enode_mac[0] = 0x00;
8418 icb->enode_mac[1] = 0xC0;
8419 icb->enode_mac[2] = 0xDD;
8420 icb->enode_mac[3] = 0x04;
8421 icb->enode_mac[4] = 0x05;
8422 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8423 }
8424
8425 /* Use extended-initialization control block. */
8426 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8427 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8428 /*
8429 * Setup driver NVRAM options.
8430 */
8431 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8432 "QLE8XXX");
8433
8434 qlt_81xx_config_nvram_stage2(vha, icb);
8435
8436 /* Use alternate WWN? */
8437 if (nv->host_p & cpu_to_le32(BIT_15)) {
8438 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8439 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8440 }
8441
8442 /* Prepare nodename */
8443 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8444 /*
8445 * Firmware will apply the following mask if the nodename was
8446 * not provided.
8447 */
8448 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8449 icb->node_name[0] &= 0xF0;
8450 }
8451
8452 /* Set host adapter parameters. */
8453 ha->flags.disable_risc_code_load = 0;
8454 ha->flags.enable_lip_reset = 0;
8455 ha->flags.enable_lip_full_login =
8456 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8457 ha->flags.enable_target_reset =
8458 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8459 ha->flags.enable_led_scheme = 0;
8460 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8461
8462 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8463 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8464
8465 /* save HBA serial number */
8466 ha->serial0 = icb->port_name[5];
8467 ha->serial1 = icb->port_name[6];
8468 ha->serial2 = icb->port_name[7];
8469 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8470 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8471
8472 icb->execution_throttle = cpu_to_le16(0xFFFF);
8473
8474 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8475
8476 /* Set minimum login_timeout to 4 seconds. */
8477 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8478 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8479 if (le16_to_cpu(nv->login_timeout) < 4)
8480 nv->login_timeout = cpu_to_le16(4);
8481 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8482
8483 /* Set minimum RATOV to 100 tenths of a second. */
8484 ha->r_a_tov = 100;
8485
8486 ha->loop_reset_delay = nv->reset_delay;
8487
8488 /* Link Down Timeout = 0:
8489 *
8490 * When Port Down timer expires we will start returning
8491 * I/O's to OS with "DID_NO_CONNECT".
8492 *
8493 * Link Down Timeout != 0:
8494 *
8495 * The driver waits for the link to come up after link down
8496 * before returning I/Os to OS with "DID_NO_CONNECT".
8497 */
8498 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8499 ha->loop_down_abort_time =
8500 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8501 } else {
8502 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8503 ha->loop_down_abort_time =
8504 (LOOP_DOWN_TIME - ha->link_down_timeout);
8505 }
8506
8507 /* Need enough time to try and get the port back. */
8508 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8509 if (qlport_down_retry)
8510 ha->port_down_retry_count = qlport_down_retry;
8511
8512 /* Set login_retry_count */
8513 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8514 if (ha->port_down_retry_count ==
8515 le16_to_cpu(nv->port_down_retry_count) &&
8516 ha->port_down_retry_count > 3)
8517 ha->login_retry_count = ha->port_down_retry_count;
8518 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8519 ha->login_retry_count = ha->port_down_retry_count;
8520 if (ql2xloginretrycount)
8521 ha->login_retry_count = ql2xloginretrycount;
8522
8523 /* if not running MSI-X we need handshaking on interrupts */
8524 if (!vha->hw->flags.msix_enabled &&
8525 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
8526 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8527
8528 /* Enable ZIO. */
8529 if (!vha->flags.init_done) {
8530 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8531 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8532 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8533 le16_to_cpu(icb->interrupt_delay_timer) : 2;
8534 }
8535 icb->firmware_options_2 &= cpu_to_le32(
8536 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8537 vha->flags.process_response_queue = 0;
8538 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8539 ha->zio_mode = QLA_ZIO_MODE_6;
8540
8541 ql_log(ql_log_info, vha, 0x0075,
8542 "ZIO mode %d enabled; timer delay (%d us).\n",
8543 ha->zio_mode,
8544 ha->zio_timer * 100);
8545
8546 icb->firmware_options_2 |= cpu_to_le32(
8547 (uint32_t)ha->zio_mode);
8548 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8549 vha->flags.process_response_queue = 1;
8550 }
8551
8552 /* enable RIDA Format2 */
8553 icb->firmware_options_3 |= BIT_0;
8554
8555 /* N2N: driver will initiate Login instead of FW */
8556 icb->firmware_options_3 |= BIT_8;
8557
8558 /* Determine NVMe/FCP priority for target ports */
8559 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
8560
8561 if (rval) {
8562 ql_log(ql_log_warn, vha, 0x0076,
8563 "NVRAM configuration failed.\n");
8564 }
8565 return (rval);
8566 }
8567
8568 int
8569 qla82xx_restart_isp(scsi_qla_host_t *vha)
8570 {
8571 int status, rval;
8572 struct qla_hw_data *ha = vha->hw;
8573 struct scsi_qla_host *vp;
8574 unsigned long flags;
8575
8576 status = qla2x00_init_rings(vha);
8577 if (!status) {
8578 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8579 ha->flags.chip_reset_done = 1;
8580
8581 status = qla2x00_fw_ready(vha);
8582 if (!status) {
8583 /* Issue a marker after FW becomes ready. */
8584 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8585 vha->flags.online = 1;
8586 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8587 }
8588
8589 /* if no cable then assume it's good */
8590 if ((vha->device_flags & DFLG_NO_CABLE))
8591 status = 0;
8592 }
8593
8594 if (!status) {
8595 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8596
8597 if (!atomic_read(&vha->loop_down_timer)) {
8598 /*
8599 * Issue marker command only when we are going
8600 * to start the I/O .
8601 */
8602 vha->marker_needed = 1;
8603 }
8604
8605 ha->isp_ops->enable_intrs(ha);
8606
8607 ha->isp_abort_cnt = 0;
8608 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8609
8610 /* Update the firmware version */
8611 status = qla82xx_check_md_needed(vha);
8612
8613 if (ha->fce) {
8614 ha->flags.fce_enabled = 1;
8615 memset(ha->fce, 0,
8616 fce_calc_size(ha->fce_bufs));
8617 rval = qla2x00_enable_fce_trace(vha,
8618 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8619 &ha->fce_bufs);
8620 if (rval) {
8621 ql_log(ql_log_warn, vha, 0x8001,
8622 "Unable to reinitialize FCE (%d).\n",
8623 rval);
8624 ha->flags.fce_enabled = 0;
8625 }
8626 }
8627
8628 if (ha->eft) {
8629 memset(ha->eft, 0, EFT_SIZE);
8630 rval = qla2x00_enable_eft_trace(vha,
8631 ha->eft_dma, EFT_NUM_BUFFERS);
8632 if (rval) {
8633 ql_log(ql_log_warn, vha, 0x8010,
8634 "Unable to reinitialize EFT (%d).\n",
8635 rval);
8636 }
8637 }
8638 }
8639
8640 if (!status) {
8641 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8642 "qla82xx_restart_isp succeeded.\n");
8643
8644 spin_lock_irqsave(&ha->vport_slock, flags);
8645 list_for_each_entry(vp, &ha->vp_list, list) {
8646 if (vp->vp_idx) {
8647 atomic_inc(&vp->vref_count);
8648 spin_unlock_irqrestore(&ha->vport_slock, flags);
8649
8650 qla2x00_vp_abort_isp(vp);
8651
8652 spin_lock_irqsave(&ha->vport_slock, flags);
8653 atomic_dec(&vp->vref_count);
8654 }
8655 }
8656 spin_unlock_irqrestore(&ha->vport_slock, flags);
8657
8658 } else {
8659 ql_log(ql_log_warn, vha, 0x8016,
8660 "qla82xx_restart_isp **** FAILED ****.\n");
8661 }
8662
8663 return status;
8664 }
8665
8666 void
8667 qla81xx_update_fw_options(scsi_qla_host_t *vha)
8668 {
8669 struct qla_hw_data *ha = vha->hw;
8670
8671 /* Hold status IOCBs until ABTS response received. */
8672 if (ql2xfwholdabts)
8673 ha->fw_options[3] |= BIT_12;
8674
8675 /* Set Retry FLOGI in case of P2P connection */
8676 if (ha->operating_mode == P2P) {
8677 ha->fw_options[2] |= BIT_3;
8678 ql_dbg(ql_dbg_disc, vha, 0x2103,
8679 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8680 __func__, ha->fw_options[2]);
8681 }
8682
8683 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
8684 if (ql2xmvasynctoatio) {
8685 if (qla_tgt_mode_enabled(vha) ||
8686 qla_dual_mode_enabled(vha))
8687 ha->fw_options[2] |= BIT_11;
8688 else
8689 ha->fw_options[2] &= ~BIT_11;
8690 }
8691
8692 if (qla_tgt_mode_enabled(vha) ||
8693 qla_dual_mode_enabled(vha)) {
8694 /* FW auto send SCSI status during */
8695 ha->fw_options[1] |= BIT_8;
8696 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8697
8698 /* FW perform Exchange validation */
8699 ha->fw_options[2] |= BIT_4;
8700 } else {
8701 ha->fw_options[1] &= ~BIT_8;
8702 ha->fw_options[10] &= 0x00ff;
8703
8704 ha->fw_options[2] &= ~BIT_4;
8705 }
8706
8707 if (ql2xetsenable) {
8708 /* Enable ETS Burst. */
8709 memset(ha->fw_options, 0, sizeof(ha->fw_options));
8710 ha->fw_options[2] |= BIT_9;
8711 }
8712
8713 ql_dbg(ql_dbg_init, vha, 0x00e9,
8714 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8715 __func__, ha->fw_options[1], ha->fw_options[2],
8716 ha->fw_options[3], vha->host->active_mode);
8717
8718 qla2x00_set_fw_options(vha, ha->fw_options);
8719 }
8720
8721 /*
8722 * qla24xx_get_fcp_prio
8723 * Gets the fcp cmd priority value for the logged in port.
8724 * Looks for a match of the port descriptors within
8725 * each of the fcp prio config entries. If a match is found,
8726 * the tag (priority) value is returned.
8727 *
8728 * Input:
8729 * vha = scsi host structure pointer.
8730 * fcport = port structure pointer.
8731 *
8732 * Return:
8733 * non-zero (if found)
8734 * -1 (if not found)
8735 *
8736 * Context:
8737 * Kernel context
8738 */
8739 static int
8740 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8741 {
8742 int i, entries;
8743 uint8_t pid_match, wwn_match;
8744 int priority;
8745 uint32_t pid1, pid2;
8746 uint64_t wwn1, wwn2;
8747 struct qla_fcp_prio_entry *pri_entry;
8748 struct qla_hw_data *ha = vha->hw;
8749
8750 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8751 return -1;
8752
8753 priority = -1;
8754 entries = ha->fcp_prio_cfg->num_entries;
8755 pri_entry = &ha->fcp_prio_cfg->entry[0];
8756
8757 for (i = 0; i < entries; i++) {
8758 pid_match = wwn_match = 0;
8759
8760 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8761 pri_entry++;
8762 continue;
8763 }
8764
8765 /* check source pid for a match */
8766 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8767 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8768 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8769 if (pid1 == INVALID_PORT_ID)
8770 pid_match++;
8771 else if (pid1 == pid2)
8772 pid_match++;
8773 }
8774
8775 /* check destination pid for a match */
8776 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8777 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8778 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8779 if (pid1 == INVALID_PORT_ID)
8780 pid_match++;
8781 else if (pid1 == pid2)
8782 pid_match++;
8783 }
8784
8785 /* check source WWN for a match */
8786 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8787 wwn1 = wwn_to_u64(vha->port_name);
8788 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8789 if (wwn2 == (uint64_t)-1)
8790 wwn_match++;
8791 else if (wwn1 == wwn2)
8792 wwn_match++;
8793 }
8794
8795 /* check destination WWN for a match */
8796 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8797 wwn1 = wwn_to_u64(fcport->port_name);
8798 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8799 if (wwn2 == (uint64_t)-1)
8800 wwn_match++;
8801 else if (wwn1 == wwn2)
8802 wwn_match++;
8803 }
8804
8805 if (pid_match == 2 || wwn_match == 2) {
8806 /* Found a matching entry */
8807 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8808 priority = pri_entry->tag;
8809 break;
8810 }
8811
8812 pri_entry++;
8813 }
8814
8815 return priority;
8816 }
8817
8818 /*
8819 * qla24xx_update_fcport_fcp_prio
8820 * Activates fcp priority for the logged in fc port
8821 *
8822 * Input:
8823 * vha = scsi host structure pointer.
8824 * fcp = port structure pointer.
8825 *
8826 * Return:
8827 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8828 *
8829 * Context:
8830 * Kernel context.
8831 */
8832 int
8833 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8834 {
8835 int ret;
8836 int priority;
8837 uint16_t mb[5];
8838
8839 if (fcport->port_type != FCT_TARGET ||
8840 fcport->loop_id == FC_NO_LOOP_ID)
8841 return QLA_FUNCTION_FAILED;
8842
8843 priority = qla24xx_get_fcp_prio(vha, fcport);
8844 if (priority < 0)
8845 return QLA_FUNCTION_FAILED;
8846
8847 if (IS_P3P_TYPE(vha->hw)) {
8848 fcport->fcp_prio = priority & 0xf;
8849 return QLA_SUCCESS;
8850 }
8851
8852 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8853 if (ret == QLA_SUCCESS) {
8854 if (fcport->fcp_prio != priority)
8855 ql_dbg(ql_dbg_user, vha, 0x709e,
8856 "Updated FCP_CMND priority - value=%d loop_id=%d "
8857 "port_id=%02x%02x%02x.\n", priority,
8858 fcport->loop_id, fcport->d_id.b.domain,
8859 fcport->d_id.b.area, fcport->d_id.b.al_pa);
8860 fcport->fcp_prio = priority & 0xf;
8861 } else
8862 ql_dbg(ql_dbg_user, vha, 0x704f,
8863 "Unable to update FCP_CMND priority - ret=0x%x for "
8864 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8865 fcport->d_id.b.domain, fcport->d_id.b.area,
8866 fcport->d_id.b.al_pa);
8867 return ret;
8868 }
8869
8870 /*
8871 * qla24xx_update_all_fcp_prio
8872 * Activates fcp priority for all the logged in ports
8873 *
8874 * Input:
8875 * ha = adapter block pointer.
8876 *
8877 * Return:
8878 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8879 *
8880 * Context:
8881 * Kernel context.
8882 */
8883 int
8884 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8885 {
8886 int ret;
8887 fc_port_t *fcport;
8888
8889 ret = QLA_FUNCTION_FAILED;
8890 /* We need to set priority for all logged in ports */
8891 list_for_each_entry(fcport, &vha->vp_fcports, list)
8892 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8893
8894 return ret;
8895 }
8896
8897 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8898 int vp_idx, bool startqp)
8899 {
8900 int rsp_id = 0;
8901 int req_id = 0;
8902 int i;
8903 struct qla_hw_data *ha = vha->hw;
8904 uint16_t qpair_id = 0;
8905 struct qla_qpair *qpair = NULL;
8906 struct qla_msix_entry *msix;
8907
8908 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8909 ql_log(ql_log_warn, vha, 0x00181,
8910 "FW/Driver is not multi-queue capable.\n");
8911 return NULL;
8912 }
8913
8914 if (ql2xmqsupport || ql2xnvmeenable) {
8915 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8916 if (qpair == NULL) {
8917 ql_log(ql_log_warn, vha, 0x0182,
8918 "Failed to allocate memory for queue pair.\n");
8919 return NULL;
8920 }
8921
8922 qpair->hw = vha->hw;
8923 qpair->vha = vha;
8924 qpair->qp_lock_ptr = &qpair->qp_lock;
8925 spin_lock_init(&qpair->qp_lock);
8926 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
8927
8928 /* Assign available que pair id */
8929 mutex_lock(&ha->mq_lock);
8930 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
8931 if (ha->num_qpairs >= ha->max_qpairs) {
8932 mutex_unlock(&ha->mq_lock);
8933 ql_log(ql_log_warn, vha, 0x0183,
8934 "No resources to create additional q pair.\n");
8935 goto fail_qid_map;
8936 }
8937 ha->num_qpairs++;
8938 set_bit(qpair_id, ha->qpair_qid_map);
8939 ha->queue_pair_map[qpair_id] = qpair;
8940 qpair->id = qpair_id;
8941 qpair->vp_idx = vp_idx;
8942 qpair->fw_started = ha->flags.fw_started;
8943 INIT_LIST_HEAD(&qpair->hints_list);
8944 qpair->chip_reset = ha->base_qpair->chip_reset;
8945 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8946 qpair->enable_explicit_conf =
8947 ha->base_qpair->enable_explicit_conf;
8948
8949 for (i = 0; i < ha->msix_count; i++) {
8950 msix = &ha->msix_entries[i];
8951 if (msix->in_use)
8952 continue;
8953 qpair->msix = msix;
8954 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
8955 "Vector %x selected for qpair\n", msix->vector);
8956 break;
8957 }
8958 if (!qpair->msix) {
8959 ql_log(ql_log_warn, vha, 0x0184,
8960 "Out of MSI-X vectors!.\n");
8961 goto fail_msix;
8962 }
8963
8964 qpair->msix->in_use = 1;
8965 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8966 qpair->pdev = ha->pdev;
8967 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
8968 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
8969
8970 mutex_unlock(&ha->mq_lock);
8971
8972 /* Create response queue first */
8973 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
8974 if (!rsp_id) {
8975 ql_log(ql_log_warn, vha, 0x0185,
8976 "Failed to create response queue.\n");
8977 goto fail_rsp;
8978 }
8979
8980 qpair->rsp = ha->rsp_q_map[rsp_id];
8981
8982 /* Create request queue */
8983 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8984 startqp);
8985 if (!req_id) {
8986 ql_log(ql_log_warn, vha, 0x0186,
8987 "Failed to create request queue.\n");
8988 goto fail_req;
8989 }
8990
8991 qpair->req = ha->req_q_map[req_id];
8992 qpair->rsp->req = qpair->req;
8993 qpair->rsp->qpair = qpair;
8994 /* init qpair to this cpu. Will adjust at run time. */
8995 qla_cpu_update(qpair, smp_processor_id());
8996
8997 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8998 if (ha->fw_attributes & BIT_4)
8999 qpair->difdix_supported = 1;
9000 }
9001
9002 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9003 if (!qpair->srb_mempool) {
9004 ql_log(ql_log_warn, vha, 0xd036,
9005 "Failed to create srb mempool for qpair %d\n",
9006 qpair->id);
9007 goto fail_mempool;
9008 }
9009
9010 /* Mark as online */
9011 qpair->online = 1;
9012
9013 if (!vha->flags.qpairs_available)
9014 vha->flags.qpairs_available = 1;
9015
9016 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9017 "Request/Response queue pair created, id %d\n",
9018 qpair->id);
9019 ql_dbg(ql_dbg_init, vha, 0x0187,
9020 "Request/Response queue pair created, id %d\n",
9021 qpair->id);
9022 }
9023 return qpair;
9024
9025 fail_mempool:
9026 fail_req:
9027 qla25xx_delete_rsp_que(vha, qpair->rsp);
9028 fail_rsp:
9029 mutex_lock(&ha->mq_lock);
9030 qpair->msix->in_use = 0;
9031 list_del(&qpair->qp_list_elem);
9032 if (list_empty(&vha->qp_list))
9033 vha->flags.qpairs_available = 0;
9034 fail_msix:
9035 ha->queue_pair_map[qpair_id] = NULL;
9036 clear_bit(qpair_id, ha->qpair_qid_map);
9037 ha->num_qpairs--;
9038 mutex_unlock(&ha->mq_lock);
9039 fail_qid_map:
9040 kfree(qpair);
9041 return NULL;
9042 }
9043
9044 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9045 {
9046 int ret = QLA_FUNCTION_FAILED;
9047 struct qla_hw_data *ha = qpair->hw;
9048
9049 qpair->delete_in_progress = 1;
9050
9051 ret = qla25xx_delete_req_que(vha, qpair->req);
9052 if (ret != QLA_SUCCESS)
9053 goto fail;
9054
9055 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9056 if (ret != QLA_SUCCESS)
9057 goto fail;
9058
9059 mutex_lock(&ha->mq_lock);
9060 ha->queue_pair_map[qpair->id] = NULL;
9061 clear_bit(qpair->id, ha->qpair_qid_map);
9062 ha->num_qpairs--;
9063 list_del(&qpair->qp_list_elem);
9064 if (list_empty(&vha->qp_list)) {
9065 vha->flags.qpairs_available = 0;
9066 vha->flags.qpairs_req_created = 0;
9067 vha->flags.qpairs_rsp_created = 0;
9068 }
9069 mempool_destroy(qpair->srb_mempool);
9070 kfree(qpair);
9071 mutex_unlock(&ha->mq_lock);
9072
9073 return QLA_SUCCESS;
9074 fail:
9075 return ret;
9076 }
Linux with added FPC-III support