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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / scsi / qla2xxx / qla_isr.c
blobe7bad0bfffda1c09446396bc1eab1d023f4c5c89
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_target.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/cpu.h>
13 #include <linux/t10-pi.h>
14 #include <scsi/scsi_tcq.h>
15 #include <scsi/scsi_bsg_fc.h>
16 #include <scsi/scsi_eh.h>
17 #include <scsi/fc/fc_fs.h>
18 #include <linux/nvme-fc-driver.h>
19
20 static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
21 static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
22 static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
23 static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
24 sts_entry_t *);
25
26 const char *const port_state_str[] = {
27 "Unknown",
28 "UNCONFIGURED",
29 "DEAD",
30 "LOST",
31 "ONLINE"
32 };
33
34 /**
35 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
36 * @irq: interrupt number
37 * @dev_id: SCSI driver HA context
38 *
39 * Called by system whenever the host adapter generates an interrupt.
40 *
41 * Returns handled flag.
42 */
43 irqreturn_t
44 qla2100_intr_handler(int irq, void *dev_id)
45 {
46 scsi_qla_host_t *vha;
47 struct qla_hw_data *ha;
48 struct device_reg_2xxx __iomem *reg;
49 int status;
50 unsigned long iter;
51 uint16_t hccr;
52 uint16_t mb[8];
53 struct rsp_que *rsp;
54 unsigned long flags;
55
56 rsp = (struct rsp_que *) dev_id;
57 if (!rsp) {
58 ql_log(ql_log_info, NULL, 0x505d,
59 "%s: NULL response queue pointer.\n", __func__);
60 return (IRQ_NONE);
61 }
62
63 ha = rsp->hw;
64 reg = &ha->iobase->isp;
65 status = 0;
66
67 spin_lock_irqsave(&ha->hardware_lock, flags);
68 vha = pci_get_drvdata(ha->pdev);
69 for (iter = 50; iter--; ) {
70 hccr = RD_REG_WORD(&reg->hccr);
71 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
72 break;
73 if (hccr & HCCR_RISC_PAUSE) {
74 if (pci_channel_offline(ha->pdev))
75 break;
76
77 /*
78 * Issue a "HARD" reset in order for the RISC interrupt
79 * bit to be cleared. Schedule a big hammer to get
80 * out of the RISC PAUSED state.
81 */
82 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
83 RD_REG_WORD(&reg->hccr);
84
85 ha->isp_ops->fw_dump(vha, 1);
86 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
87 break;
88 } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
89 break;
90
91 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
92 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
93 RD_REG_WORD(&reg->hccr);
94
95 /* Get mailbox data. */
96 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
97 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
98 qla2x00_mbx_completion(vha, mb[0]);
99 status |= MBX_INTERRUPT;
100 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
101 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
102 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
103 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
104 qla2x00_async_event(vha, rsp, mb);
105 } else {
106 /*EMPTY*/
107 ql_dbg(ql_dbg_async, vha, 0x5025,
108 "Unrecognized interrupt type (%d).\n",
109 mb[0]);
110 }
111 /* Release mailbox registers. */
112 WRT_REG_WORD(&reg->semaphore, 0);
113 RD_REG_WORD(&reg->semaphore);
114 } else {
115 qla2x00_process_response_queue(rsp);
116
117 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
118 RD_REG_WORD(&reg->hccr);
119 }
120 }
121 qla2x00_handle_mbx_completion(ha, status);
122 spin_unlock_irqrestore(&ha->hardware_lock, flags);
123
124 return (IRQ_HANDLED);
125 }
126
127 bool
128 qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
129 {
130 /* Check for PCI disconnection */
131 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
132 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
133 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
134 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
135 /*
136 * Schedule this (only once) on the default system
137 * workqueue so that all the adapter workqueues and the
138 * DPC thread can be shutdown cleanly.
139 */
140 schedule_work(&vha->hw->board_disable);
141 }
142 return true;
143 } else
144 return false;
145 }
146
147 bool
148 qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
149 {
150 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
151 }
152
153 /**
154 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
155 * @irq: interrupt number
156 * @dev_id: SCSI driver HA context
157 *
158 * Called by system whenever the host adapter generates an interrupt.
159 *
160 * Returns handled flag.
161 */
162 irqreturn_t
163 qla2300_intr_handler(int irq, void *dev_id)
164 {
165 scsi_qla_host_t *vha;
166 struct device_reg_2xxx __iomem *reg;
167 int status;
168 unsigned long iter;
169 uint32_t stat;
170 uint16_t hccr;
171 uint16_t mb[8];
172 struct rsp_que *rsp;
173 struct qla_hw_data *ha;
174 unsigned long flags;
175
176 rsp = (struct rsp_que *) dev_id;
177 if (!rsp) {
178 ql_log(ql_log_info, NULL, 0x5058,
179 "%s: NULL response queue pointer.\n", __func__);
180 return (IRQ_NONE);
181 }
182
183 ha = rsp->hw;
184 reg = &ha->iobase->isp;
185 status = 0;
186
187 spin_lock_irqsave(&ha->hardware_lock, flags);
188 vha = pci_get_drvdata(ha->pdev);
189 for (iter = 50; iter--; ) {
190 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
191 if (qla2x00_check_reg32_for_disconnect(vha, stat))
192 break;
193 if (stat & HSR_RISC_PAUSED) {
194 if (unlikely(pci_channel_offline(ha->pdev)))
195 break;
196
197 hccr = RD_REG_WORD(&reg->hccr);
198
199 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
200 ql_log(ql_log_warn, vha, 0x5026,
201 "Parity error -- HCCR=%x, Dumping "
202 "firmware.\n", hccr);
203 else
204 ql_log(ql_log_warn, vha, 0x5027,
205 "RISC paused -- HCCR=%x, Dumping "
206 "firmware.\n", hccr);
207
208 /*
209 * Issue a "HARD" reset in order for the RISC
210 * interrupt bit to be cleared. Schedule a big
211 * hammer to get out of the RISC PAUSED state.
212 */
213 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
214 RD_REG_WORD(&reg->hccr);
215
216 ha->isp_ops->fw_dump(vha, 1);
217 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
218 break;
219 } else if ((stat & HSR_RISC_INT) == 0)
220 break;
221
222 switch (stat & 0xff) {
223 case 0x1:
224 case 0x2:
225 case 0x10:
226 case 0x11:
227 qla2x00_mbx_completion(vha, MSW(stat));
228 status |= MBX_INTERRUPT;
229
230 /* Release mailbox registers. */
231 WRT_REG_WORD(&reg->semaphore, 0);
232 break;
233 case 0x12:
234 mb[0] = MSW(stat);
235 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
236 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
237 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
238 qla2x00_async_event(vha, rsp, mb);
239 break;
240 case 0x13:
241 qla2x00_process_response_queue(rsp);
242 break;
243 case 0x15:
244 mb[0] = MBA_CMPLT_1_16BIT;
245 mb[1] = MSW(stat);
246 qla2x00_async_event(vha, rsp, mb);
247 break;
248 case 0x16:
249 mb[0] = MBA_SCSI_COMPLETION;
250 mb[1] = MSW(stat);
251 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
252 qla2x00_async_event(vha, rsp, mb);
253 break;
254 default:
255 ql_dbg(ql_dbg_async, vha, 0x5028,
256 "Unrecognized interrupt type (%d).\n", stat & 0xff);
257 break;
258 }
259 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
260 RD_REG_WORD_RELAXED(&reg->hccr);
261 }
262 qla2x00_handle_mbx_completion(ha, status);
263 spin_unlock_irqrestore(&ha->hardware_lock, flags);
264
265 return (IRQ_HANDLED);
266 }
267
268 /**
269 * qla2x00_mbx_completion() - Process mailbox command completions.
270 * @vha: SCSI driver HA context
271 * @mb0: Mailbox0 register
272 */
273 static void
274 qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
275 {
276 uint16_t cnt;
277 uint32_t mboxes;
278 uint16_t __iomem *wptr;
279 struct qla_hw_data *ha = vha->hw;
280 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
281
282 /* Read all mbox registers? */
283 WARN_ON_ONCE(ha->mbx_count > 32);
284 mboxes = (1ULL << ha->mbx_count) - 1;
285 if (!ha->mcp)
286 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
287 else
288 mboxes = ha->mcp->in_mb;
289
290 /* Load return mailbox registers. */
291 ha->flags.mbox_int = 1;
292 ha->mailbox_out[0] = mb0;
293 mboxes >>= 1;
294 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
295
296 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
297 if (IS_QLA2200(ha) && cnt == 8)
298 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
299 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
300 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
301 else if (mboxes & BIT_0)
302 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
303
304 wptr++;
305 mboxes >>= 1;
306 }
307 }
308
309 static void
310 qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
311 {
312 static char *event[] =
313 { "Complete", "Request Notification", "Time Extension" };
314 int rval;
315 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
316 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
317 uint16_t __iomem *wptr;
318 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
319
320 /* Seed data -- mailbox1 -> mailbox7. */
321 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
322 wptr = (uint16_t __iomem *)&reg24->mailbox1;
323 else if (IS_QLA8044(vha->hw))
324 wptr = (uint16_t __iomem *)&reg82->mailbox_out[1];
325 else
326 return;
327
328 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
329 mb[cnt] = RD_REG_WORD(wptr);
330
331 ql_dbg(ql_dbg_async, vha, 0x5021,
332 "Inter-Driver Communication %s -- "
333 "%04x %04x %04x %04x %04x %04x %04x.\n",
334 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
335 mb[4], mb[5], mb[6]);
336 switch (aen) {
337 /* Handle IDC Error completion case. */
338 case MBA_IDC_COMPLETE:
339 if (mb[1] >> 15) {
340 vha->hw->flags.idc_compl_status = 1;
341 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
342 complete(&vha->hw->dcbx_comp);
343 }
344 break;
345
346 case MBA_IDC_NOTIFY:
347 /* Acknowledgement needed? [Notify && non-zero timeout]. */
348 timeout = (descr >> 8) & 0xf;
349 ql_dbg(ql_dbg_async, vha, 0x5022,
350 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
351 vha->host_no, event[aen & 0xff], timeout);
352
353 if (!timeout)
354 return;
355 rval = qla2x00_post_idc_ack_work(vha, mb);
356 if (rval != QLA_SUCCESS)
357 ql_log(ql_log_warn, vha, 0x5023,
358 "IDC failed to post ACK.\n");
359 break;
360 case MBA_IDC_TIME_EXT:
361 vha->hw->idc_extend_tmo = descr;
362 ql_dbg(ql_dbg_async, vha, 0x5087,
363 "%lu Inter-Driver Communication %s -- "
364 "Extend timeout by=%d.\n",
365 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
366 break;
367 }
368 }
369
370 #define LS_UNKNOWN 2
371 const char *
372 qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
373 {
374 static const char *const link_speeds[] = {
375 "1", "2", "?", "4", "8", "16", "32", "10"
376 };
377 #define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1)
378
379 if (IS_QLA2100(ha) || IS_QLA2200(ha))
380 return link_speeds[0];
381 else if (speed == 0x13)
382 return link_speeds[QLA_LAST_SPEED];
383 else if (speed < QLA_LAST_SPEED)
384 return link_speeds[speed];
385 else
386 return link_speeds[LS_UNKNOWN];
387 }
388
389 static void
390 qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
391 {
392 struct qla_hw_data *ha = vha->hw;
393
394 /*
395 * 8200 AEN Interpretation:
396 * mb[0] = AEN code
397 * mb[1] = AEN Reason code
398 * mb[2] = LSW of Peg-Halt Status-1 Register
399 * mb[6] = MSW of Peg-Halt Status-1 Register
400 * mb[3] = LSW of Peg-Halt Status-2 register
401 * mb[7] = MSW of Peg-Halt Status-2 register
402 * mb[4] = IDC Device-State Register value
403 * mb[5] = IDC Driver-Presence Register value
404 */
405 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
406 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
407 mb[0], mb[1], mb[2], mb[6]);
408 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
409 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
410 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
411
412 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
413 IDC_HEARTBEAT_FAILURE)) {
414 ha->flags.nic_core_hung = 1;
415 ql_log(ql_log_warn, vha, 0x5060,
416 "83XX: F/W Error Reported: Check if reset required.\n");
417
418 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
419 uint32_t protocol_engine_id, fw_err_code, err_level;
420
421 /*
422 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
423 * - PEG-Halt Status-1 Register:
424 * (LSW = mb[2], MSW = mb[6])
425 * Bits 0-7 = protocol-engine ID
426 * Bits 8-28 = f/w error code
427 * Bits 29-31 = Error-level
428 * Error-level 0x1 = Non-Fatal error
429 * Error-level 0x2 = Recoverable Fatal error
430 * Error-level 0x4 = UnRecoverable Fatal error
431 * - PEG-Halt Status-2 Register:
432 * (LSW = mb[3], MSW = mb[7])
433 */
434 protocol_engine_id = (mb[2] & 0xff);
435 fw_err_code = (((mb[2] & 0xff00) >> 8) |
436 ((mb[6] & 0x1fff) << 8));
437 err_level = ((mb[6] & 0xe000) >> 13);
438 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
439 "Register: protocol_engine_id=0x%x "
440 "fw_err_code=0x%x err_level=0x%x.\n",
441 protocol_engine_id, fw_err_code, err_level);
442 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
443 "Register: 0x%x%x.\n", mb[7], mb[3]);
444 if (err_level == ERR_LEVEL_NON_FATAL) {
445 ql_log(ql_log_warn, vha, 0x5063,
446 "Not a fatal error, f/w has recovered itself.\n");
447 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
448 ql_log(ql_log_fatal, vha, 0x5064,
449 "Recoverable Fatal error: Chip reset "
450 "required.\n");
451 qla83xx_schedule_work(vha,
452 QLA83XX_NIC_CORE_RESET);
453 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
454 ql_log(ql_log_fatal, vha, 0x5065,
455 "Unrecoverable Fatal error: Set FAILED "
456 "state, reboot required.\n");
457 qla83xx_schedule_work(vha,
458 QLA83XX_NIC_CORE_UNRECOVERABLE);
459 }
460 }
461
462 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
463 uint16_t peg_fw_state, nw_interface_link_up;
464 uint16_t nw_interface_signal_detect, sfp_status;
465 uint16_t htbt_counter, htbt_monitor_enable;
466 uint16_t sfp_additional_info, sfp_multirate;
467 uint16_t sfp_tx_fault, link_speed, dcbx_status;
468
469 /*
470 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
471 * - PEG-to-FC Status Register:
472 * (LSW = mb[2], MSW = mb[6])
473 * Bits 0-7 = Peg-Firmware state
474 * Bit 8 = N/W Interface Link-up
475 * Bit 9 = N/W Interface signal detected
476 * Bits 10-11 = SFP Status
477 * SFP Status 0x0 = SFP+ transceiver not expected
478 * SFP Status 0x1 = SFP+ transceiver not present
479 * SFP Status 0x2 = SFP+ transceiver invalid
480 * SFP Status 0x3 = SFP+ transceiver present and
481 * valid
482 * Bits 12-14 = Heartbeat Counter
483 * Bit 15 = Heartbeat Monitor Enable
484 * Bits 16-17 = SFP Additional Info
485 * SFP info 0x0 = Unregocnized transceiver for
486 * Ethernet
487 * SFP info 0x1 = SFP+ brand validation failed
488 * SFP info 0x2 = SFP+ speed validation failed
489 * SFP info 0x3 = SFP+ access error
490 * Bit 18 = SFP Multirate
491 * Bit 19 = SFP Tx Fault
492 * Bits 20-22 = Link Speed
493 * Bits 23-27 = Reserved
494 * Bits 28-30 = DCBX Status
495 * DCBX Status 0x0 = DCBX Disabled
496 * DCBX Status 0x1 = DCBX Enabled
497 * DCBX Status 0x2 = DCBX Exchange error
498 * Bit 31 = Reserved
499 */
500 peg_fw_state = (mb[2] & 0x00ff);
501 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
502 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
503 sfp_status = ((mb[2] & 0x0c00) >> 10);
504 htbt_counter = ((mb[2] & 0x7000) >> 12);
505 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
506 sfp_additional_info = (mb[6] & 0x0003);
507 sfp_multirate = ((mb[6] & 0x0004) >> 2);
508 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
509 link_speed = ((mb[6] & 0x0070) >> 4);
510 dcbx_status = ((mb[6] & 0x7000) >> 12);
511
512 ql_log(ql_log_warn, vha, 0x5066,
513 "Peg-to-Fc Status Register:\n"
514 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
515 "nw_interface_signal_detect=0x%x"
516 "\nsfp_statis=0x%x.\n ", peg_fw_state,
517 nw_interface_link_up, nw_interface_signal_detect,
518 sfp_status);
519 ql_log(ql_log_warn, vha, 0x5067,
520 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
521 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
522 htbt_counter, htbt_monitor_enable,
523 sfp_additional_info, sfp_multirate);
524 ql_log(ql_log_warn, vha, 0x5068,
525 "sfp_tx_fault=0x%x, link_state=0x%x, "
526 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
527 dcbx_status);
528
529 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
530 }
531
532 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
533 ql_log(ql_log_warn, vha, 0x5069,
534 "Heartbeat Failure encountered, chip reset "
535 "required.\n");
536
537 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
538 }
539 }
540
541 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
542 ql_log(ql_log_info, vha, 0x506a,
543 "IDC Device-State changed = 0x%x.\n", mb[4]);
544 if (ha->flags.nic_core_reset_owner)
545 return;
546 qla83xx_schedule_work(vha, MBA_IDC_AEN);
547 }
548 }
549
550 int
551 qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
552 {
553 struct qla_hw_data *ha = vha->hw;
554 scsi_qla_host_t *vp;
555 uint32_t vp_did;
556 unsigned long flags;
557 int ret = 0;
558
559 if (!ha->num_vhosts)
560 return ret;
561
562 spin_lock_irqsave(&ha->vport_slock, flags);
563 list_for_each_entry(vp, &ha->vp_list, list) {
564 vp_did = vp->d_id.b24;
565 if (vp_did == rscn_entry) {
566 ret = 1;
567 break;
568 }
569 }
570 spin_unlock_irqrestore(&ha->vport_slock, flags);
571
572 return ret;
573 }
574
575 fc_port_t *
576 qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
577 {
578 fc_port_t *f, *tf;
579
580 f = tf = NULL;
581 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
582 if (f->loop_id == loop_id)
583 return f;
584 return NULL;
585 }
586
587 fc_port_t *
588 qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
589 {
590 fc_port_t *f, *tf;
591
592 f = tf = NULL;
593 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
594 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
595 if (incl_deleted)
596 return f;
597 else if (f->deleted == 0)
598 return f;
599 }
600 }
601 return NULL;
602 }
603
604 fc_port_t *
605 qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
606 u8 incl_deleted)
607 {
608 fc_port_t *f, *tf;
609
610 f = tf = NULL;
611 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
612 if (f->d_id.b24 == id->b24) {
613 if (incl_deleted)
614 return f;
615 else if (f->deleted == 0)
616 return f;
617 }
618 }
619 return NULL;
620 }
621
622 /**
623 * qla2x00_async_event() - Process aynchronous events.
624 * @vha: SCSI driver HA context
625 * @rsp: response queue
626 * @mb: Mailbox registers (0 - 3)
627 */
628 void
629 qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
630 {
631 uint16_t handle_cnt;
632 uint16_t cnt, mbx;
633 uint32_t handles[5];
634 struct qla_hw_data *ha = vha->hw;
635 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
636 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
637 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
638 uint32_t rscn_entry, host_pid;
639 unsigned long flags;
640 fc_port_t *fcport = NULL;
641
642 if (!vha->hw->flags.fw_started)
643 return;
644
645 /* Setup to process RIO completion. */
646 handle_cnt = 0;
647 if (IS_CNA_CAPABLE(ha))
648 goto skip_rio;
649 switch (mb[0]) {
650 case MBA_SCSI_COMPLETION:
651 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
652 handle_cnt = 1;
653 break;
654 case MBA_CMPLT_1_16BIT:
655 handles[0] = mb[1];
656 handle_cnt = 1;
657 mb[0] = MBA_SCSI_COMPLETION;
658 break;
659 case MBA_CMPLT_2_16BIT:
660 handles[0] = mb[1];
661 handles[1] = mb[2];
662 handle_cnt = 2;
663 mb[0] = MBA_SCSI_COMPLETION;
664 break;
665 case MBA_CMPLT_3_16BIT:
666 handles[0] = mb[1];
667 handles[1] = mb[2];
668 handles[2] = mb[3];
669 handle_cnt = 3;
670 mb[0] = MBA_SCSI_COMPLETION;
671 break;
672 case MBA_CMPLT_4_16BIT:
673 handles[0] = mb[1];
674 handles[1] = mb[2];
675 handles[2] = mb[3];
676 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
677 handle_cnt = 4;
678 mb[0] = MBA_SCSI_COMPLETION;
679 break;
680 case MBA_CMPLT_5_16BIT:
681 handles[0] = mb[1];
682 handles[1] = mb[2];
683 handles[2] = mb[3];
684 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
685 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
686 handle_cnt = 5;
687 mb[0] = MBA_SCSI_COMPLETION;
688 break;
689 case MBA_CMPLT_2_32BIT:
690 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
691 handles[1] = le32_to_cpu(
692 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
693 RD_MAILBOX_REG(ha, reg, 6));
694 handle_cnt = 2;
695 mb[0] = MBA_SCSI_COMPLETION;
696 break;
697 default:
698 break;
699 }
700 skip_rio:
701 switch (mb[0]) {
702 case MBA_SCSI_COMPLETION: /* Fast Post */
703 if (!vha->flags.online)
704 break;
705
706 for (cnt = 0; cnt < handle_cnt; cnt++)
707 qla2x00_process_completed_request(vha, rsp->req,
708 handles[cnt]);
709 break;
710
711 case MBA_RESET: /* Reset */
712 ql_dbg(ql_dbg_async, vha, 0x5002,
713 "Asynchronous RESET.\n");
714
715 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
716 break;
717
718 case MBA_SYSTEM_ERR: /* System Error */
719 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
720 IS_QLA28XX(ha)) ?
721 RD_REG_WORD(&reg24->mailbox7) : 0;
722 ql_log(ql_log_warn, vha, 0x5003,
723 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
724 "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
725 ha->fw_dump_mpi =
726 (IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
727 RD_REG_WORD(&reg24->mailbox7) & BIT_8;
728 ha->isp_ops->fw_dump(vha, 1);
729 ha->flags.fw_init_done = 0;
730 QLA_FW_STOPPED(ha);
731
732 if (IS_FWI2_CAPABLE(ha)) {
733 if (mb[1] == 0 && mb[2] == 0) {
734 ql_log(ql_log_fatal, vha, 0x5004,
735 "Unrecoverable Hardware Error: adapter "
736 "marked OFFLINE!\n");
737 vha->flags.online = 0;
738 vha->device_flags |= DFLG_DEV_FAILED;
739 } else {
740 /* Check to see if MPI timeout occurred */
741 if ((mbx & MBX_3) && (ha->port_no == 0))
742 set_bit(MPI_RESET_NEEDED,
743 &vha->dpc_flags);
744
745 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
746 }
747 } else if (mb[1] == 0) {
748 ql_log(ql_log_fatal, vha, 0x5005,
749 "Unrecoverable Hardware Error: adapter marked "
750 "OFFLINE!\n");
751 vha->flags.online = 0;
752 vha->device_flags |= DFLG_DEV_FAILED;
753 } else
754 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
755 break;
756
757 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
758 ql_log(ql_log_warn, vha, 0x5006,
759 "ISP Request Transfer Error (%x).\n", mb[1]);
760
761 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
762 break;
763
764 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
765 ql_log(ql_log_warn, vha, 0x5007,
766 "ISP Response Transfer Error (%x).\n", mb[1]);
767
768 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
769 break;
770
771 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
772 ql_dbg(ql_dbg_async, vha, 0x5008,
773 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
774 break;
775
776 case MBA_LOOP_INIT_ERR:
777 ql_log(ql_log_warn, vha, 0x5090,
778 "LOOP INIT ERROR (%x).\n", mb[1]);
779 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
780 break;
781
782 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
783 ha->flags.lip_ae = 1;
784
785 ql_dbg(ql_dbg_async, vha, 0x5009,
786 "LIP occurred (%x).\n", mb[1]);
787
788 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
789 atomic_set(&vha->loop_state, LOOP_DOWN);
790 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
791 qla2x00_mark_all_devices_lost(vha);
792 }
793
794 if (vha->vp_idx) {
795 atomic_set(&vha->vp_state, VP_FAILED);
796 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
797 }
798
799 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
800 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
801
802 vha->flags.management_server_logged_in = 0;
803 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
804 break;
805
806 case MBA_LOOP_UP: /* Loop Up Event */
807 if (IS_QLA2100(ha) || IS_QLA2200(ha))
808 ha->link_data_rate = PORT_SPEED_1GB;
809 else
810 ha->link_data_rate = mb[1];
811
812 ql_log(ql_log_info, vha, 0x500a,
813 "LOOP UP detected (%s Gbps).\n",
814 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
815
816 vha->flags.management_server_logged_in = 0;
817 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
818
819 if (AUTO_DETECT_SFP_SUPPORT(vha)) {
820 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
821 qla2xxx_wake_dpc(vha);
822 }
823 break;
824
825 case MBA_LOOP_DOWN: /* Loop Down Event */
826 SAVE_TOPO(ha);
827 ha->flags.lip_ae = 0;
828 ha->current_topology = 0;
829
830 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
831 ? RD_REG_WORD(&reg24->mailbox4) : 0;
832 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(&reg82->mailbox_out[4])
833 : mbx;
834 ql_log(ql_log_info, vha, 0x500b,
835 "LOOP DOWN detected (%x %x %x %x).\n",
836 mb[1], mb[2], mb[3], mbx);
837
838 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
839 atomic_set(&vha->loop_state, LOOP_DOWN);
840 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
841 /*
842 * In case of loop down, restore WWPN from
843 * NVRAM in case of FA-WWPN capable ISP
844 * Restore for Physical Port only
845 */
846 if (!vha->vp_idx) {
847 if (ha->flags.fawwpn_enabled &&
848 (ha->current_topology == ISP_CFG_F)) {
849 void *wwpn = ha->init_cb->port_name;
850
851 memcpy(vha->port_name, wwpn, WWN_SIZE);
852 fc_host_port_name(vha->host) =
853 wwn_to_u64(vha->port_name);
854 ql_dbg(ql_dbg_init + ql_dbg_verbose,
855 vha, 0x00d8, "LOOP DOWN detected,"
856 "restore WWPN %016llx\n",
857 wwn_to_u64(vha->port_name));
858 }
859
860 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
861 }
862
863 vha->device_flags |= DFLG_NO_CABLE;
864 qla2x00_mark_all_devices_lost(vha);
865 }
866
867 if (vha->vp_idx) {
868 atomic_set(&vha->vp_state, VP_FAILED);
869 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
870 }
871
872 vha->flags.management_server_logged_in = 0;
873 ha->link_data_rate = PORT_SPEED_UNKNOWN;
874 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
875 break;
876
877 case MBA_LIP_RESET: /* LIP reset occurred */
878 ql_dbg(ql_dbg_async, vha, 0x500c,
879 "LIP reset occurred (%x).\n", mb[1]);
880
881 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
882 atomic_set(&vha->loop_state, LOOP_DOWN);
883 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
884 qla2x00_mark_all_devices_lost(vha);
885 }
886
887 if (vha->vp_idx) {
888 atomic_set(&vha->vp_state, VP_FAILED);
889 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
890 }
891
892 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
893
894 ha->operating_mode = LOOP;
895 vha->flags.management_server_logged_in = 0;
896 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
897 break;
898
899 /* case MBA_DCBX_COMPLETE: */
900 case MBA_POINT_TO_POINT: /* Point-to-Point */
901 ha->flags.lip_ae = 0;
902
903 if (IS_QLA2100(ha))
904 break;
905
906 if (IS_CNA_CAPABLE(ha)) {
907 ql_dbg(ql_dbg_async, vha, 0x500d,
908 "DCBX Completed -- %04x %04x %04x.\n",
909 mb[1], mb[2], mb[3]);
910 if (ha->notify_dcbx_comp && !vha->vp_idx)
911 complete(&ha->dcbx_comp);
912
913 } else
914 ql_dbg(ql_dbg_async, vha, 0x500e,
915 "Asynchronous P2P MODE received.\n");
916
917 /*
918 * Until there's a transition from loop down to loop up, treat
919 * this as loop down only.
920 */
921 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
922 atomic_set(&vha->loop_state, LOOP_DOWN);
923 if (!atomic_read(&vha->loop_down_timer))
924 atomic_set(&vha->loop_down_timer,
925 LOOP_DOWN_TIME);
926 if (!N2N_TOPO(ha))
927 qla2x00_mark_all_devices_lost(vha);
928 }
929
930 if (vha->vp_idx) {
931 atomic_set(&vha->vp_state, VP_FAILED);
932 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
933 }
934
935 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
936 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
937
938 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
939 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
940
941 vha->flags.management_server_logged_in = 0;
942 break;
943
944 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
945 if (IS_QLA2100(ha))
946 break;
947
948 ql_dbg(ql_dbg_async, vha, 0x500f,
949 "Configuration change detected: value=%x.\n", mb[1]);
950
951 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
952 atomic_set(&vha->loop_state, LOOP_DOWN);
953 if (!atomic_read(&vha->loop_down_timer))
954 atomic_set(&vha->loop_down_timer,
955 LOOP_DOWN_TIME);
956 qla2x00_mark_all_devices_lost(vha);
957 }
958
959 if (vha->vp_idx) {
960 atomic_set(&vha->vp_state, VP_FAILED);
961 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
962 }
963
964 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
965 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
966 break;
967
968 case MBA_PORT_UPDATE: /* Port database update */
969 /*
970 * Handle only global and vn-port update events
971 *
972 * Relevant inputs:
973 * mb[1] = N_Port handle of changed port
974 * OR 0xffff for global event
975 * mb[2] = New login state
976 * 7 = Port logged out
977 * mb[3] = LSB is vp_idx, 0xff = all vps
978 *
979 * Skip processing if:
980 * Event is global, vp_idx is NOT all vps,
981 * vp_idx does not match
982 * Event is not global, vp_idx does not match
983 */
984 if (IS_QLA2XXX_MIDTYPE(ha) &&
985 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
986 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
987 break;
988
989 if (mb[2] == 0x7) {
990 ql_dbg(ql_dbg_async, vha, 0x5010,
991 "Port %s %04x %04x %04x.\n",
992 mb[1] == 0xffff ? "unavailable" : "logout",
993 mb[1], mb[2], mb[3]);
994
995 if (mb[1] == 0xffff)
996 goto global_port_update;
997
998 if (mb[1] == NPH_SNS_LID(ha)) {
999 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1000 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1001 break;
1002 }
1003
1004 /* use handle_cnt for loop id/nport handle */
1005 if (IS_FWI2_CAPABLE(ha))
1006 handle_cnt = NPH_SNS;
1007 else
1008 handle_cnt = SIMPLE_NAME_SERVER;
1009 if (mb[1] == handle_cnt) {
1010 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1011 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1012 break;
1013 }
1014
1015 /* Port logout */
1016 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
1017 if (!fcport)
1018 break;
1019 if (atomic_read(&fcport->state) != FCS_ONLINE)
1020 break;
1021 ql_dbg(ql_dbg_async, vha, 0x508a,
1022 "Marking port lost loopid=%04x portid=%06x.\n",
1023 fcport->loop_id, fcport->d_id.b24);
1024 if (qla_ini_mode_enabled(vha)) {
1025 fcport->logout_on_delete = 0;
1026 qlt_schedule_sess_for_deletion(fcport);
1027 }
1028 break;
1029
1030 global_port_update:
1031 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1032 atomic_set(&vha->loop_state, LOOP_DOWN);
1033 atomic_set(&vha->loop_down_timer,
1034 LOOP_DOWN_TIME);
1035 vha->device_flags |= DFLG_NO_CABLE;
1036 qla2x00_mark_all_devices_lost(vha);
1037 }
1038
1039 if (vha->vp_idx) {
1040 atomic_set(&vha->vp_state, VP_FAILED);
1041 fc_vport_set_state(vha->fc_vport,
1042 FC_VPORT_FAILED);
1043 qla2x00_mark_all_devices_lost(vha);
1044 }
1045
1046 vha->flags.management_server_logged_in = 0;
1047 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1048 break;
1049 }
1050
1051 /*
1052 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1053 * event etc. earlier indicating loop is down) then process
1054 * it. Otherwise ignore it and Wait for RSCN to come in.
1055 */
1056 atomic_set(&vha->loop_down_timer, 0);
1057 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
1058 !ha->flags.n2n_ae &&
1059 atomic_read(&vha->loop_state) != LOOP_DEAD) {
1060 ql_dbg(ql_dbg_async, vha, 0x5011,
1061 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
1062 mb[1], mb[2], mb[3]);
1063 break;
1064 }
1065
1066 ql_dbg(ql_dbg_async, vha, 0x5012,
1067 "Port database changed %04x %04x %04x.\n",
1068 mb[1], mb[2], mb[3]);
1069
1070 /*
1071 * Mark all devices as missing so we will login again.
1072 */
1073 atomic_set(&vha->loop_state, LOOP_UP);
1074 vha->scan.scan_retry = 0;
1075
1076 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1077 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1078 set_bit(VP_CONFIG_OK, &vha->vp_flags);
1079 break;
1080
1081 case MBA_RSCN_UPDATE: /* State Change Registration */
1082 /* Check if the Vport has issued a SCR */
1083 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
1084 break;
1085 /* Only handle SCNs for our Vport index. */
1086 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
1087 break;
1088
1089 ql_dbg(ql_dbg_async, vha, 0x5013,
1090 "RSCN database changed -- %04x %04x %04x.\n",
1091 mb[1], mb[2], mb[3]);
1092
1093 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
1094 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1095 | vha->d_id.b.al_pa;
1096 if (rscn_entry == host_pid) {
1097 ql_dbg(ql_dbg_async, vha, 0x5014,
1098 "Ignoring RSCN update to local host "
1099 "port ID (%06x).\n", host_pid);
1100 break;
1101 }
1102
1103 /* Ignore reserved bits from RSCN-payload. */
1104 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1105
1106 /* Skip RSCNs for virtual ports on the same physical port */
1107 if (qla2x00_is_a_vp_did(vha, rscn_entry))
1108 break;
1109
1110 atomic_set(&vha->loop_down_timer, 0);
1111 vha->flags.management_server_logged_in = 0;
1112 {
1113 struct event_arg ea;
1114
1115 memset(&ea, 0, sizeof(ea));
1116 ea.id.b24 = rscn_entry;
1117 ea.id.b.rsvd_1 = rscn_entry >> 24;
1118 qla2x00_handle_rscn(vha, &ea);
1119 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
1120 }
1121 break;
1122 /* case MBA_RIO_RESPONSE: */
1123 case MBA_ZIO_RESPONSE:
1124 ql_dbg(ql_dbg_async, vha, 0x5015,
1125 "[R|Z]IO update completion.\n");
1126
1127 if (IS_FWI2_CAPABLE(ha))
1128 qla24xx_process_response_queue(vha, rsp);
1129 else
1130 qla2x00_process_response_queue(rsp);
1131 break;
1132
1133 case MBA_DISCARD_RND_FRAME:
1134 ql_dbg(ql_dbg_async, vha, 0x5016,
1135 "Discard RND Frame -- %04x %04x %04x.\n",
1136 mb[1], mb[2], mb[3]);
1137 break;
1138
1139 case MBA_TRACE_NOTIFICATION:
1140 ql_dbg(ql_dbg_async, vha, 0x5017,
1141 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
1142 break;
1143
1144 case MBA_ISP84XX_ALERT:
1145 ql_dbg(ql_dbg_async, vha, 0x5018,
1146 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1147 mb[1], mb[2], mb[3]);
1148
1149 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1150 switch (mb[1]) {
1151 case A84_PANIC_RECOVERY:
1152 ql_log(ql_log_info, vha, 0x5019,
1153 "Alert 84XX: panic recovery %04x %04x.\n",
1154 mb[2], mb[3]);
1155 break;
1156 case A84_OP_LOGIN_COMPLETE:
1157 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
1158 ql_log(ql_log_info, vha, 0x501a,
1159 "Alert 84XX: firmware version %x.\n",
1160 ha->cs84xx->op_fw_version);
1161 break;
1162 case A84_DIAG_LOGIN_COMPLETE:
1163 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1164 ql_log(ql_log_info, vha, 0x501b,
1165 "Alert 84XX: diagnostic firmware version %x.\n",
1166 ha->cs84xx->diag_fw_version);
1167 break;
1168 case A84_GOLD_LOGIN_COMPLETE:
1169 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1170 ha->cs84xx->fw_update = 1;
1171 ql_log(ql_log_info, vha, 0x501c,
1172 "Alert 84XX: gold firmware version %x.\n",
1173 ha->cs84xx->gold_fw_version);
1174 break;
1175 default:
1176 ql_log(ql_log_warn, vha, 0x501d,
1177 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
1178 mb[1], mb[2], mb[3]);
1179 }
1180 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1181 break;
1182 case MBA_DCBX_START:
1183 ql_dbg(ql_dbg_async, vha, 0x501e,
1184 "DCBX Started -- %04x %04x %04x.\n",
1185 mb[1], mb[2], mb[3]);
1186 break;
1187 case MBA_DCBX_PARAM_UPDATE:
1188 ql_dbg(ql_dbg_async, vha, 0x501f,
1189 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1190 mb[1], mb[2], mb[3]);
1191 break;
1192 case MBA_FCF_CONF_ERR:
1193 ql_dbg(ql_dbg_async, vha, 0x5020,
1194 "FCF Configuration Error -- %04x %04x %04x.\n",
1195 mb[1], mb[2], mb[3]);
1196 break;
1197 case MBA_IDC_NOTIFY:
1198 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
1199 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1200 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1201 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1202 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
1203 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
1204 /*
1205 * Extend loop down timer since port is active.
1206 */
1207 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1208 atomic_set(&vha->loop_down_timer,
1209 LOOP_DOWN_TIME);
1210 qla2xxx_wake_dpc(vha);
1211 }
1212 }
1213 /* fall through */
1214 case MBA_IDC_COMPLETE:
1215 if (ha->notify_lb_portup_comp && !vha->vp_idx)
1216 complete(&ha->lb_portup_comp);
1217 /* Fallthru */
1218 case MBA_IDC_TIME_EXT:
1219 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1220 IS_QLA8044(ha))
1221 qla81xx_idc_event(vha, mb[0], mb[1]);
1222 break;
1223
1224 case MBA_IDC_AEN:
1225 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1226 ha->flags.fw_init_done = 0;
1227 ql_log(ql_log_warn, vha, 0xffff,
1228 "MPI Heartbeat stop. Chip reset needed. MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n",
1229 mb[0], mb[1], mb[2], mb[3]);
1230
1231 if ((mb[1] & BIT_8) ||
1232 (mb[2] & BIT_8)) {
1233 ql_log(ql_log_warn, vha, 0xd013,
1234 "MPI Heartbeat stop. FW dump needed\n");
1235 ha->fw_dump_mpi = 1;
1236 ha->isp_ops->fw_dump(vha, 1);
1237 }
1238 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1239 qla2xxx_wake_dpc(vha);
1240 } else if (IS_QLA83XX(ha)) {
1241 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1242 mb[5] = RD_REG_WORD(&reg24->mailbox5);
1243 mb[6] = RD_REG_WORD(&reg24->mailbox6);
1244 mb[7] = RD_REG_WORD(&reg24->mailbox7);
1245 qla83xx_handle_8200_aen(vha, mb);
1246 } else {
1247 ql_dbg(ql_dbg_async, vha, 0x5052,
1248 "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n",
1249 mb[0], mb[1], mb[2], mb[3]);
1250 }
1251 break;
1252
1253 case MBA_DPORT_DIAGNOSTICS:
1254 ql_dbg(ql_dbg_async, vha, 0x5052,
1255 "D-Port Diagnostics: %04x %04x %04x %04x\n",
1256 mb[0], mb[1], mb[2], mb[3]);
1257 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1258 static char *results[] = {
1259 "start", "done(pass)", "done(error)", "undefined" };
1260 static char *types[] = {
1261 "none", "dynamic", "static", "other" };
1262 uint result = mb[1] >> 0 & 0x3;
1263 uint type = mb[1] >> 6 & 0x3;
1264 uint sw = mb[1] >> 15 & 0x1;
1265 ql_dbg(ql_dbg_async, vha, 0x5052,
1266 "D-Port Diagnostics: result=%s type=%s [sw=%u]\n",
1267 results[result], types[type], sw);
1268 if (result == 2) {
1269 static char *reasons[] = {
1270 "reserved", "unexpected reject",
1271 "unexpected phase", "retry exceeded",
1272 "timed out", "not supported",
1273 "user stopped" };
1274 uint reason = mb[2] >> 0 & 0xf;
1275 uint phase = mb[2] >> 12 & 0xf;
1276 ql_dbg(ql_dbg_async, vha, 0x5052,
1277 "D-Port Diagnostics: reason=%s phase=%u \n",
1278 reason < 7 ? reasons[reason] : "other",
1279 phase >> 1);
1280 }
1281 }
1282 break;
1283
1284 case MBA_TEMPERATURE_ALERT:
1285 ql_dbg(ql_dbg_async, vha, 0x505e,
1286 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
1287 if (mb[1] == 0x12)
1288 schedule_work(&ha->board_disable);
1289 break;
1290
1291 case MBA_TRANS_INSERT:
1292 ql_dbg(ql_dbg_async, vha, 0x5091,
1293 "Transceiver Insertion: %04x\n", mb[1]);
1294 break;
1295
1296 default:
1297 ql_dbg(ql_dbg_async, vha, 0x5057,
1298 "Unknown AEN:%04x %04x %04x %04x\n",
1299 mb[0], mb[1], mb[2], mb[3]);
1300 }
1301
1302 qlt_async_event(mb[0], vha, mb);
1303
1304 if (!vha->vp_idx && ha->num_vhosts)
1305 qla2x00_alert_all_vps(rsp, mb);
1306 }
1307
1308 /**
1309 * qla2x00_process_completed_request() - Process a Fast Post response.
1310 * @vha: SCSI driver HA context
1311 * @req: request queue
1312 * @index: SRB index
1313 */
1314 void
1315 qla2x00_process_completed_request(struct scsi_qla_host *vha,
1316 struct req_que *req, uint32_t index)
1317 {
1318 srb_t *sp;
1319 struct qla_hw_data *ha = vha->hw;
1320
1321 /* Validate handle. */
1322 if (index >= req->num_outstanding_cmds) {
1323 ql_log(ql_log_warn, vha, 0x3014,
1324 "Invalid SCSI command index (%x).\n", index);
1325
1326 if (IS_P3P_TYPE(ha))
1327 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1328 else
1329 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1330 return;
1331 }
1332
1333 sp = req->outstanding_cmds[index];
1334 if (sp) {
1335 /* Free outstanding command slot. */
1336 req->outstanding_cmds[index] = NULL;
1337
1338 /* Save ISP completion status */
1339 sp->done(sp, DID_OK << 16);
1340 } else {
1341 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1342
1343 if (IS_P3P_TYPE(ha))
1344 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1345 else
1346 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1347 }
1348 }
1349
1350 srb_t *
1351 qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1352 struct req_que *req, void *iocb)
1353 {
1354 struct qla_hw_data *ha = vha->hw;
1355 sts_entry_t *pkt = iocb;
1356 srb_t *sp = NULL;
1357 uint16_t index;
1358
1359 index = LSW(pkt->handle);
1360 if (index >= req->num_outstanding_cmds) {
1361 ql_log(ql_log_warn, vha, 0x5031,
1362 "Invalid command index (%x) type %8ph.\n",
1363 index, iocb);
1364 if (IS_P3P_TYPE(ha))
1365 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1366 else
1367 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1368 goto done;
1369 }
1370 sp = req->outstanding_cmds[index];
1371 if (!sp) {
1372 ql_log(ql_log_warn, vha, 0x5032,
1373 "Invalid completion handle (%x) -- timed-out.\n", index);
1374 return sp;
1375 }
1376 if (sp->handle != index) {
1377 ql_log(ql_log_warn, vha, 0x5033,
1378 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
1379 return NULL;
1380 }
1381
1382 req->outstanding_cmds[index] = NULL;
1383
1384 done:
1385 return sp;
1386 }
1387
1388 static void
1389 qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1390 struct mbx_entry *mbx)
1391 {
1392 const char func[] = "MBX-IOCB";
1393 const char *type;
1394 fc_port_t *fcport;
1395 srb_t *sp;
1396 struct srb_iocb *lio;
1397 uint16_t *data;
1398 uint16_t status;
1399
1400 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1401 if (!sp)
1402 return;
1403
1404 lio = &sp->u.iocb_cmd;
1405 type = sp->name;
1406 fcport = sp->fcport;
1407 data = lio->u.logio.data;
1408
1409 data[0] = MBS_COMMAND_ERROR;
1410 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
1411 QLA_LOGIO_LOGIN_RETRIED : 0;
1412 if (mbx->entry_status) {
1413 ql_dbg(ql_dbg_async, vha, 0x5043,
1414 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
1415 "entry-status=%x status=%x state-flag=%x "
1416 "status-flags=%x.\n", type, sp->handle,
1417 fcport->d_id.b.domain, fcport->d_id.b.area,
1418 fcport->d_id.b.al_pa, mbx->entry_status,
1419 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
1420 le16_to_cpu(mbx->status_flags));
1421
1422 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
1423 mbx, sizeof(*mbx));
1424
1425 goto logio_done;
1426 }
1427
1428 status = le16_to_cpu(mbx->status);
1429 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
1430 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1431 status = 0;
1432 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
1433 ql_dbg(ql_dbg_async, vha, 0x5045,
1434 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1435 type, sp->handle, fcport->d_id.b.domain,
1436 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1437 le16_to_cpu(mbx->mb1));
1438
1439 data[0] = MBS_COMMAND_COMPLETE;
1440 if (sp->type == SRB_LOGIN_CMD) {
1441 fcport->port_type = FCT_TARGET;
1442 if (le16_to_cpu(mbx->mb1) & BIT_0)
1443 fcport->port_type = FCT_INITIATOR;
1444 else if (le16_to_cpu(mbx->mb1) & BIT_1)
1445 fcport->flags |= FCF_FCP2_DEVICE;
1446 }
1447 goto logio_done;
1448 }
1449
1450 data[0] = le16_to_cpu(mbx->mb0);
1451 switch (data[0]) {
1452 case MBS_PORT_ID_USED:
1453 data[1] = le16_to_cpu(mbx->mb1);
1454 break;
1455 case MBS_LOOP_ID_USED:
1456 break;
1457 default:
1458 data[0] = MBS_COMMAND_ERROR;
1459 break;
1460 }
1461
1462 ql_log(ql_log_warn, vha, 0x5046,
1463 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1464 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1465 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1466 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
1467 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
1468 le16_to_cpu(mbx->mb7));
1469
1470 logio_done:
1471 sp->done(sp, 0);
1472 }
1473
1474 static void
1475 qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1476 struct mbx_24xx_entry *pkt)
1477 {
1478 const char func[] = "MBX-IOCB2";
1479 srb_t *sp;
1480 struct srb_iocb *si;
1481 u16 sz, i;
1482 int res;
1483
1484 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1485 if (!sp)
1486 return;
1487
1488 si = &sp->u.iocb_cmd;
1489 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
1490
1491 for (i = 0; i < sz; i++)
1492 si->u.mbx.in_mb[i] = le16_to_cpu(pkt->mb[i]);
1493
1494 res = (si->u.mbx.in_mb[0] & MBS_MASK);
1495
1496 sp->done(sp, res);
1497 }
1498
1499 static void
1500 qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1501 struct nack_to_isp *pkt)
1502 {
1503 const char func[] = "nack";
1504 srb_t *sp;
1505 int res = 0;
1506
1507 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1508 if (!sp)
1509 return;
1510
1511 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
1512 res = QLA_FUNCTION_FAILED;
1513
1514 sp->done(sp, res);
1515 }
1516
1517 static void
1518 qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1519 sts_entry_t *pkt, int iocb_type)
1520 {
1521 const char func[] = "CT_IOCB";
1522 const char *type;
1523 srb_t *sp;
1524 struct bsg_job *bsg_job;
1525 struct fc_bsg_reply *bsg_reply;
1526 uint16_t comp_status;
1527 int res = 0;
1528
1529 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1530 if (!sp)
1531 return;
1532
1533 switch (sp->type) {
1534 case SRB_CT_CMD:
1535 bsg_job = sp->u.bsg_job;
1536 bsg_reply = bsg_job->reply;
1537
1538 type = "ct pass-through";
1539
1540 comp_status = le16_to_cpu(pkt->comp_status);
1541
1542 /*
1543 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1544 * fc payload to the caller
1545 */
1546 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1547 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1548
1549 if (comp_status != CS_COMPLETE) {
1550 if (comp_status == CS_DATA_UNDERRUN) {
1551 res = DID_OK << 16;
1552 bsg_reply->reply_payload_rcv_len =
1553 le16_to_cpu(pkt->rsp_info_len);
1554
1555 ql_log(ql_log_warn, vha, 0x5048,
1556 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
1557 type, comp_status,
1558 bsg_reply->reply_payload_rcv_len);
1559 } else {
1560 ql_log(ql_log_warn, vha, 0x5049,
1561 "CT pass-through-%s error comp_status=0x%x.\n",
1562 type, comp_status);
1563 res = DID_ERROR << 16;
1564 bsg_reply->reply_payload_rcv_len = 0;
1565 }
1566 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
1567 pkt, sizeof(*pkt));
1568 } else {
1569 res = DID_OK << 16;
1570 bsg_reply->reply_payload_rcv_len =
1571 bsg_job->reply_payload.payload_len;
1572 bsg_job->reply_len = 0;
1573 }
1574 break;
1575 case SRB_CT_PTHRU_CMD:
1576 /*
1577 * borrowing sts_entry_24xx.comp_status.
1578 * same location as ct_entry_24xx.comp_status
1579 */
1580 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
1581 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1582 sp->name);
1583 break;
1584 }
1585
1586 sp->done(sp, res);
1587 }
1588
1589 static void
1590 qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1591 struct sts_entry_24xx *pkt, int iocb_type)
1592 {
1593 const char func[] = "ELS_CT_IOCB";
1594 const char *type;
1595 srb_t *sp;
1596 struct bsg_job *bsg_job;
1597 struct fc_bsg_reply *bsg_reply;
1598 uint16_t comp_status;
1599 uint32_t fw_status[3];
1600 int res;
1601 struct srb_iocb *els;
1602
1603 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1604 if (!sp)
1605 return;
1606
1607 type = NULL;
1608 switch (sp->type) {
1609 case SRB_ELS_CMD_RPT:
1610 case SRB_ELS_CMD_HST:
1611 type = "els";
1612 break;
1613 case SRB_CT_CMD:
1614 type = "ct pass-through";
1615 break;
1616 case SRB_ELS_DCMD:
1617 type = "Driver ELS logo";
1618 if (iocb_type != ELS_IOCB_TYPE) {
1619 ql_dbg(ql_dbg_user, vha, 0x5047,
1620 "Completing %s: (%p) type=%d.\n",
1621 type, sp, sp->type);
1622 sp->done(sp, 0);
1623 return;
1624 }
1625 break;
1626 case SRB_CT_PTHRU_CMD:
1627 /* borrowing sts_entry_24xx.comp_status.
1628 same location as ct_entry_24xx.comp_status
1629 */
1630 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
1631 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1632 sp->name);
1633 sp->done(sp, res);
1634 return;
1635 default:
1636 ql_dbg(ql_dbg_user, vha, 0x503e,
1637 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
1638 return;
1639 }
1640
1641 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
1642 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_1);
1643 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_2);
1644
1645 if (iocb_type == ELS_IOCB_TYPE) {
1646 els = &sp->u.iocb_cmd;
1647 els->u.els_plogi.fw_status[0] = fw_status[0];
1648 els->u.els_plogi.fw_status[1] = fw_status[1];
1649 els->u.els_plogi.fw_status[2] = fw_status[2];
1650 els->u.els_plogi.comp_status = fw_status[0];
1651 if (comp_status == CS_COMPLETE) {
1652 res = DID_OK << 16;
1653 } else {
1654 if (comp_status == CS_DATA_UNDERRUN) {
1655 res = DID_OK << 16;
1656 els->u.els_plogi.len =
1657 le16_to_cpu(((struct els_sts_entry_24xx *)
1658 pkt)->total_byte_count);
1659 } else {
1660 els->u.els_plogi.len = 0;
1661 res = DID_ERROR << 16;
1662 }
1663 }
1664 ql_dbg(ql_dbg_user, vha, 0x503f,
1665 "ELS IOCB Done -%s error hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
1666 type, sp->handle, comp_status, fw_status[1], fw_status[2],
1667 le16_to_cpu(((struct els_sts_entry_24xx *)
1668 pkt)->total_byte_count));
1669 goto els_ct_done;
1670 }
1671
1672 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1673 * fc payload to the caller
1674 */
1675 bsg_job = sp->u.bsg_job;
1676 bsg_reply = bsg_job->reply;
1677 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1678 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1679
1680 if (comp_status != CS_COMPLETE) {
1681 if (comp_status == CS_DATA_UNDERRUN) {
1682 res = DID_OK << 16;
1683 bsg_reply->reply_payload_rcv_len =
1684 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
1685
1686 ql_dbg(ql_dbg_user, vha, 0x503f,
1687 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
1688 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
1689 type, sp->handle, comp_status, fw_status[1], fw_status[2],
1690 le16_to_cpu(((struct els_sts_entry_24xx *)
1691 pkt)->total_byte_count));
1692 } else {
1693 ql_dbg(ql_dbg_user, vha, 0x5040,
1694 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
1695 "error subcode 1=0x%x error subcode 2=0x%x.\n",
1696 type, sp->handle, comp_status,
1697 le16_to_cpu(((struct els_sts_entry_24xx *)
1698 pkt)->error_subcode_1),
1699 le16_to_cpu(((struct els_sts_entry_24xx *)
1700 pkt)->error_subcode_2));
1701 res = DID_ERROR << 16;
1702 bsg_reply->reply_payload_rcv_len = 0;
1703 }
1704 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
1705 fw_status, sizeof(fw_status));
1706 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
1707 pkt, sizeof(*pkt));
1708 }
1709 else {
1710 res = DID_OK << 16;
1711 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
1712 bsg_job->reply_len = 0;
1713 }
1714 els_ct_done:
1715
1716 sp->done(sp, res);
1717 }
1718
1719 static void
1720 qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
1721 struct logio_entry_24xx *logio)
1722 {
1723 const char func[] = "LOGIO-IOCB";
1724 const char *type;
1725 fc_port_t *fcport;
1726 srb_t *sp;
1727 struct srb_iocb *lio;
1728 uint16_t *data;
1729 uint32_t iop[2];
1730
1731 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
1732 if (!sp)
1733 return;
1734
1735 lio = &sp->u.iocb_cmd;
1736 type = sp->name;
1737 fcport = sp->fcport;
1738 data = lio->u.logio.data;
1739
1740 data[0] = MBS_COMMAND_ERROR;
1741 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
1742 QLA_LOGIO_LOGIN_RETRIED : 0;
1743 if (logio->entry_status) {
1744 ql_log(ql_log_warn, fcport->vha, 0x5034,
1745 "Async-%s error entry - %8phC hdl=%x"
1746 "portid=%02x%02x%02x entry-status=%x.\n",
1747 type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
1748 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1749 logio->entry_status);
1750 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
1751 logio, sizeof(*logio));
1752
1753 goto logio_done;
1754 }
1755
1756 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
1757 ql_dbg(ql_dbg_async, fcport->vha, 0x5036,
1758 "Async-%s complete - %8phC hdl=%x portid=%02x%02x%02x "
1759 "iop0=%x.\n", type, fcport->port_name, sp->handle,
1760 fcport->d_id.b.domain,
1761 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1762 le32_to_cpu(logio->io_parameter[0]));
1763
1764 vha->hw->exch_starvation = 0;
1765 data[0] = MBS_COMMAND_COMPLETE;
1766
1767 if (sp->type == SRB_PRLI_CMD) {
1768 lio->u.logio.iop[0] =
1769 le32_to_cpu(logio->io_parameter[0]);
1770 lio->u.logio.iop[1] =
1771 le32_to_cpu(logio->io_parameter[1]);
1772 goto logio_done;
1773 }
1774
1775 if (sp->type != SRB_LOGIN_CMD)
1776 goto logio_done;
1777
1778 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1779 if (iop[0] & BIT_4) {
1780 fcport->port_type = FCT_TARGET;
1781 if (iop[0] & BIT_8)
1782 fcport->flags |= FCF_FCP2_DEVICE;
1783 } else if (iop[0] & BIT_5)
1784 fcport->port_type = FCT_INITIATOR;
1785
1786 if (iop[0] & BIT_7)
1787 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1788
1789 if (logio->io_parameter[7] || logio->io_parameter[8])
1790 fcport->supported_classes |= FC_COS_CLASS2;
1791 if (logio->io_parameter[9] || logio->io_parameter[10])
1792 fcport->supported_classes |= FC_COS_CLASS3;
1793
1794 goto logio_done;
1795 }
1796
1797 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1798 iop[1] = le32_to_cpu(logio->io_parameter[1]);
1799 lio->u.logio.iop[0] = iop[0];
1800 lio->u.logio.iop[1] = iop[1];
1801 switch (iop[0]) {
1802 case LSC_SCODE_PORTID_USED:
1803 data[0] = MBS_PORT_ID_USED;
1804 data[1] = LSW(iop[1]);
1805 break;
1806 case LSC_SCODE_NPORT_USED:
1807 data[0] = MBS_LOOP_ID_USED;
1808 break;
1809 case LSC_SCODE_CMD_FAILED:
1810 if (iop[1] == 0x0606) {
1811 /*
1812 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
1813 * Target side acked.
1814 */
1815 data[0] = MBS_COMMAND_COMPLETE;
1816 goto logio_done;
1817 }
1818 data[0] = MBS_COMMAND_ERROR;
1819 break;
1820 case LSC_SCODE_NOXCB:
1821 vha->hw->exch_starvation++;
1822 if (vha->hw->exch_starvation > 5) {
1823 ql_log(ql_log_warn, vha, 0xd046,
1824 "Exchange starvation. Resetting RISC\n");
1825
1826 vha->hw->exch_starvation = 0;
1827
1828 if (IS_P3P_TYPE(vha->hw))
1829 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1830 else
1831 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1832 qla2xxx_wake_dpc(vha);
1833 }
1834 /* fall through */
1835 default:
1836 data[0] = MBS_COMMAND_ERROR;
1837 break;
1838 }
1839
1840 ql_dbg(ql_dbg_async, fcport->vha, 0x5037,
1841 "Async-%s failed - %8phC hdl=%x portid=%02x%02x%02x comp=%x "
1842 "iop0=%x iop1=%x.\n", type, fcport->port_name,
1843 sp->handle, fcport->d_id.b.domain,
1844 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1845 le16_to_cpu(logio->comp_status),
1846 le32_to_cpu(logio->io_parameter[0]),
1847 le32_to_cpu(logio->io_parameter[1]));
1848
1849 logio_done:
1850 sp->done(sp, 0);
1851 }
1852
1853 static void
1854 qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
1855 {
1856 const char func[] = "TMF-IOCB";
1857 const char *type;
1858 fc_port_t *fcport;
1859 srb_t *sp;
1860 struct srb_iocb *iocb;
1861 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
1862
1863 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
1864 if (!sp)
1865 return;
1866
1867 iocb = &sp->u.iocb_cmd;
1868 type = sp->name;
1869 fcport = sp->fcport;
1870 iocb->u.tmf.data = QLA_SUCCESS;
1871
1872 if (sts->entry_status) {
1873 ql_log(ql_log_warn, fcport->vha, 0x5038,
1874 "Async-%s error - hdl=%x entry-status(%x).\n",
1875 type, sp->handle, sts->entry_status);
1876 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1877 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
1878 ql_log(ql_log_warn, fcport->vha, 0x5039,
1879 "Async-%s error - hdl=%x completion status(%x).\n",
1880 type, sp->handle, sts->comp_status);
1881 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1882 } else if ((le16_to_cpu(sts->scsi_status) &
1883 SS_RESPONSE_INFO_LEN_VALID)) {
1884 if (le32_to_cpu(sts->rsp_data_len) < 4) {
1885 ql_log(ql_log_warn, fcport->vha, 0x503b,
1886 "Async-%s error - hdl=%x not enough response(%d).\n",
1887 type, sp->handle, sts->rsp_data_len);
1888 } else if (sts->data[3]) {
1889 ql_log(ql_log_warn, fcport->vha, 0x503c,
1890 "Async-%s error - hdl=%x response(%x).\n",
1891 type, sp->handle, sts->data[3]);
1892 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1893 }
1894 }
1895
1896 if (iocb->u.tmf.data != QLA_SUCCESS)
1897 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055,
1898 sts, sizeof(*sts));
1899
1900 sp->done(sp, 0);
1901 }
1902
1903 static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1904 void *tsk, srb_t *sp)
1905 {
1906 fc_port_t *fcport;
1907 struct srb_iocb *iocb;
1908 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
1909 uint16_t state_flags;
1910 struct nvmefc_fcp_req *fd;
1911 uint16_t ret = QLA_SUCCESS;
1912 uint16_t comp_status = le16_to_cpu(sts->comp_status);
1913
1914 iocb = &sp->u.iocb_cmd;
1915 fcport = sp->fcport;
1916 iocb->u.nvme.comp_status = comp_status;
1917 state_flags = le16_to_cpu(sts->state_flags);
1918 fd = iocb->u.nvme.desc;
1919
1920 if (unlikely(iocb->u.nvme.aen_op))
1921 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
1922
1923 /*
1924 * State flags: Bit 6 and 0.
1925 * If 0 is set, we don't care about 6.
1926 * both cases resp was dma'd to host buffer
1927 * if both are 0, that is good path case.
1928 * if six is set and 0 is clear, we need to
1929 * copy resp data from status iocb to resp buffer.
1930 */
1931 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
1932 iocb->u.nvme.rsp_pyld_len = 0;
1933 } else if ((state_flags & SF_FCP_RSP_DMA)) {
1934 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
1935 } else if (state_flags & SF_NVME_ERSP) {
1936 uint32_t *inbuf, *outbuf;
1937 uint16_t iter;
1938
1939 inbuf = (uint32_t *)&sts->nvme_ersp_data;
1940 outbuf = (uint32_t *)fd->rspaddr;
1941 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
1942 iter = iocb->u.nvme.rsp_pyld_len >> 2;
1943 for (; iter; iter--)
1944 *outbuf++ = swab32(*inbuf++);
1945 } else { /* unhandled case */
1946 ql_log(ql_log_warn, fcport->vha, 0x503a,
1947 "NVME-%s error. Unhandled state_flags of %x\n",
1948 sp->name, state_flags);
1949 }
1950
1951 fd->transferred_length = fd->payload_length -
1952 le32_to_cpu(sts->residual_len);
1953
1954 if (unlikely(comp_status != CS_COMPLETE))
1955 ql_log(ql_log_warn, fcport->vha, 0x5060,
1956 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n",
1957 sp->name, sp->handle, comp_status,
1958 fd->transferred_length, le32_to_cpu(sts->residual_len),
1959 sts->ox_id);
1960
1961 /*
1962 * If transport error then Failure (HBA rejects request)
1963 * otherwise transport will handle.
1964 */
1965 switch (comp_status) {
1966 case CS_COMPLETE:
1967 break;
1968
1969 case CS_RESET:
1970 case CS_PORT_UNAVAILABLE:
1971 case CS_PORT_LOGGED_OUT:
1972 fcport->nvme_flag |= NVME_FLAG_RESETTING;
1973 /* fall through */
1974 case CS_ABORTED:
1975 case CS_PORT_BUSY:
1976 fd->transferred_length = 0;
1977 iocb->u.nvme.rsp_pyld_len = 0;
1978 ret = QLA_ABORTED;
1979 break;
1980 case CS_DATA_UNDERRUN:
1981 break;
1982 default:
1983 ret = QLA_FUNCTION_FAILED;
1984 break;
1985 }
1986 sp->done(sp, ret);
1987 }
1988
1989 static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
1990 struct vp_ctrl_entry_24xx *vce)
1991 {
1992 const char func[] = "CTRLVP-IOCB";
1993 srb_t *sp;
1994 int rval = QLA_SUCCESS;
1995
1996 sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
1997 if (!sp)
1998 return;
1999
2000 if (vce->entry_status != 0) {
2001 ql_dbg(ql_dbg_vport, vha, 0x10c4,
2002 "%s: Failed to complete IOCB -- error status (%x)\n",
2003 sp->name, vce->entry_status);
2004 rval = QLA_FUNCTION_FAILED;
2005 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
2006 ql_dbg(ql_dbg_vport, vha, 0x10c5,
2007 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
2008 sp->name, le16_to_cpu(vce->comp_status),
2009 le16_to_cpu(vce->vp_idx_failed));
2010 rval = QLA_FUNCTION_FAILED;
2011 } else {
2012 ql_dbg(ql_dbg_vport, vha, 0x10c6,
2013 "Done %s.\n", __func__);
2014 }
2015
2016 sp->rc = rval;
2017 sp->done(sp, rval);
2018 }
2019
2020 /* Process a single response queue entry. */
2021 static void qla2x00_process_response_entry(struct scsi_qla_host *vha,
2022 struct rsp_que *rsp,
2023 sts_entry_t *pkt)
2024 {
2025 sts21_entry_t *sts21_entry;
2026 sts22_entry_t *sts22_entry;
2027 uint16_t handle_cnt;
2028 uint16_t cnt;
2029
2030 switch (pkt->entry_type) {
2031 case STATUS_TYPE:
2032 qla2x00_status_entry(vha, rsp, pkt);
2033 break;
2034 case STATUS_TYPE_21:
2035 sts21_entry = (sts21_entry_t *)pkt;
2036 handle_cnt = sts21_entry->handle_count;
2037 for (cnt = 0; cnt < handle_cnt; cnt++)
2038 qla2x00_process_completed_request(vha, rsp->req,
2039 sts21_entry->handle[cnt]);
2040 break;
2041 case STATUS_TYPE_22:
2042 sts22_entry = (sts22_entry_t *)pkt;
2043 handle_cnt = sts22_entry->handle_count;
2044 for (cnt = 0; cnt < handle_cnt; cnt++)
2045 qla2x00_process_completed_request(vha, rsp->req,
2046 sts22_entry->handle[cnt]);
2047 break;
2048 case STATUS_CONT_TYPE:
2049 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2050 break;
2051 case MBX_IOCB_TYPE:
2052 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt);
2053 break;
2054 case CT_IOCB_TYPE:
2055 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2056 break;
2057 default:
2058 /* Type Not Supported. */
2059 ql_log(ql_log_warn, vha, 0x504a,
2060 "Received unknown response pkt type %x entry status=%x.\n",
2061 pkt->entry_type, pkt->entry_status);
2062 break;
2063 }
2064 }
2065
2066 /**
2067 * qla2x00_process_response_queue() - Process response queue entries.
2068 * @rsp: response queue
2069 */
2070 void
2071 qla2x00_process_response_queue(struct rsp_que *rsp)
2072 {
2073 struct scsi_qla_host *vha;
2074 struct qla_hw_data *ha = rsp->hw;
2075 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2076 sts_entry_t *pkt;
2077
2078 vha = pci_get_drvdata(ha->pdev);
2079
2080 if (!vha->flags.online)
2081 return;
2082
2083 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2084 pkt = (sts_entry_t *)rsp->ring_ptr;
2085
2086 rsp->ring_index++;
2087 if (rsp->ring_index == rsp->length) {
2088 rsp->ring_index = 0;
2089 rsp->ring_ptr = rsp->ring;
2090 } else {
2091 rsp->ring_ptr++;
2092 }
2093
2094 if (pkt->entry_status != 0) {
2095 qla2x00_error_entry(vha, rsp, pkt);
2096 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2097 wmb();
2098 continue;
2099 }
2100
2101 qla2x00_process_response_entry(vha, rsp, pkt);
2102 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2103 wmb();
2104 }
2105
2106 /* Adjust ring index */
2107 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
2108 }
2109
2110 static inline void
2111 qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2112 uint32_t sense_len, struct rsp_que *rsp, int res)
2113 {
2114 struct scsi_qla_host *vha = sp->vha;
2115 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2116 uint32_t track_sense_len;
2117
2118 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2119 sense_len = SCSI_SENSE_BUFFERSIZE;
2120
2121 SET_CMD_SENSE_LEN(sp, sense_len);
2122 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2123 track_sense_len = sense_len;
2124
2125 if (sense_len > par_sense_len)
2126 sense_len = par_sense_len;
2127
2128 memcpy(cp->sense_buffer, sense_data, sense_len);
2129
2130 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2131 track_sense_len -= sense_len;
2132 SET_CMD_SENSE_LEN(sp, track_sense_len);
2133
2134 if (track_sense_len != 0) {
2135 rsp->status_srb = sp;
2136 cp->result = res;
2137 }
2138
2139 if (sense_len) {
2140 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
2141 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2142 sp->vha->host_no, cp->device->id, cp->device->lun,
2143 cp);
2144 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
2145 cp->sense_buffer, sense_len);
2146 }
2147 }
2148
2149 struct scsi_dif_tuple {
2150 __be16 guard; /* Checksum */
2151 __be16 app_tag; /* APPL identifier */
2152 __be32 ref_tag; /* Target LBA or indirect LBA */
2153 };
2154
2155 /*
2156 * Checks the guard or meta-data for the type of error
2157 * detected by the HBA. In case of errors, we set the
2158 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
2159 * to indicate to the kernel that the HBA detected error.
2160 */
2161 static inline int
2162 qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
2163 {
2164 struct scsi_qla_host *vha = sp->vha;
2165 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
2166 uint8_t *ap = &sts24->data[12];
2167 uint8_t *ep = &sts24->data[20];
2168 uint32_t e_ref_tag, a_ref_tag;
2169 uint16_t e_app_tag, a_app_tag;
2170 uint16_t e_guard, a_guard;
2171
2172 /*
2173 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
2174 * would make guard field appear at offset 2
2175 */
2176 a_guard = get_unaligned_le16(ap + 2);
2177 a_app_tag = get_unaligned_le16(ap + 0);
2178 a_ref_tag = get_unaligned_le32(ap + 4);
2179 e_guard = get_unaligned_le16(ep + 2);
2180 e_app_tag = get_unaligned_le16(ep + 0);
2181 e_ref_tag = get_unaligned_le32(ep + 4);
2182
2183 ql_dbg(ql_dbg_io, vha, 0x3023,
2184 "iocb(s) %p Returned STATUS.\n", sts24);
2185
2186 ql_dbg(ql_dbg_io, vha, 0x3024,
2187 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
2188 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
2189 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
2190 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
2191 a_app_tag, e_app_tag, a_guard, e_guard);
2192
2193 /*
2194 * Ignore sector if:
2195 * For type 3: ref & app tag is all 'f's
2196 * For type 0,1,2: app tag is all 'f's
2197 */
2198 if ((a_app_tag == T10_PI_APP_ESCAPE) &&
2199 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
2200 (a_ref_tag == T10_PI_REF_ESCAPE))) {
2201 uint32_t blocks_done, resid;
2202 sector_t lba_s = scsi_get_lba(cmd);
2203
2204 /* 2TB boundary case covered automatically with this */
2205 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
2206
2207 resid = scsi_bufflen(cmd) - (blocks_done *
2208 cmd->device->sector_size);
2209
2210 scsi_set_resid(cmd, resid);
2211 cmd->result = DID_OK << 16;
2212
2213 /* Update protection tag */
2214 if (scsi_prot_sg_count(cmd)) {
2215 uint32_t i, j = 0, k = 0, num_ent;
2216 struct scatterlist *sg;
2217 struct t10_pi_tuple *spt;
2218
2219 /* Patch the corresponding protection tags */
2220 scsi_for_each_prot_sg(cmd, sg,
2221 scsi_prot_sg_count(cmd), i) {
2222 num_ent = sg_dma_len(sg) / 8;
2223 if (k + num_ent < blocks_done) {
2224 k += num_ent;
2225 continue;
2226 }
2227 j = blocks_done - k - 1;
2228 k = blocks_done;
2229 break;
2230 }
2231
2232 if (k != blocks_done) {
2233 ql_log(ql_log_warn, vha, 0x302f,
2234 "unexpected tag values tag:lba=%x:%llx)\n",
2235 e_ref_tag, (unsigned long long)lba_s);
2236 return 1;
2237 }
2238
2239 spt = page_address(sg_page(sg)) + sg->offset;
2240 spt += j;
2241
2242 spt->app_tag = T10_PI_APP_ESCAPE;
2243 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
2244 spt->ref_tag = T10_PI_REF_ESCAPE;
2245 }
2246
2247 return 0;
2248 }
2249
2250 /* check guard */
2251 if (e_guard != a_guard) {
2252 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2253 0x10, 0x1);
2254 set_driver_byte(cmd, DRIVER_SENSE);
2255 set_host_byte(cmd, DID_ABORT);
2256 cmd->result |= SAM_STAT_CHECK_CONDITION;
2257 return 1;
2258 }
2259
2260 /* check ref tag */
2261 if (e_ref_tag != a_ref_tag) {
2262 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2263 0x10, 0x3);
2264 set_driver_byte(cmd, DRIVER_SENSE);
2265 set_host_byte(cmd, DID_ABORT);
2266 cmd->result |= SAM_STAT_CHECK_CONDITION;
2267 return 1;
2268 }
2269
2270 /* check appl tag */
2271 if (e_app_tag != a_app_tag) {
2272 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2273 0x10, 0x2);
2274 set_driver_byte(cmd, DRIVER_SENSE);
2275 set_host_byte(cmd, DID_ABORT);
2276 cmd->result |= SAM_STAT_CHECK_CONDITION;
2277 return 1;
2278 }
2279
2280 return 1;
2281 }
2282
2283 static void
2284 qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
2285 struct req_que *req, uint32_t index)
2286 {
2287 struct qla_hw_data *ha = vha->hw;
2288 srb_t *sp;
2289 uint16_t comp_status;
2290 uint16_t scsi_status;
2291 uint16_t thread_id;
2292 uint32_t rval = EXT_STATUS_OK;
2293 struct bsg_job *bsg_job = NULL;
2294 struct fc_bsg_request *bsg_request;
2295 struct fc_bsg_reply *bsg_reply;
2296 sts_entry_t *sts = pkt;
2297 struct sts_entry_24xx *sts24 = pkt;
2298
2299 /* Validate handle. */
2300 if (index >= req->num_outstanding_cmds) {
2301 ql_log(ql_log_warn, vha, 0x70af,
2302 "Invalid SCSI completion handle 0x%x.\n", index);
2303 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2304 return;
2305 }
2306
2307 sp = req->outstanding_cmds[index];
2308 if (!sp) {
2309 ql_log(ql_log_warn, vha, 0x70b0,
2310 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
2311 req->id, index);
2312
2313 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2314 return;
2315 }
2316
2317 /* Free outstanding command slot. */
2318 req->outstanding_cmds[index] = NULL;
2319 bsg_job = sp->u.bsg_job;
2320 bsg_request = bsg_job->request;
2321 bsg_reply = bsg_job->reply;
2322
2323 if (IS_FWI2_CAPABLE(ha)) {
2324 comp_status = le16_to_cpu(sts24->comp_status);
2325 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2326 } else {
2327 comp_status = le16_to_cpu(sts->comp_status);
2328 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2329 }
2330
2331 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
2332 switch (comp_status) {
2333 case CS_COMPLETE:
2334 if (scsi_status == 0) {
2335 bsg_reply->reply_payload_rcv_len =
2336 bsg_job->reply_payload.payload_len;
2337 vha->qla_stats.input_bytes +=
2338 bsg_reply->reply_payload_rcv_len;
2339 vha->qla_stats.input_requests++;
2340 rval = EXT_STATUS_OK;
2341 }
2342 goto done;
2343
2344 case CS_DATA_OVERRUN:
2345 ql_dbg(ql_dbg_user, vha, 0x70b1,
2346 "Command completed with data overrun thread_id=%d\n",
2347 thread_id);
2348 rval = EXT_STATUS_DATA_OVERRUN;
2349 break;
2350
2351 case CS_DATA_UNDERRUN:
2352 ql_dbg(ql_dbg_user, vha, 0x70b2,
2353 "Command completed with data underrun thread_id=%d\n",
2354 thread_id);
2355 rval = EXT_STATUS_DATA_UNDERRUN;
2356 break;
2357 case CS_BIDIR_RD_OVERRUN:
2358 ql_dbg(ql_dbg_user, vha, 0x70b3,
2359 "Command completed with read data overrun thread_id=%d\n",
2360 thread_id);
2361 rval = EXT_STATUS_DATA_OVERRUN;
2362 break;
2363
2364 case CS_BIDIR_RD_WR_OVERRUN:
2365 ql_dbg(ql_dbg_user, vha, 0x70b4,
2366 "Command completed with read and write data overrun "
2367 "thread_id=%d\n", thread_id);
2368 rval = EXT_STATUS_DATA_OVERRUN;
2369 break;
2370
2371 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
2372 ql_dbg(ql_dbg_user, vha, 0x70b5,
2373 "Command completed with read data over and write data "
2374 "underrun thread_id=%d\n", thread_id);
2375 rval = EXT_STATUS_DATA_OVERRUN;
2376 break;
2377
2378 case CS_BIDIR_RD_UNDERRUN:
2379 ql_dbg(ql_dbg_user, vha, 0x70b6,
2380 "Command completed with read data underrun "
2381 "thread_id=%d\n", thread_id);
2382 rval = EXT_STATUS_DATA_UNDERRUN;
2383 break;
2384
2385 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
2386 ql_dbg(ql_dbg_user, vha, 0x70b7,
2387 "Command completed with read data under and write data "
2388 "overrun thread_id=%d\n", thread_id);
2389 rval = EXT_STATUS_DATA_UNDERRUN;
2390 break;
2391
2392 case CS_BIDIR_RD_WR_UNDERRUN:
2393 ql_dbg(ql_dbg_user, vha, 0x70b8,
2394 "Command completed with read and write data underrun "
2395 "thread_id=%d\n", thread_id);
2396 rval = EXT_STATUS_DATA_UNDERRUN;
2397 break;
2398
2399 case CS_BIDIR_DMA:
2400 ql_dbg(ql_dbg_user, vha, 0x70b9,
2401 "Command completed with data DMA error thread_id=%d\n",
2402 thread_id);
2403 rval = EXT_STATUS_DMA_ERR;
2404 break;
2405
2406 case CS_TIMEOUT:
2407 ql_dbg(ql_dbg_user, vha, 0x70ba,
2408 "Command completed with timeout thread_id=%d\n",
2409 thread_id);
2410 rval = EXT_STATUS_TIMEOUT;
2411 break;
2412 default:
2413 ql_dbg(ql_dbg_user, vha, 0x70bb,
2414 "Command completed with completion status=0x%x "
2415 "thread_id=%d\n", comp_status, thread_id);
2416 rval = EXT_STATUS_ERR;
2417 break;
2418 }
2419 bsg_reply->reply_payload_rcv_len = 0;
2420
2421 done:
2422 /* Return the vendor specific reply to API */
2423 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
2424 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2425 /* Always return DID_OK, bsg will send the vendor specific response
2426 * in this case only */
2427 sp->done(sp, DID_OK << 16);
2428
2429 }
2430
2431 /**
2432 * qla2x00_status_entry() - Process a Status IOCB entry.
2433 * @vha: SCSI driver HA context
2434 * @rsp: response queue
2435 * @pkt: Entry pointer
2436 */
2437 static void
2438 qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2439 {
2440 srb_t *sp;
2441 fc_port_t *fcport;
2442 struct scsi_cmnd *cp;
2443 sts_entry_t *sts = pkt;
2444 struct sts_entry_24xx *sts24 = pkt;
2445 uint16_t comp_status;
2446 uint16_t scsi_status;
2447 uint16_t ox_id;
2448 uint8_t lscsi_status;
2449 int32_t resid;
2450 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2451 fw_resid_len;
2452 uint8_t *rsp_info, *sense_data;
2453 struct qla_hw_data *ha = vha->hw;
2454 uint32_t handle;
2455 uint16_t que;
2456 struct req_que *req;
2457 int logit = 1;
2458 int res = 0;
2459 uint16_t state_flags = 0;
2460 uint16_t retry_delay = 0;
2461
2462 if (IS_FWI2_CAPABLE(ha)) {
2463 comp_status = le16_to_cpu(sts24->comp_status);
2464 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2465 state_flags = le16_to_cpu(sts24->state_flags);
2466 } else {
2467 comp_status = le16_to_cpu(sts->comp_status);
2468 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2469 }
2470 handle = (uint32_t) LSW(sts->handle);
2471 que = MSW(sts->handle);
2472 req = ha->req_q_map[que];
2473
2474 /* Check for invalid queue pointer */
2475 if (req == NULL ||
2476 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2477 ql_dbg(ql_dbg_io, vha, 0x3059,
2478 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2479 "que=%u.\n", sts->handle, req, que);
2480 return;
2481 }
2482
2483 /* Validate handle. */
2484 if (handle < req->num_outstanding_cmds) {
2485 sp = req->outstanding_cmds[handle];
2486 if (!sp) {
2487 ql_dbg(ql_dbg_io, vha, 0x3075,
2488 "%s(%ld): Already returned command for status handle (0x%x).\n",
2489 __func__, vha->host_no, sts->handle);
2490 return;
2491 }
2492 } else {
2493 ql_dbg(ql_dbg_io, vha, 0x3017,
2494 "Invalid status handle, out of range (0x%x).\n",
2495 sts->handle);
2496
2497 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2498 if (IS_P3P_TYPE(ha))
2499 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2500 else
2501 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2502 qla2xxx_wake_dpc(vha);
2503 }
2504 return;
2505 }
2506
2507 if (sp->abort)
2508 sp->aborted = 1;
2509 else
2510 sp->completed = 1;
2511
2512 if (sp->cmd_type != TYPE_SRB) {
2513 req->outstanding_cmds[handle] = NULL;
2514 ql_dbg(ql_dbg_io, vha, 0x3015,
2515 "Unknown sp->cmd_type %x %p).\n",
2516 sp->cmd_type, sp);
2517 return;
2518 }
2519
2520 /* NVME completion. */
2521 if (sp->type == SRB_NVME_CMD) {
2522 req->outstanding_cmds[handle] = NULL;
2523 qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
2524 return;
2525 }
2526
2527 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2528 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2529 return;
2530 }
2531
2532 /* Task Management completion. */
2533 if (sp->type == SRB_TM_CMD) {
2534 qla24xx_tm_iocb_entry(vha, req, pkt);
2535 return;
2536 }
2537
2538 /* Fast path completion. */
2539 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2540 qla2x00_process_completed_request(vha, req, handle);
2541
2542 return;
2543 }
2544
2545 req->outstanding_cmds[handle] = NULL;
2546 cp = GET_CMD_SP(sp);
2547 if (cp == NULL) {
2548 ql_dbg(ql_dbg_io, vha, 0x3018,
2549 "Command already returned (0x%x/%p).\n",
2550 sts->handle, sp);
2551
2552 return;
2553 }
2554
2555 lscsi_status = scsi_status & STATUS_MASK;
2556
2557 fcport = sp->fcport;
2558
2559 ox_id = 0;
2560 sense_len = par_sense_len = rsp_info_len = resid_len =
2561 fw_resid_len = 0;
2562 if (IS_FWI2_CAPABLE(ha)) {
2563 if (scsi_status & SS_SENSE_LEN_VALID)
2564 sense_len = le32_to_cpu(sts24->sense_len);
2565 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2566 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2567 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2568 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2569 if (comp_status == CS_DATA_UNDERRUN)
2570 fw_resid_len = le32_to_cpu(sts24->residual_len);
2571 rsp_info = sts24->data;
2572 sense_data = sts24->data;
2573 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
2574 ox_id = le16_to_cpu(sts24->ox_id);
2575 par_sense_len = sizeof(sts24->data);
2576 /* Valid values of the retry delay timer are 0x1-0xffef */
2577 if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) {
2578 retry_delay = sts24->retry_delay & 0x3fff;
2579 ql_dbg(ql_dbg_io, sp->vha, 0x3033,
2580 "%s: scope=%#x retry_delay=%#x\n", __func__,
2581 sts24->retry_delay >> 14, retry_delay);
2582 }
2583 } else {
2584 if (scsi_status & SS_SENSE_LEN_VALID)
2585 sense_len = le16_to_cpu(sts->req_sense_length);
2586 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2587 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
2588 resid_len = le32_to_cpu(sts->residual_length);
2589 rsp_info = sts->rsp_info;
2590 sense_data = sts->req_sense_data;
2591 par_sense_len = sizeof(sts->req_sense_data);
2592 }
2593
2594 /* Check for any FCP transport errors. */
2595 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
2596 /* Sense data lies beyond any FCP RESPONSE data. */
2597 if (IS_FWI2_CAPABLE(ha)) {
2598 sense_data += rsp_info_len;
2599 par_sense_len -= rsp_info_len;
2600 }
2601 if (rsp_info_len > 3 && rsp_info[3]) {
2602 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
2603 "FCP I/O protocol failure (0x%x/0x%x).\n",
2604 rsp_info_len, rsp_info[3]);
2605
2606 res = DID_BUS_BUSY << 16;
2607 goto out;
2608 }
2609 }
2610
2611 /* Check for overrun. */
2612 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
2613 scsi_status & SS_RESIDUAL_OVER)
2614 comp_status = CS_DATA_OVERRUN;
2615
2616 /*
2617 * Check retry_delay_timer value if we receive a busy or
2618 * queue full.
2619 */
2620 if (lscsi_status == SAM_STAT_TASK_SET_FULL ||
2621 lscsi_status == SAM_STAT_BUSY)
2622 qla2x00_set_retry_delay_timestamp(fcport, retry_delay);
2623
2624 /*
2625 * Based on Host and scsi status generate status code for Linux
2626 */
2627 switch (comp_status) {
2628 case CS_COMPLETE:
2629 case CS_QUEUE_FULL:
2630 if (scsi_status == 0) {
2631 res = DID_OK << 16;
2632 break;
2633 }
2634 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
2635 resid = resid_len;
2636 scsi_set_resid(cp, resid);
2637
2638 if (!lscsi_status &&
2639 ((unsigned)(scsi_bufflen(cp) - resid) <
2640 cp->underflow)) {
2641 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
2642 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
2643 resid, scsi_bufflen(cp));
2644
2645 res = DID_ERROR << 16;
2646 break;
2647 }
2648 }
2649 res = DID_OK << 16 | lscsi_status;
2650
2651 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
2652 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
2653 "QUEUE FULL detected.\n");
2654 break;
2655 }
2656 logit = 0;
2657 if (lscsi_status != SS_CHECK_CONDITION)
2658 break;
2659
2660 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2661 if (!(scsi_status & SS_SENSE_LEN_VALID))
2662 break;
2663
2664 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2665 rsp, res);
2666 break;
2667
2668 case CS_DATA_UNDERRUN:
2669 /* Use F/W calculated residual length. */
2670 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
2671 scsi_set_resid(cp, resid);
2672 if (scsi_status & SS_RESIDUAL_UNDER) {
2673 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
2674 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
2675 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
2676 resid, scsi_bufflen(cp));
2677
2678 res = DID_ERROR << 16 | lscsi_status;
2679 goto check_scsi_status;
2680 }
2681
2682 if (!lscsi_status &&
2683 ((unsigned)(scsi_bufflen(cp) - resid) <
2684 cp->underflow)) {
2685 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
2686 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
2687 resid, scsi_bufflen(cp));
2688
2689 res = DID_ERROR << 16;
2690 break;
2691 }
2692 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
2693 lscsi_status != SAM_STAT_BUSY) {
2694 /*
2695 * scsi status of task set and busy are considered to be
2696 * task not completed.
2697 */
2698
2699 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
2700 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
2701 resid, scsi_bufflen(cp));
2702
2703 res = DID_ERROR << 16 | lscsi_status;
2704 goto check_scsi_status;
2705 } else {
2706 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
2707 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2708 scsi_status, lscsi_status);
2709 }
2710
2711 res = DID_OK << 16 | lscsi_status;
2712 logit = 0;
2713
2714 check_scsi_status:
2715 /*
2716 * Check to see if SCSI Status is non zero. If so report SCSI
2717 * Status.
2718 */
2719 if (lscsi_status != 0) {
2720 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
2721 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
2722 "QUEUE FULL detected.\n");
2723 logit = 1;
2724 break;
2725 }
2726 if (lscsi_status != SS_CHECK_CONDITION)
2727 break;
2728
2729 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2730 if (!(scsi_status & SS_SENSE_LEN_VALID))
2731 break;
2732
2733 qla2x00_handle_sense(sp, sense_data, par_sense_len,
2734 sense_len, rsp, res);
2735 }
2736 break;
2737
2738 case CS_PORT_LOGGED_OUT:
2739 case CS_PORT_CONFIG_CHG:
2740 case CS_PORT_BUSY:
2741 case CS_INCOMPLETE:
2742 case CS_PORT_UNAVAILABLE:
2743 case CS_TIMEOUT:
2744 case CS_RESET:
2745
2746 /*
2747 * We are going to have the fc class block the rport
2748 * while we try to recover so instruct the mid layer
2749 * to requeue until the class decides how to handle this.
2750 */
2751 res = DID_TRANSPORT_DISRUPTED << 16;
2752
2753 if (comp_status == CS_TIMEOUT) {
2754 if (IS_FWI2_CAPABLE(ha))
2755 break;
2756 else if ((le16_to_cpu(sts->status_flags) &
2757 SF_LOGOUT_SENT) == 0)
2758 break;
2759 }
2760
2761 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2762 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
2763 "Port to be marked lost on fcport=%02x%02x%02x, current "
2764 "port state= %s comp_status %x.\n", fcport->d_id.b.domain,
2765 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2766 port_state_str[FCS_ONLINE],
2767 comp_status);
2768
2769 qlt_schedule_sess_for_deletion(fcport);
2770 }
2771
2772 break;
2773
2774 case CS_ABORTED:
2775 res = DID_RESET << 16;
2776 break;
2777
2778 case CS_DIF_ERROR:
2779 logit = qla2x00_handle_dif_error(sp, sts24);
2780 res = cp->result;
2781 break;
2782
2783 case CS_TRANSPORT:
2784 res = DID_ERROR << 16;
2785
2786 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
2787 break;
2788
2789 if (state_flags & BIT_4)
2790 scmd_printk(KERN_WARNING, cp,
2791 "Unsupported device '%s' found.\n",
2792 cp->device->vendor);
2793 break;
2794
2795 case CS_DMA:
2796 ql_log(ql_log_info, fcport->vha, 0x3022,
2797 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
2798 comp_status, scsi_status, res, vha->host_no,
2799 cp->device->id, cp->device->lun, fcport->d_id.b24,
2800 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
2801 resid_len, fw_resid_len, sp, cp);
2802 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
2803 pkt, sizeof(*sts24));
2804 res = DID_ERROR << 16;
2805 break;
2806 default:
2807 res = DID_ERROR << 16;
2808 break;
2809 }
2810
2811 out:
2812 if (logit)
2813 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
2814 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
2815 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
2816 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
2817 comp_status, scsi_status, res, vha->host_no,
2818 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
2819 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
2820 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
2821 resid_len, fw_resid_len, sp, cp);
2822
2823 if (rsp->status_srb == NULL)
2824 sp->done(sp, res);
2825 }
2826
2827 /**
2828 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
2829 * @rsp: response queue
2830 * @pkt: Entry pointer
2831 *
2832 * Extended sense data.
2833 */
2834 static void
2835 qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2836 {
2837 uint8_t sense_sz = 0;
2838 struct qla_hw_data *ha = rsp->hw;
2839 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2840 srb_t *sp = rsp->status_srb;
2841 struct scsi_cmnd *cp;
2842 uint32_t sense_len;
2843 uint8_t *sense_ptr;
2844
2845 if (!sp || !GET_CMD_SENSE_LEN(sp))
2846 return;
2847
2848 sense_len = GET_CMD_SENSE_LEN(sp);
2849 sense_ptr = GET_CMD_SENSE_PTR(sp);
2850
2851 cp = GET_CMD_SP(sp);
2852 if (cp == NULL) {
2853 ql_log(ql_log_warn, vha, 0x3025,
2854 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2855
2856 rsp->status_srb = NULL;
2857 return;
2858 }
2859
2860 if (sense_len > sizeof(pkt->data))
2861 sense_sz = sizeof(pkt->data);
2862 else
2863 sense_sz = sense_len;
2864
2865 /* Move sense data. */
2866 if (IS_FWI2_CAPABLE(ha))
2867 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
2868 memcpy(sense_ptr, pkt->data, sense_sz);
2869 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
2870 sense_ptr, sense_sz);
2871
2872 sense_len -= sense_sz;
2873 sense_ptr += sense_sz;
2874
2875 SET_CMD_SENSE_PTR(sp, sense_ptr);
2876 SET_CMD_SENSE_LEN(sp, sense_len);
2877
2878 /* Place command on done queue. */
2879 if (sense_len == 0) {
2880 rsp->status_srb = NULL;
2881 sp->done(sp, cp->result);
2882 }
2883 }
2884
2885 /**
2886 * qla2x00_error_entry() - Process an error entry.
2887 * @vha: SCSI driver HA context
2888 * @rsp: response queue
2889 * @pkt: Entry pointer
2890 * return : 1=allow further error analysis. 0=no additional error analysis.
2891 */
2892 static int
2893 qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
2894 {
2895 srb_t *sp;
2896 struct qla_hw_data *ha = vha->hw;
2897 const char func[] = "ERROR-IOCB";
2898 uint16_t que = MSW(pkt->handle);
2899 struct req_que *req = NULL;
2900 int res = DID_ERROR << 16;
2901
2902 ql_dbg(ql_dbg_async, vha, 0x502a,
2903 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
2904 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
2905
2906 if (que >= ha->max_req_queues || !ha->req_q_map[que])
2907 goto fatal;
2908
2909 req = ha->req_q_map[que];
2910
2911 if (pkt->entry_status & RF_BUSY)
2912 res = DID_BUS_BUSY << 16;
2913
2914 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
2915 return 0;
2916
2917 switch (pkt->entry_type) {
2918 case NOTIFY_ACK_TYPE:
2919 case STATUS_TYPE:
2920 case STATUS_CONT_TYPE:
2921 case LOGINOUT_PORT_IOCB_TYPE:
2922 case CT_IOCB_TYPE:
2923 case ELS_IOCB_TYPE:
2924 case ABORT_IOCB_TYPE:
2925 case MBX_IOCB_TYPE:
2926 default:
2927 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2928 if (sp) {
2929 sp->done(sp, res);
2930 return 0;
2931 }
2932 break;
2933
2934 case ABTS_RESP_24XX:
2935 case CTIO_TYPE7:
2936 case CTIO_CRC2:
2937 return 1;
2938 }
2939 fatal:
2940 ql_log(ql_log_warn, vha, 0x5030,
2941 "Error entry - invalid handle/queue (%04x).\n", que);
2942 return 0;
2943 }
2944
2945 /**
2946 * qla24xx_mbx_completion() - Process mailbox command completions.
2947 * @vha: SCSI driver HA context
2948 * @mb0: Mailbox0 register
2949 */
2950 static void
2951 qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
2952 {
2953 uint16_t cnt;
2954 uint32_t mboxes;
2955 uint16_t __iomem *wptr;
2956 struct qla_hw_data *ha = vha->hw;
2957 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2958
2959 /* Read all mbox registers? */
2960 WARN_ON_ONCE(ha->mbx_count > 32);
2961 mboxes = (1ULL << ha->mbx_count) - 1;
2962 if (!ha->mcp)
2963 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
2964 else
2965 mboxes = ha->mcp->in_mb;
2966
2967 /* Load return mailbox registers. */
2968 ha->flags.mbox_int = 1;
2969 ha->mailbox_out[0] = mb0;
2970 mboxes >>= 1;
2971 wptr = (uint16_t __iomem *)&reg->mailbox1;
2972
2973 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2974 if (mboxes & BIT_0)
2975 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
2976
2977 mboxes >>= 1;
2978 wptr++;
2979 }
2980 }
2981
2982 static void
2983 qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2984 struct abort_entry_24xx *pkt)
2985 {
2986 const char func[] = "ABT_IOCB";
2987 srb_t *sp;
2988 struct srb_iocb *abt;
2989
2990 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2991 if (!sp)
2992 return;
2993
2994 abt = &sp->u.iocb_cmd;
2995 abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle);
2996 sp->done(sp, 0);
2997 }
2998
2999 void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
3000 struct pt_ls4_request *pkt, struct req_que *req)
3001 {
3002 srb_t *sp;
3003 const char func[] = "LS4_IOCB";
3004 uint16_t comp_status;
3005
3006 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3007 if (!sp)
3008 return;
3009
3010 comp_status = le16_to_cpu(pkt->status);
3011 sp->done(sp, comp_status);
3012 }
3013
3014 /**
3015 * qla24xx_process_response_queue() - Process response queue entries.
3016 * @vha: SCSI driver HA context
3017 * @rsp: response queue
3018 */
3019 void qla24xx_process_response_queue(struct scsi_qla_host *vha,
3020 struct rsp_que *rsp)
3021 {
3022 struct sts_entry_24xx *pkt;
3023 struct qla_hw_data *ha = vha->hw;
3024
3025 if (!ha->flags.fw_started)
3026 return;
3027
3028 if (rsp->qpair->cpuid != smp_processor_id())
3029 qla_cpu_update(rsp->qpair, smp_processor_id());
3030
3031 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
3032 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
3033
3034 rsp->ring_index++;
3035 if (rsp->ring_index == rsp->length) {
3036 rsp->ring_index = 0;
3037 rsp->ring_ptr = rsp->ring;
3038 } else {
3039 rsp->ring_ptr++;
3040 }
3041
3042 if (pkt->entry_status != 0) {
3043 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
3044 goto process_err;
3045
3046 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3047 wmb();
3048 continue;
3049 }
3050 process_err:
3051
3052 switch (pkt->entry_type) {
3053 case STATUS_TYPE:
3054 qla2x00_status_entry(vha, rsp, pkt);
3055 break;
3056 case STATUS_CONT_TYPE:
3057 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
3058 break;
3059 case VP_RPT_ID_IOCB_TYPE:
3060 qla24xx_report_id_acquisition(vha,
3061 (struct vp_rpt_id_entry_24xx *)pkt);
3062 break;
3063 case LOGINOUT_PORT_IOCB_TYPE:
3064 qla24xx_logio_entry(vha, rsp->req,
3065 (struct logio_entry_24xx *)pkt);
3066 break;
3067 case CT_IOCB_TYPE:
3068 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
3069 break;
3070 case ELS_IOCB_TYPE:
3071 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
3072 break;
3073 case ABTS_RECV_24XX:
3074 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3075 IS_QLA28XX(ha)) {
3076 /* ensure that the ATIO queue is empty */
3077 qlt_handle_abts_recv(vha, rsp,
3078 (response_t *)pkt);
3079 break;
3080 } else {
3081 qlt_24xx_process_atio_queue(vha, 1);
3082 }
3083 /* fall through */
3084 case ABTS_RESP_24XX:
3085 case CTIO_TYPE7:
3086 case CTIO_CRC2:
3087 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
3088 break;
3089 case PT_LS4_REQUEST:
3090 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
3091 rsp->req);
3092 break;
3093 case NOTIFY_ACK_TYPE:
3094 if (pkt->handle == QLA_TGT_SKIP_HANDLE)
3095 qlt_response_pkt_all_vps(vha, rsp,
3096 (response_t *)pkt);
3097 else
3098 qla24xxx_nack_iocb_entry(vha, rsp->req,
3099 (struct nack_to_isp *)pkt);
3100 break;
3101 case MARKER_TYPE:
3102 /* Do nothing in this case, this check is to prevent it
3103 * from falling into default case
3104 */
3105 break;
3106 case ABORT_IOCB_TYPE:
3107 qla24xx_abort_iocb_entry(vha, rsp->req,
3108 (struct abort_entry_24xx *)pkt);
3109 break;
3110 case MBX_IOCB_TYPE:
3111 qla24xx_mbx_iocb_entry(vha, rsp->req,
3112 (struct mbx_24xx_entry *)pkt);
3113 break;
3114 case VP_CTRL_IOCB_TYPE:
3115 qla_ctrlvp_completed(vha, rsp->req,
3116 (struct vp_ctrl_entry_24xx *)pkt);
3117 break;
3118 default:
3119 /* Type Not Supported. */
3120 ql_dbg(ql_dbg_async, vha, 0x5042,
3121 "Received unknown response pkt type %x "
3122 "entry status=%x.\n",
3123 pkt->entry_type, pkt->entry_status);
3124 break;
3125 }
3126 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3127 wmb();
3128 }
3129
3130 /* Adjust ring index */
3131 if (IS_P3P_TYPE(ha)) {
3132 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
3133
3134 WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
3135 } else {
3136 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
3137 }
3138 }
3139
3140 static void
3141 qla2xxx_check_risc_status(scsi_qla_host_t *vha)
3142 {
3143 int rval;
3144 uint32_t cnt;
3145 struct qla_hw_data *ha = vha->hw;
3146 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3147
3148 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3149 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3150 return;
3151
3152 rval = QLA_SUCCESS;
3153 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
3154 RD_REG_DWORD(&reg->iobase_addr);
3155 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3156 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3157 rval == QLA_SUCCESS; cnt--) {
3158 if (cnt) {
3159 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3160 udelay(10);
3161 } else
3162 rval = QLA_FUNCTION_TIMEOUT;
3163 }
3164 if (rval == QLA_SUCCESS)
3165 goto next_test;
3166
3167 rval = QLA_SUCCESS;
3168 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3169 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3170 rval == QLA_SUCCESS; cnt--) {
3171 if (cnt) {
3172 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3173 udelay(10);
3174 } else
3175 rval = QLA_FUNCTION_TIMEOUT;
3176 }
3177 if (rval != QLA_SUCCESS)
3178 goto done;
3179
3180 next_test:
3181 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
3182 ql_log(ql_log_info, vha, 0x504c,
3183 "Additional code -- 0x55AA.\n");
3184
3185 done:
3186 WRT_REG_DWORD(&reg->iobase_window, 0x0000);
3187 RD_REG_DWORD(&reg->iobase_window);
3188 }
3189
3190 /**
3191 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
3192 * @irq: interrupt number
3193 * @dev_id: SCSI driver HA context
3194 *
3195 * Called by system whenever the host adapter generates an interrupt.
3196 *
3197 * Returns handled flag.
3198 */
3199 irqreturn_t
3200 qla24xx_intr_handler(int irq, void *dev_id)
3201 {
3202 scsi_qla_host_t *vha;
3203 struct qla_hw_data *ha;
3204 struct device_reg_24xx __iomem *reg;
3205 int status;
3206 unsigned long iter;
3207 uint32_t stat;
3208 uint32_t hccr;
3209 uint16_t mb[8];
3210 struct rsp_que *rsp;
3211 unsigned long flags;
3212 bool process_atio = false;
3213
3214 rsp = (struct rsp_que *) dev_id;
3215 if (!rsp) {
3216 ql_log(ql_log_info, NULL, 0x5059,
3217 "%s: NULL response queue pointer.\n", __func__);
3218 return IRQ_NONE;
3219 }
3220
3221 ha = rsp->hw;
3222 reg = &ha->iobase->isp24;
3223 status = 0;
3224
3225 if (unlikely(pci_channel_offline(ha->pdev)))
3226 return IRQ_HANDLED;
3227
3228 spin_lock_irqsave(&ha->hardware_lock, flags);
3229 vha = pci_get_drvdata(ha->pdev);
3230 for (iter = 50; iter--; ) {
3231 stat = RD_REG_DWORD(&reg->host_status);
3232 if (qla2x00_check_reg32_for_disconnect(vha, stat))
3233 break;
3234 if (stat & HSRX_RISC_PAUSED) {
3235 if (unlikely(pci_channel_offline(ha->pdev)))
3236 break;
3237
3238 hccr = RD_REG_DWORD(&reg->hccr);
3239
3240 ql_log(ql_log_warn, vha, 0x504b,
3241 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3242 hccr);
3243
3244 qla2xxx_check_risc_status(vha);
3245
3246 ha->isp_ops->fw_dump(vha, 1);
3247 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3248 break;
3249 } else if ((stat & HSRX_RISC_INT) == 0)
3250 break;
3251
3252 switch (stat & 0xff) {
3253 case INTR_ROM_MB_SUCCESS:
3254 case INTR_ROM_MB_FAILED:
3255 case INTR_MB_SUCCESS:
3256 case INTR_MB_FAILED:
3257 qla24xx_mbx_completion(vha, MSW(stat));
3258 status |= MBX_INTERRUPT;
3259
3260 break;
3261 case INTR_ASYNC_EVENT:
3262 mb[0] = MSW(stat);
3263 mb[1] = RD_REG_WORD(&reg->mailbox1);
3264 mb[2] = RD_REG_WORD(&reg->mailbox2);
3265 mb[3] = RD_REG_WORD(&reg->mailbox3);
3266 qla2x00_async_event(vha, rsp, mb);
3267 break;
3268 case INTR_RSP_QUE_UPDATE:
3269 case INTR_RSP_QUE_UPDATE_83XX:
3270 qla24xx_process_response_queue(vha, rsp);
3271 break;
3272 case INTR_ATIO_QUE_UPDATE_27XX:
3273 case INTR_ATIO_QUE_UPDATE:
3274 process_atio = true;
3275 break;
3276 case INTR_ATIO_RSP_QUE_UPDATE:
3277 process_atio = true;
3278 qla24xx_process_response_queue(vha, rsp);
3279 break;
3280 default:
3281 ql_dbg(ql_dbg_async, vha, 0x504f,
3282 "Unrecognized interrupt type (%d).\n", stat * 0xff);
3283 break;
3284 }
3285 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3286 RD_REG_DWORD_RELAXED(&reg->hccr);
3287 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
3288 ndelay(3500);
3289 }
3290 qla2x00_handle_mbx_completion(ha, status);
3291 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3292
3293 if (process_atio) {
3294 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3295 qlt_24xx_process_atio_queue(vha, 0);
3296 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3297 }
3298
3299 return IRQ_HANDLED;
3300 }
3301
3302 static irqreturn_t
3303 qla24xx_msix_rsp_q(int irq, void *dev_id)
3304 {
3305 struct qla_hw_data *ha;
3306 struct rsp_que *rsp;
3307 struct device_reg_24xx __iomem *reg;
3308 struct scsi_qla_host *vha;
3309 unsigned long flags;
3310
3311 rsp = (struct rsp_que *) dev_id;
3312 if (!rsp) {
3313 ql_log(ql_log_info, NULL, 0x505a,
3314 "%s: NULL response queue pointer.\n", __func__);
3315 return IRQ_NONE;
3316 }
3317 ha = rsp->hw;
3318 reg = &ha->iobase->isp24;
3319
3320 spin_lock_irqsave(&ha->hardware_lock, flags);
3321
3322 vha = pci_get_drvdata(ha->pdev);
3323 qla24xx_process_response_queue(vha, rsp);
3324 if (!ha->flags.disable_msix_handshake) {
3325 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3326 RD_REG_DWORD_RELAXED(&reg->hccr);
3327 }
3328 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3329
3330 return IRQ_HANDLED;
3331 }
3332
3333 static irqreturn_t
3334 qla24xx_msix_default(int irq, void *dev_id)
3335 {
3336 scsi_qla_host_t *vha;
3337 struct qla_hw_data *ha;
3338 struct rsp_que *rsp;
3339 struct device_reg_24xx __iomem *reg;
3340 int status;
3341 uint32_t stat;
3342 uint32_t hccr;
3343 uint16_t mb[8];
3344 unsigned long flags;
3345 bool process_atio = false;
3346
3347 rsp = (struct rsp_que *) dev_id;
3348 if (!rsp) {
3349 ql_log(ql_log_info, NULL, 0x505c,
3350 "%s: NULL response queue pointer.\n", __func__);
3351 return IRQ_NONE;
3352 }
3353 ha = rsp->hw;
3354 reg = &ha->iobase->isp24;
3355 status = 0;
3356
3357 spin_lock_irqsave(&ha->hardware_lock, flags);
3358 vha = pci_get_drvdata(ha->pdev);
3359 do {
3360 stat = RD_REG_DWORD(&reg->host_status);
3361 if (qla2x00_check_reg32_for_disconnect(vha, stat))
3362 break;
3363 if (stat & HSRX_RISC_PAUSED) {
3364 if (unlikely(pci_channel_offline(ha->pdev)))
3365 break;
3366
3367 hccr = RD_REG_DWORD(&reg->hccr);
3368
3369 ql_log(ql_log_info, vha, 0x5050,
3370 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3371 hccr);
3372
3373 qla2xxx_check_risc_status(vha);
3374
3375 ha->isp_ops->fw_dump(vha, 1);
3376 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3377 break;
3378 } else if ((stat & HSRX_RISC_INT) == 0)
3379 break;
3380
3381 switch (stat & 0xff) {
3382 case INTR_ROM_MB_SUCCESS:
3383 case INTR_ROM_MB_FAILED:
3384 case INTR_MB_SUCCESS:
3385 case INTR_MB_FAILED:
3386 qla24xx_mbx_completion(vha, MSW(stat));
3387 status |= MBX_INTERRUPT;
3388
3389 break;
3390 case INTR_ASYNC_EVENT:
3391 mb[0] = MSW(stat);
3392 mb[1] = RD_REG_WORD(&reg->mailbox1);
3393 mb[2] = RD_REG_WORD(&reg->mailbox2);
3394 mb[3] = RD_REG_WORD(&reg->mailbox3);
3395 qla2x00_async_event(vha, rsp, mb);
3396 break;
3397 case INTR_RSP_QUE_UPDATE:
3398 case INTR_RSP_QUE_UPDATE_83XX:
3399 qla24xx_process_response_queue(vha, rsp);
3400 break;
3401 case INTR_ATIO_QUE_UPDATE_27XX:
3402 case INTR_ATIO_QUE_UPDATE:
3403 process_atio = true;
3404 break;
3405 case INTR_ATIO_RSP_QUE_UPDATE:
3406 process_atio = true;
3407 qla24xx_process_response_queue(vha, rsp);
3408 break;
3409 default:
3410 ql_dbg(ql_dbg_async, vha, 0x5051,
3411 "Unrecognized interrupt type (%d).\n", stat & 0xff);
3412 break;
3413 }
3414 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3415 } while (0);
3416 qla2x00_handle_mbx_completion(ha, status);
3417 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3418
3419 if (process_atio) {
3420 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3421 qlt_24xx_process_atio_queue(vha, 0);
3422 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3423 }
3424
3425 return IRQ_HANDLED;
3426 }
3427
3428 irqreturn_t
3429 qla2xxx_msix_rsp_q(int irq, void *dev_id)
3430 {
3431 struct qla_hw_data *ha;
3432 struct qla_qpair *qpair;
3433 struct device_reg_24xx __iomem *reg;
3434 unsigned long flags;
3435
3436 qpair = dev_id;
3437 if (!qpair) {
3438 ql_log(ql_log_info, NULL, 0x505b,
3439 "%s: NULL response queue pointer.\n", __func__);
3440 return IRQ_NONE;
3441 }
3442 ha = qpair->hw;
3443
3444 /* Clear the interrupt, if enabled, for this response queue */
3445 if (unlikely(!ha->flags.disable_msix_handshake)) {
3446 reg = &ha->iobase->isp24;
3447 spin_lock_irqsave(&ha->hardware_lock, flags);
3448 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3449 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3450 }
3451
3452 queue_work(ha->wq, &qpair->q_work);
3453
3454 return IRQ_HANDLED;
3455 }
3456
3457 /* Interrupt handling helpers. */
3458
3459 struct qla_init_msix_entry {
3460 const char *name;
3461 irq_handler_t handler;
3462 };
3463
3464 static const struct qla_init_msix_entry msix_entries[] = {
3465 { "default", qla24xx_msix_default },
3466 { "rsp_q", qla24xx_msix_rsp_q },
3467 { "atio_q", qla83xx_msix_atio_q },
3468 { "qpair_multiq", qla2xxx_msix_rsp_q },
3469 };
3470
3471 static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
3472 { "qla2xxx (default)", qla82xx_msix_default },
3473 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
3474 };
3475
3476 static int
3477 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
3478 {
3479 int i, ret;
3480 struct qla_msix_entry *qentry;
3481 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3482 int min_vecs = QLA_BASE_VECTORS;
3483 struct irq_affinity desc = {
3484 .pre_vectors = QLA_BASE_VECTORS,
3485 };
3486
3487 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3488 IS_ATIO_MSIX_CAPABLE(ha)) {
3489 desc.pre_vectors++;
3490 min_vecs++;
3491 }
3492
3493 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
3494 /* user wants to control IRQ setting for target mode */
3495 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
3496 ha->msix_count, PCI_IRQ_MSIX);
3497 } else
3498 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
3499 ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
3500 &desc);
3501
3502 if (ret < 0) {
3503 ql_log(ql_log_fatal, vha, 0x00c7,
3504 "MSI-X: Failed to enable support, "
3505 "giving up -- %d/%d.\n",
3506 ha->msix_count, ret);
3507 goto msix_out;
3508 } else if (ret < ha->msix_count) {
3509 ql_log(ql_log_info, vha, 0x00c6,
3510 "MSI-X: Using %d vectors\n", ret);
3511 ha->msix_count = ret;
3512 /* Recalculate queue values */
3513 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
3514 ha->max_req_queues = ha->msix_count - 1;
3515
3516 /* ATIOQ needs 1 vector. That's 1 less QPair */
3517 if (QLA_TGT_MODE_ENABLED())
3518 ha->max_req_queues--;
3519
3520 ha->max_rsp_queues = ha->max_req_queues;
3521
3522 ha->max_qpairs = ha->max_req_queues - 1;
3523 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
3524 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
3525 }
3526 }
3527 vha->irq_offset = desc.pre_vectors;
3528 ha->msix_entries = kcalloc(ha->msix_count,
3529 sizeof(struct qla_msix_entry),
3530 GFP_KERNEL);
3531 if (!ha->msix_entries) {
3532 ql_log(ql_log_fatal, vha, 0x00c8,
3533 "Failed to allocate memory for ha->msix_entries.\n");
3534 ret = -ENOMEM;
3535 goto free_irqs;
3536 }
3537 ha->flags.msix_enabled = 1;
3538
3539 for (i = 0; i < ha->msix_count; i++) {
3540 qentry = &ha->msix_entries[i];
3541 qentry->vector = pci_irq_vector(ha->pdev, i);
3542 qentry->entry = i;
3543 qentry->have_irq = 0;
3544 qentry->in_use = 0;
3545 qentry->handle = NULL;
3546 }
3547
3548 /* Enable MSI-X vectors for the base queue */
3549 for (i = 0; i < QLA_BASE_VECTORS; i++) {
3550 qentry = &ha->msix_entries[i];
3551 qentry->handle = rsp;
3552 rsp->msix = qentry;
3553 scnprintf(qentry->name, sizeof(qentry->name),
3554 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
3555 if (IS_P3P_TYPE(ha))
3556 ret = request_irq(qentry->vector,
3557 qla82xx_msix_entries[i].handler,
3558 0, qla82xx_msix_entries[i].name, rsp);
3559 else
3560 ret = request_irq(qentry->vector,
3561 msix_entries[i].handler,
3562 0, qentry->name, rsp);
3563 if (ret)
3564 goto msix_register_fail;
3565 qentry->have_irq = 1;
3566 qentry->in_use = 1;
3567 }
3568
3569 /*
3570 * If target mode is enable, also request the vector for the ATIO
3571 * queue.
3572 */
3573 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3574 IS_ATIO_MSIX_CAPABLE(ha)) {
3575 qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
3576 rsp->msix = qentry;
3577 qentry->handle = rsp;
3578 scnprintf(qentry->name, sizeof(qentry->name),
3579 "qla2xxx%lu_%s", vha->host_no,
3580 msix_entries[QLA_ATIO_VECTOR].name);
3581 qentry->in_use = 1;
3582 ret = request_irq(qentry->vector,
3583 msix_entries[QLA_ATIO_VECTOR].handler,
3584 0, qentry->name, rsp);
3585 qentry->have_irq = 1;
3586 }
3587
3588 msix_register_fail:
3589 if (ret) {
3590 ql_log(ql_log_fatal, vha, 0x00cb,
3591 "MSI-X: unable to register handler -- %x/%d.\n",
3592 qentry->vector, ret);
3593 qla2x00_free_irqs(vha);
3594 ha->mqenable = 0;
3595 goto msix_out;
3596 }
3597
3598 /* Enable MSI-X vector for response queue update for queue 0 */
3599 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3600 if (ha->msixbase && ha->mqiobase &&
3601 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3602 ql2xmqsupport))
3603 ha->mqenable = 1;
3604 } else
3605 if (ha->mqiobase &&
3606 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3607 ql2xmqsupport))
3608 ha->mqenable = 1;
3609 ql_dbg(ql_dbg_multiq, vha, 0xc005,
3610 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3611 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3612 ql_dbg(ql_dbg_init, vha, 0x0055,
3613 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3614 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3615
3616 msix_out:
3617 return ret;
3618
3619 free_irqs:
3620 pci_free_irq_vectors(ha->pdev);
3621 goto msix_out;
3622 }
3623
3624 int
3625 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
3626 {
3627 int ret = QLA_FUNCTION_FAILED;
3628 device_reg_t *reg = ha->iobase;
3629 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3630
3631 /* If possible, enable MSI-X. */
3632 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
3633 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
3634 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha)))
3635 goto skip_msi;
3636
3637 if (ql2xenablemsix == 2)
3638 goto skip_msix;
3639
3640 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
3641 (ha->pdev->subsystem_device == 0x7040 ||
3642 ha->pdev->subsystem_device == 0x7041 ||
3643 ha->pdev->subsystem_device == 0x1705)) {
3644 ql_log(ql_log_warn, vha, 0x0034,
3645 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
3646 ha->pdev->subsystem_vendor,
3647 ha->pdev->subsystem_device);
3648 goto skip_msi;
3649 }
3650
3651 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
3652 ql_log(ql_log_warn, vha, 0x0035,
3653 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
3654 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
3655 goto skip_msix;
3656 }
3657
3658 ret = qla24xx_enable_msix(ha, rsp);
3659 if (!ret) {
3660 ql_dbg(ql_dbg_init, vha, 0x0036,
3661 "MSI-X: Enabled (0x%X, 0x%X).\n",
3662 ha->chip_revision, ha->fw_attributes);
3663 goto clear_risc_ints;
3664 }
3665
3666 skip_msix:
3667
3668 ql_log(ql_log_info, vha, 0x0037,
3669 "Falling back-to MSI mode -- ret=%d.\n", ret);
3670
3671 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
3672 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
3673 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3674 goto skip_msi;
3675
3676 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
3677 if (ret > 0) {
3678 ql_dbg(ql_dbg_init, vha, 0x0038,
3679 "MSI: Enabled.\n");
3680 ha->flags.msi_enabled = 1;
3681 } else
3682 ql_log(ql_log_warn, vha, 0x0039,
3683 "Falling back-to INTa mode -- ret=%d.\n", ret);
3684 skip_msi:
3685
3686 /* Skip INTx on ISP82xx. */
3687 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
3688 return QLA_FUNCTION_FAILED;
3689
3690 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
3691 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
3692 QLA2XXX_DRIVER_NAME, rsp);
3693 if (ret) {
3694 ql_log(ql_log_warn, vha, 0x003a,
3695 "Failed to reserve interrupt %d already in use.\n",
3696 ha->pdev->irq);
3697 goto fail;
3698 } else if (!ha->flags.msi_enabled) {
3699 ql_dbg(ql_dbg_init, vha, 0x0125,
3700 "INTa mode: Enabled.\n");
3701 ha->flags.mr_intr_valid = 1;
3702 }
3703
3704 clear_risc_ints:
3705 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
3706 goto fail;
3707
3708 spin_lock_irq(&ha->hardware_lock);
3709 WRT_REG_WORD(&reg->isp.semaphore, 0);
3710 spin_unlock_irq(&ha->hardware_lock);
3711
3712 fail:
3713 return ret;
3714 }
3715
3716 void
3717 qla2x00_free_irqs(scsi_qla_host_t *vha)
3718 {
3719 struct qla_hw_data *ha = vha->hw;
3720 struct rsp_que *rsp;
3721 struct qla_msix_entry *qentry;
3722 int i;
3723
3724 /*
3725 * We need to check that ha->rsp_q_map is valid in case we are called
3726 * from a probe failure context.
3727 */
3728 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
3729 goto free_irqs;
3730 rsp = ha->rsp_q_map[0];
3731
3732 if (ha->flags.msix_enabled) {
3733 for (i = 0; i < ha->msix_count; i++) {
3734 qentry = &ha->msix_entries[i];
3735 if (qentry->have_irq) {
3736 irq_set_affinity_notifier(qentry->vector, NULL);
3737 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
3738 }
3739 }
3740 kfree(ha->msix_entries);
3741 ha->msix_entries = NULL;
3742 ha->flags.msix_enabled = 0;
3743 ql_dbg(ql_dbg_init, vha, 0x0042,
3744 "Disabled MSI-X.\n");
3745 } else {
3746 free_irq(pci_irq_vector(ha->pdev, 0), rsp);
3747 }
3748
3749 free_irqs:
3750 pci_free_irq_vectors(ha->pdev);
3751 }
3752
3753 int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
3754 struct qla_msix_entry *msix, int vector_type)
3755 {
3756 const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
3757 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3758 int ret;
3759
3760 scnprintf(msix->name, sizeof(msix->name),
3761 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
3762 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
3763 if (ret) {
3764 ql_log(ql_log_fatal, vha, 0x00e6,
3765 "MSI-X: Unable to register handler -- %x/%d.\n",
3766 msix->vector, ret);
3767 return ret;
3768 }
3769 msix->have_irq = 1;
3770 msix->handle = qpair;
3771 return ret;
3772 }
Linux with added FPC-III support