treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / staging / wilc1000 / sdio.c
blobca99335687c471013af5e16e3d0da1bd81554399
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries.
4 * All rights reserved.
5 */
7 #include <linux/clk.h>
8 #include <linux/mmc/sdio_func.h>
9 #include <linux/mmc/host.h>
11 #include "netdev.h"
12 #include "cfg80211.h"
14 #define SDIO_MODALIAS "wilc1000_sdio"
16 #define SDIO_VENDOR_ID_WILC 0x0296
17 #define SDIO_DEVICE_ID_WILC 0x5347
19 static const struct sdio_device_id wilc_sdio_ids[] = {
20 { SDIO_DEVICE(SDIO_VENDOR_ID_WILC, SDIO_DEVICE_ID_WILC) },
21 { },
24 #define WILC_SDIO_BLOCK_SIZE 512
26 struct wilc_sdio {
27 bool irq_gpio;
28 u32 block_size;
29 int nint;
30 /* Max num interrupts allowed in registers 0xf7, 0xf8 */
31 #define MAX_NUN_INT_THRPT_ENH2 (5)
32 int has_thrpt_enh3;
35 struct sdio_cmd52 {
36 u32 read_write: 1;
37 u32 function: 3;
38 u32 raw: 1;
39 u32 address: 17;
40 u32 data: 8;
43 struct sdio_cmd53 {
44 u32 read_write: 1;
45 u32 function: 3;
46 u32 block_mode: 1;
47 u32 increment: 1;
48 u32 address: 17;
49 u32 count: 9;
50 u8 *buffer;
51 u32 block_size;
54 static const struct wilc_hif_func wilc_hif_sdio;
56 static void wilc_sdio_interrupt(struct sdio_func *func)
58 sdio_release_host(func);
59 wilc_handle_isr(sdio_get_drvdata(func));
60 sdio_claim_host(func);
63 static int wilc_sdio_cmd52(struct wilc *wilc, struct sdio_cmd52 *cmd)
65 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev);
66 int ret;
67 u8 data;
69 sdio_claim_host(func);
71 func->num = cmd->function;
72 if (cmd->read_write) { /* write */
73 if (cmd->raw) {
74 sdio_writeb(func, cmd->data, cmd->address, &ret);
75 data = sdio_readb(func, cmd->address, &ret);
76 cmd->data = data;
77 } else {
78 sdio_writeb(func, cmd->data, cmd->address, &ret);
80 } else { /* read */
81 data = sdio_readb(func, cmd->address, &ret);
82 cmd->data = data;
85 sdio_release_host(func);
87 if (ret)
88 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret);
89 return ret;
92 static int wilc_sdio_cmd53(struct wilc *wilc, struct sdio_cmd53 *cmd)
94 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev);
95 int size, ret;
97 sdio_claim_host(func);
99 func->num = cmd->function;
100 func->cur_blksize = cmd->block_size;
101 if (cmd->block_mode)
102 size = cmd->count * cmd->block_size;
103 else
104 size = cmd->count;
106 if (cmd->read_write) { /* write */
107 ret = sdio_memcpy_toio(func, cmd->address,
108 (void *)cmd->buffer, size);
109 } else { /* read */
110 ret = sdio_memcpy_fromio(func, (void *)cmd->buffer,
111 cmd->address, size);
114 sdio_release_host(func);
116 if (ret)
117 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret);
119 return ret;
122 static int wilc_sdio_probe(struct sdio_func *func,
123 const struct sdio_device_id *id)
125 struct wilc *wilc;
126 int ret;
127 struct gpio_desc *gpio = NULL;
128 struct wilc_sdio *sdio_priv;
130 sdio_priv = kzalloc(sizeof(*sdio_priv), GFP_KERNEL);
131 if (!sdio_priv)
132 return -ENOMEM;
134 if (IS_ENABLED(CONFIG_WILC1000_HW_OOB_INTR)) {
135 gpio = gpiod_get(&func->dev, "irq", GPIOD_IN);
136 if (IS_ERR(gpio)) {
137 /* get the GPIO descriptor from hardcode GPIO number */
138 gpio = gpio_to_desc(GPIO_NUM);
139 if (!gpio)
140 dev_err(&func->dev, "failed to get irq gpio\n");
144 ret = wilc_cfg80211_init(&wilc, &func->dev, WILC_HIF_SDIO,
145 &wilc_hif_sdio);
146 if (ret) {
147 kfree(sdio_priv);
148 return ret;
150 sdio_set_drvdata(func, wilc);
151 wilc->bus_data = sdio_priv;
152 wilc->dev = &func->dev;
153 wilc->gpio_irq = gpio;
155 wilc->rtc_clk = devm_clk_get(&func->card->dev, "rtc_clk");
156 if (PTR_ERR_OR_ZERO(wilc->rtc_clk) == -EPROBE_DEFER)
157 return -EPROBE_DEFER;
158 else if (!IS_ERR(wilc->rtc_clk))
159 clk_prepare_enable(wilc->rtc_clk);
161 dev_info(&func->dev, "Driver Initializing success\n");
162 return 0;
165 static void wilc_sdio_remove(struct sdio_func *func)
167 struct wilc *wilc = sdio_get_drvdata(func);
169 /* free the GPIO in module remove */
170 if (wilc->gpio_irq)
171 gpiod_put(wilc->gpio_irq);
173 if (!IS_ERR(wilc->rtc_clk))
174 clk_disable_unprepare(wilc->rtc_clk);
176 wilc_netdev_cleanup(wilc);
179 static int wilc_sdio_reset(struct wilc *wilc)
181 struct sdio_cmd52 cmd;
182 int ret;
183 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
185 cmd.read_write = 1;
186 cmd.function = 0;
187 cmd.raw = 0;
188 cmd.address = 0x6;
189 cmd.data = 0x8;
190 ret = wilc_sdio_cmd52(wilc, &cmd);
191 if (ret) {
192 dev_err(&func->dev, "Fail cmd 52, reset cmd ...\n");
193 return ret;
195 return 0;
198 static int wilc_sdio_suspend(struct device *dev)
200 struct sdio_func *func = dev_to_sdio_func(dev);
201 struct wilc *wilc = sdio_get_drvdata(func);
202 int ret;
204 dev_info(dev, "sdio suspend\n");
205 chip_wakeup(wilc);
207 if (!IS_ERR(wilc->rtc_clk))
208 clk_disable_unprepare(wilc->rtc_clk);
210 if (wilc->suspend_event) {
211 host_sleep_notify(wilc);
212 chip_allow_sleep(wilc);
215 ret = wilc_sdio_reset(wilc);
216 if (ret) {
217 dev_err(&func->dev, "Fail reset sdio\n");
218 return ret;
220 sdio_claim_host(func);
222 return 0;
225 static int wilc_sdio_enable_interrupt(struct wilc *dev)
227 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev);
228 int ret = 0;
230 sdio_claim_host(func);
231 ret = sdio_claim_irq(func, wilc_sdio_interrupt);
232 sdio_release_host(func);
234 if (ret < 0) {
235 dev_err(&func->dev, "can't claim sdio_irq, err(%d)\n", ret);
236 ret = -EIO;
238 return ret;
241 static void wilc_sdio_disable_interrupt(struct wilc *dev)
243 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev);
244 int ret;
246 sdio_claim_host(func);
247 ret = sdio_release_irq(func);
248 if (ret < 0)
249 dev_err(&func->dev, "can't release sdio_irq, err(%d)\n", ret);
250 sdio_release_host(func);
253 /********************************************
255 * Function 0
257 ********************************************/
259 static int wilc_sdio_set_func0_csa_address(struct wilc *wilc, u32 adr)
261 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
262 struct sdio_cmd52 cmd;
263 int ret;
266 * Review: BIG ENDIAN
268 cmd.read_write = 1;
269 cmd.function = 0;
270 cmd.raw = 0;
271 cmd.address = 0x10c;
272 cmd.data = (u8)adr;
273 ret = wilc_sdio_cmd52(wilc, &cmd);
274 if (ret) {
275 dev_err(&func->dev, "Failed cmd52, set 0x10c data...\n");
276 return ret;
279 cmd.address = 0x10d;
280 cmd.data = (u8)(adr >> 8);
281 ret = wilc_sdio_cmd52(wilc, &cmd);
282 if (ret) {
283 dev_err(&func->dev, "Failed cmd52, set 0x10d data...\n");
284 return ret;
287 cmd.address = 0x10e;
288 cmd.data = (u8)(adr >> 16);
289 ret = wilc_sdio_cmd52(wilc, &cmd);
290 if (ret) {
291 dev_err(&func->dev, "Failed cmd52, set 0x10e data...\n");
292 return ret;
295 return 0;
298 static int wilc_sdio_set_func0_block_size(struct wilc *wilc, u32 block_size)
300 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
301 struct sdio_cmd52 cmd;
302 int ret;
304 cmd.read_write = 1;
305 cmd.function = 0;
306 cmd.raw = 0;
307 cmd.address = 0x10;
308 cmd.data = (u8)block_size;
309 ret = wilc_sdio_cmd52(wilc, &cmd);
310 if (ret) {
311 dev_err(&func->dev, "Failed cmd52, set 0x10 data...\n");
312 return ret;
315 cmd.address = 0x11;
316 cmd.data = (u8)(block_size >> 8);
317 ret = wilc_sdio_cmd52(wilc, &cmd);
318 if (ret) {
319 dev_err(&func->dev, "Failed cmd52, set 0x11 data...\n");
320 return ret;
323 return 0;
326 /********************************************
328 * Function 1
330 ********************************************/
332 static int wilc_sdio_set_func1_block_size(struct wilc *wilc, u32 block_size)
334 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
335 struct sdio_cmd52 cmd;
336 int ret;
338 cmd.read_write = 1;
339 cmd.function = 0;
340 cmd.raw = 0;
341 cmd.address = 0x110;
342 cmd.data = (u8)block_size;
343 ret = wilc_sdio_cmd52(wilc, &cmd);
344 if (ret) {
345 dev_err(&func->dev, "Failed cmd52, set 0x110 data...\n");
346 return ret;
348 cmd.address = 0x111;
349 cmd.data = (u8)(block_size >> 8);
350 ret = wilc_sdio_cmd52(wilc, &cmd);
351 if (ret) {
352 dev_err(&func->dev, "Failed cmd52, set 0x111 data...\n");
353 return ret;
356 return 0;
359 /********************************************
361 * Sdio interfaces
363 ********************************************/
364 static int wilc_sdio_write_reg(struct wilc *wilc, u32 addr, u32 data)
366 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
367 struct wilc_sdio *sdio_priv = wilc->bus_data;
368 int ret;
370 cpu_to_le32s(&data);
372 if (addr >= 0xf0 && addr <= 0xff) {
373 struct sdio_cmd52 cmd;
375 cmd.read_write = 1;
376 cmd.function = 0;
377 cmd.raw = 0;
378 cmd.address = addr;
379 cmd.data = data;
380 ret = wilc_sdio_cmd52(wilc, &cmd);
381 if (ret)
382 dev_err(&func->dev,
383 "Failed cmd 52, read reg (%08x) ...\n", addr);
384 } else {
385 struct sdio_cmd53 cmd;
388 * set the AHB address
390 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
391 if (ret)
392 return ret;
394 cmd.read_write = 1;
395 cmd.function = 0;
396 cmd.address = 0x10f;
397 cmd.block_mode = 0;
398 cmd.increment = 1;
399 cmd.count = 4;
400 cmd.buffer = (u8 *)&data;
401 cmd.block_size = sdio_priv->block_size;
402 ret = wilc_sdio_cmd53(wilc, &cmd);
403 if (ret)
404 dev_err(&func->dev,
405 "Failed cmd53, write reg (%08x)...\n", addr);
408 return ret;
411 static int wilc_sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
413 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
414 struct wilc_sdio *sdio_priv = wilc->bus_data;
415 u32 block_size = sdio_priv->block_size;
416 struct sdio_cmd53 cmd;
417 int nblk, nleft, ret;
419 cmd.read_write = 1;
420 if (addr > 0) {
422 * has to be word aligned...
424 if (size & 0x3) {
425 size += 4;
426 size &= ~0x3;
430 * func 0 access
432 cmd.function = 0;
433 cmd.address = 0x10f;
434 } else {
436 * has to be word aligned...
438 if (size & 0x3) {
439 size += 4;
440 size &= ~0x3;
444 * func 1 access
446 cmd.function = 1;
447 cmd.address = 0;
450 nblk = size / block_size;
451 nleft = size % block_size;
453 if (nblk > 0) {
454 cmd.block_mode = 1;
455 cmd.increment = 1;
456 cmd.count = nblk;
457 cmd.buffer = buf;
458 cmd.block_size = block_size;
459 if (addr > 0) {
460 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
461 if (ret)
462 return ret;
464 ret = wilc_sdio_cmd53(wilc, &cmd);
465 if (ret) {
466 dev_err(&func->dev,
467 "Failed cmd53 [%x], block send...\n", addr);
468 return ret;
470 if (addr > 0)
471 addr += nblk * block_size;
472 buf += nblk * block_size;
475 if (nleft > 0) {
476 cmd.block_mode = 0;
477 cmd.increment = 1;
478 cmd.count = nleft;
479 cmd.buffer = buf;
481 cmd.block_size = block_size;
483 if (addr > 0) {
484 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
485 if (ret)
486 return ret;
488 ret = wilc_sdio_cmd53(wilc, &cmd);
489 if (ret) {
490 dev_err(&func->dev,
491 "Failed cmd53 [%x], bytes send...\n", addr);
492 return ret;
496 return 0;
499 static int wilc_sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data)
501 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
502 struct wilc_sdio *sdio_priv = wilc->bus_data;
503 int ret;
505 if (addr >= 0xf0 && addr <= 0xff) {
506 struct sdio_cmd52 cmd;
508 cmd.read_write = 0;
509 cmd.function = 0;
510 cmd.raw = 0;
511 cmd.address = addr;
512 ret = wilc_sdio_cmd52(wilc, &cmd);
513 if (ret) {
514 dev_err(&func->dev,
515 "Failed cmd 52, read reg (%08x) ...\n", addr);
516 return ret;
518 *data = cmd.data;
519 } else {
520 struct sdio_cmd53 cmd;
522 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
523 if (ret)
524 return ret;
526 cmd.read_write = 0;
527 cmd.function = 0;
528 cmd.address = 0x10f;
529 cmd.block_mode = 0;
530 cmd.increment = 1;
531 cmd.count = 4;
532 cmd.buffer = (u8 *)data;
534 cmd.block_size = sdio_priv->block_size;
535 ret = wilc_sdio_cmd53(wilc, &cmd);
536 if (ret) {
537 dev_err(&func->dev,
538 "Failed cmd53, read reg (%08x)...\n", addr);
539 return ret;
543 le32_to_cpus(data);
544 return 0;
547 static int wilc_sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
549 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
550 struct wilc_sdio *sdio_priv = wilc->bus_data;
551 u32 block_size = sdio_priv->block_size;
552 struct sdio_cmd53 cmd;
553 int nblk, nleft, ret;
555 cmd.read_write = 0;
556 if (addr > 0) {
558 * has to be word aligned...
560 if (size & 0x3) {
561 size += 4;
562 size &= ~0x3;
566 * func 0 access
568 cmd.function = 0;
569 cmd.address = 0x10f;
570 } else {
572 * has to be word aligned...
574 if (size & 0x3) {
575 size += 4;
576 size &= ~0x3;
580 * func 1 access
582 cmd.function = 1;
583 cmd.address = 0;
586 nblk = size / block_size;
587 nleft = size % block_size;
589 if (nblk > 0) {
590 cmd.block_mode = 1;
591 cmd.increment = 1;
592 cmd.count = nblk;
593 cmd.buffer = buf;
594 cmd.block_size = block_size;
595 if (addr > 0) {
596 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
597 if (ret)
598 return ret;
600 ret = wilc_sdio_cmd53(wilc, &cmd);
601 if (ret) {
602 dev_err(&func->dev,
603 "Failed cmd53 [%x], block read...\n", addr);
604 return ret;
606 if (addr > 0)
607 addr += nblk * block_size;
608 buf += nblk * block_size;
609 } /* if (nblk > 0) */
611 if (nleft > 0) {
612 cmd.block_mode = 0;
613 cmd.increment = 1;
614 cmd.count = nleft;
615 cmd.buffer = buf;
617 cmd.block_size = block_size;
619 if (addr > 0) {
620 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
621 if (ret)
622 return ret;
624 ret = wilc_sdio_cmd53(wilc, &cmd);
625 if (ret) {
626 dev_err(&func->dev,
627 "Failed cmd53 [%x], bytes read...\n", addr);
628 return ret;
632 return 0;
635 /********************************************
637 * Bus interfaces
639 ********************************************/
641 static int wilc_sdio_deinit(struct wilc *wilc)
643 return 0;
646 static int wilc_sdio_init(struct wilc *wilc, bool resume)
648 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
649 struct wilc_sdio *sdio_priv = wilc->bus_data;
650 struct sdio_cmd52 cmd;
651 int loop, ret;
652 u32 chipid;
654 if (!resume)
655 sdio_priv->irq_gpio = wilc->dev_irq_num;
658 * function 0 csa enable
660 cmd.read_write = 1;
661 cmd.function = 0;
662 cmd.raw = 1;
663 cmd.address = 0x100;
664 cmd.data = 0x80;
665 ret = wilc_sdio_cmd52(wilc, &cmd);
666 if (ret) {
667 dev_err(&func->dev, "Fail cmd 52, enable csa...\n");
668 return ret;
672 * function 0 block size
674 ret = wilc_sdio_set_func0_block_size(wilc, WILC_SDIO_BLOCK_SIZE);
675 if (ret) {
676 dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n");
677 return ret;
679 sdio_priv->block_size = WILC_SDIO_BLOCK_SIZE;
682 * enable func1 IO
684 cmd.read_write = 1;
685 cmd.function = 0;
686 cmd.raw = 1;
687 cmd.address = 0x2;
688 cmd.data = 0x2;
689 ret = wilc_sdio_cmd52(wilc, &cmd);
690 if (ret) {
691 dev_err(&func->dev,
692 "Fail cmd 52, set IOE register...\n");
693 return ret;
697 * make sure func 1 is up
699 cmd.read_write = 0;
700 cmd.function = 0;
701 cmd.raw = 0;
702 cmd.address = 0x3;
703 loop = 3;
704 do {
705 cmd.data = 0;
706 ret = wilc_sdio_cmd52(wilc, &cmd);
707 if (ret) {
708 dev_err(&func->dev,
709 "Fail cmd 52, get IOR register...\n");
710 return ret;
712 if (cmd.data == 0x2)
713 break;
714 } while (loop--);
716 if (loop <= 0) {
717 dev_err(&func->dev, "Fail func 1 is not ready...\n");
718 return -EINVAL;
722 * func 1 is ready, set func 1 block size
724 ret = wilc_sdio_set_func1_block_size(wilc, WILC_SDIO_BLOCK_SIZE);
725 if (ret) {
726 dev_err(&func->dev, "Fail set func 1 block size...\n");
727 return ret;
731 * func 1 interrupt enable
733 cmd.read_write = 1;
734 cmd.function = 0;
735 cmd.raw = 1;
736 cmd.address = 0x4;
737 cmd.data = 0x3;
738 ret = wilc_sdio_cmd52(wilc, &cmd);
739 if (ret) {
740 dev_err(&func->dev, "Fail cmd 52, set IEN register...\n");
741 return ret;
745 * make sure can read back chip id correctly
747 if (!resume) {
748 ret = wilc_sdio_read_reg(wilc, 0x1000, &chipid);
749 if (ret) {
750 dev_err(&func->dev, "Fail cmd read chip id...\n");
751 return ret;
753 dev_err(&func->dev, "chipid (%08x)\n", chipid);
754 if ((chipid & 0xfff) > 0x2a0)
755 sdio_priv->has_thrpt_enh3 = 1;
756 else
757 sdio_priv->has_thrpt_enh3 = 0;
758 dev_info(&func->dev, "has_thrpt_enh3 = %d...\n",
759 sdio_priv->has_thrpt_enh3);
762 return 0;
765 static int wilc_sdio_read_size(struct wilc *wilc, u32 *size)
767 u32 tmp;
768 struct sdio_cmd52 cmd;
771 * Read DMA count in words
773 cmd.read_write = 0;
774 cmd.function = 0;
775 cmd.raw = 0;
776 cmd.address = 0xf2;
777 cmd.data = 0;
778 wilc_sdio_cmd52(wilc, &cmd);
779 tmp = cmd.data;
781 cmd.address = 0xf3;
782 cmd.data = 0;
783 wilc_sdio_cmd52(wilc, &cmd);
784 tmp |= (cmd.data << 8);
786 *size = tmp;
787 return 0;
790 static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status)
792 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
793 struct wilc_sdio *sdio_priv = wilc->bus_data;
794 u32 tmp;
795 struct sdio_cmd52 cmd;
797 wilc_sdio_read_size(wilc, &tmp);
800 * Read IRQ flags
802 if (!sdio_priv->irq_gpio) {
803 int i;
805 cmd.read_write = 0;
806 cmd.function = 1;
807 cmd.address = 0x04;
808 cmd.data = 0;
809 wilc_sdio_cmd52(wilc, &cmd);
811 if (cmd.data & BIT(0))
812 tmp |= INT_0;
813 if (cmd.data & BIT(2))
814 tmp |= INT_1;
815 if (cmd.data & BIT(3))
816 tmp |= INT_2;
817 if (cmd.data & BIT(4))
818 tmp |= INT_3;
819 if (cmd.data & BIT(5))
820 tmp |= INT_4;
821 if (cmd.data & BIT(6))
822 tmp |= INT_5;
823 for (i = sdio_priv->nint; i < MAX_NUM_INT; i++) {
824 if ((tmp >> (IRG_FLAGS_OFFSET + i)) & 0x1) {
825 dev_err(&func->dev,
826 "Unexpected interrupt (1) : tmp=%x, data=%x\n",
827 tmp, cmd.data);
828 break;
831 } else {
832 u32 irq_flags;
834 cmd.read_write = 0;
835 cmd.function = 0;
836 cmd.raw = 0;
837 cmd.address = 0xf7;
838 cmd.data = 0;
839 wilc_sdio_cmd52(wilc, &cmd);
840 irq_flags = cmd.data & 0x1f;
841 tmp |= ((irq_flags >> 0) << IRG_FLAGS_OFFSET);
844 *int_status = tmp;
846 return 0;
849 static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val)
851 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
852 struct wilc_sdio *sdio_priv = wilc->bus_data;
853 int ret;
854 int vmm_ctl;
856 if (sdio_priv->has_thrpt_enh3) {
857 u32 reg;
859 if (sdio_priv->irq_gpio) {
860 u32 flags;
862 flags = val & (BIT(MAX_NUN_INT_THRPT_ENH2) - 1);
863 reg = flags;
864 } else {
865 reg = 0;
867 /* select VMM table 0 */
868 if (val & SEL_VMM_TBL0)
869 reg |= BIT(5);
870 /* select VMM table 1 */
871 if (val & SEL_VMM_TBL1)
872 reg |= BIT(6);
873 /* enable VMM */
874 if (val & EN_VMM)
875 reg |= BIT(7);
876 if (reg) {
877 struct sdio_cmd52 cmd;
879 cmd.read_write = 1;
880 cmd.function = 0;
881 cmd.raw = 0;
882 cmd.address = 0xf8;
883 cmd.data = reg;
885 ret = wilc_sdio_cmd52(wilc, &cmd);
886 if (ret) {
887 dev_err(&func->dev,
888 "Failed cmd52, set 0xf8 data (%d) ...\n",
889 __LINE__);
890 return ret;
893 return 0;
895 if (sdio_priv->irq_gpio) {
896 /* has_thrpt_enh2 uses register 0xf8 to clear interrupts. */
898 * Cannot clear multiple interrupts.
899 * Must clear each interrupt individually.
901 u32 flags;
903 flags = val & (BIT(MAX_NUM_INT) - 1);
904 if (flags) {
905 int i;
907 for (i = 0; i < sdio_priv->nint; i++) {
908 if (flags & 1) {
909 struct sdio_cmd52 cmd;
911 cmd.read_write = 1;
912 cmd.function = 0;
913 cmd.raw = 0;
914 cmd.address = 0xf8;
915 cmd.data = BIT(i);
917 ret = wilc_sdio_cmd52(wilc, &cmd);
918 if (ret) {
919 dev_err(&func->dev,
920 "Failed cmd52, set 0xf8 data (%d) ...\n",
921 __LINE__);
922 return ret;
925 flags >>= 1;
928 for (i = sdio_priv->nint; i < MAX_NUM_INT; i++) {
929 if (flags & 1)
930 dev_err(&func->dev,
931 "Unexpected interrupt cleared %d...\n",
933 flags >>= 1;
938 vmm_ctl = 0;
939 /* select VMM table 0 */
940 if (val & SEL_VMM_TBL0)
941 vmm_ctl |= BIT(0);
942 /* select VMM table 1 */
943 if (val & SEL_VMM_TBL1)
944 vmm_ctl |= BIT(1);
945 /* enable VMM */
946 if (val & EN_VMM)
947 vmm_ctl |= BIT(2);
949 if (vmm_ctl) {
950 struct sdio_cmd52 cmd;
952 cmd.read_write = 1;
953 cmd.function = 0;
954 cmd.raw = 0;
955 cmd.address = 0xf6;
956 cmd.data = vmm_ctl;
957 ret = wilc_sdio_cmd52(wilc, &cmd);
958 if (ret) {
959 dev_err(&func->dev,
960 "Failed cmd52, set 0xf6 data (%d) ...\n",
961 __LINE__);
962 return ret;
965 return 0;
968 static int wilc_sdio_sync_ext(struct wilc *wilc, int nint)
970 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
971 struct wilc_sdio *sdio_priv = wilc->bus_data;
972 u32 reg;
974 if (nint > MAX_NUM_INT) {
975 dev_err(&func->dev, "Too many interrupts (%d)...\n", nint);
976 return -EINVAL;
978 if (nint > MAX_NUN_INT_THRPT_ENH2) {
979 dev_err(&func->dev,
980 "Cannot support more than 5 interrupts when has_thrpt_enh2=1.\n");
981 return -EINVAL;
984 sdio_priv->nint = nint;
987 * Disable power sequencer
989 if (wilc_sdio_read_reg(wilc, WILC_MISC, &reg)) {
990 dev_err(&func->dev, "Failed read misc reg...\n");
991 return -EINVAL;
994 reg &= ~BIT(8);
995 if (wilc_sdio_write_reg(wilc, WILC_MISC, reg)) {
996 dev_err(&func->dev, "Failed write misc reg...\n");
997 return -EINVAL;
1000 if (sdio_priv->irq_gpio) {
1001 u32 reg;
1002 int ret, i;
1005 * interrupt pin mux select
1007 ret = wilc_sdio_read_reg(wilc, WILC_PIN_MUX_0, &reg);
1008 if (ret) {
1009 dev_err(&func->dev, "Failed read reg (%08x)...\n",
1010 WILC_PIN_MUX_0);
1011 return ret;
1013 reg |= BIT(8);
1014 ret = wilc_sdio_write_reg(wilc, WILC_PIN_MUX_0, reg);
1015 if (ret) {
1016 dev_err(&func->dev, "Failed write reg (%08x)...\n",
1017 WILC_PIN_MUX_0);
1018 return ret;
1022 * interrupt enable
1024 ret = wilc_sdio_read_reg(wilc, WILC_INTR_ENABLE, &reg);
1025 if (ret) {
1026 dev_err(&func->dev, "Failed read reg (%08x)...\n",
1027 WILC_INTR_ENABLE);
1028 return ret;
1031 for (i = 0; (i < 5) && (nint > 0); i++, nint--)
1032 reg |= BIT((27 + i));
1033 ret = wilc_sdio_write_reg(wilc, WILC_INTR_ENABLE, reg);
1034 if (ret) {
1035 dev_err(&func->dev, "Failed write reg (%08x)...\n",
1036 WILC_INTR_ENABLE);
1037 return ret;
1039 if (nint) {
1040 ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, &reg);
1041 if (ret) {
1042 dev_err(&func->dev,
1043 "Failed read reg (%08x)...\n",
1044 WILC_INTR2_ENABLE);
1045 return ret;
1048 for (i = 0; (i < 3) && (nint > 0); i++, nint--)
1049 reg |= BIT(i);
1051 ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, &reg);
1052 if (ret) {
1053 dev_err(&func->dev,
1054 "Failed write reg (%08x)...\n",
1055 WILC_INTR2_ENABLE);
1056 return ret;
1060 return 0;
1063 /* Global sdio HIF function table */
1064 static const struct wilc_hif_func wilc_hif_sdio = {
1065 .hif_init = wilc_sdio_init,
1066 .hif_deinit = wilc_sdio_deinit,
1067 .hif_read_reg = wilc_sdio_read_reg,
1068 .hif_write_reg = wilc_sdio_write_reg,
1069 .hif_block_rx = wilc_sdio_read,
1070 .hif_block_tx = wilc_sdio_write,
1071 .hif_read_int = wilc_sdio_read_int,
1072 .hif_clear_int_ext = wilc_sdio_clear_int_ext,
1073 .hif_read_size = wilc_sdio_read_size,
1074 .hif_block_tx_ext = wilc_sdio_write,
1075 .hif_block_rx_ext = wilc_sdio_read,
1076 .hif_sync_ext = wilc_sdio_sync_ext,
1077 .enable_interrupt = wilc_sdio_enable_interrupt,
1078 .disable_interrupt = wilc_sdio_disable_interrupt,
1081 static int wilc_sdio_resume(struct device *dev)
1083 struct sdio_func *func = dev_to_sdio_func(dev);
1084 struct wilc *wilc = sdio_get_drvdata(func);
1086 dev_info(dev, "sdio resume\n");
1087 sdio_release_host(func);
1088 chip_wakeup(wilc);
1089 wilc_sdio_init(wilc, true);
1091 if (wilc->suspend_event)
1092 host_wakeup_notify(wilc);
1094 chip_allow_sleep(wilc);
1096 return 0;
1099 static const struct of_device_id wilc_of_match[] = {
1100 { .compatible = "microchip,wilc1000-sdio", },
1101 { /* sentinel */ }
1103 MODULE_DEVICE_TABLE(of, wilc_of_match);
1105 static const struct dev_pm_ops wilc_sdio_pm_ops = {
1106 .suspend = wilc_sdio_suspend,
1107 .resume = wilc_sdio_resume,
1110 static struct sdio_driver wilc_sdio_driver = {
1111 .name = SDIO_MODALIAS,
1112 .id_table = wilc_sdio_ids,
1113 .probe = wilc_sdio_probe,
1114 .remove = wilc_sdio_remove,
1115 .drv = {
1116 .pm = &wilc_sdio_pm_ops,
1117 .of_match_table = wilc_of_match,
1120 module_driver(wilc_sdio_driver,
1121 sdio_register_driver,
1122 sdio_unregister_driver);
1123 MODULE_LICENSE("GPL");