1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence USBSS DRD Driver - gadget side.
5 * Copyright (C) 2018-2019 Cadence Design Systems.
6 * Copyright (C) 2017-2018 NXP
8 * Authors: Pawel Jez <pjez@cadence.com>,
9 * Pawel Laszczak <pawell@cadence.com>
10 * Peter Chen <peter.chen@nxp.com>
15 * At some situations, the controller may get stale data address in TRB
17 * 1. Controller read TRB includes data address
18 * 2. Software updates TRBs includes data address and Cycle bit
19 * 3. Controller read TRB which includes Cycle bit
20 * 4. DMA run with stale data address
22 * To fix this problem, driver needs to make the first TRB in TD as invalid.
23 * After preparing all TRBs driver needs to check the position of DMA and
24 * if the DMA point to the first just added TRB and doorbell is 1,
25 * then driver must defer making this TRB as valid. This TRB will be make
26 * as valid during adding next TRB only if DMA is stopped or at TRBERR
29 * Issue has been fixed in DEV_VER_V3 version of controller.
32 * Controller for OUT endpoints has shared on-chip buffers for all incoming
33 * packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
34 * in correct order. If the first packet in the buffer will not be handled,
35 * then the following packets directed for other endpoints and functions
37 * Additionally the packets directed to one endpoint can block entire on-chip
38 * buffers. In this case transfer to other endpoints also will blocked.
40 * To resolve this issue after raising the descriptor missing interrupt
41 * driver prepares internal usb_request object and use it to arm DMA transfer.
43 * The problematic situation was observed in case when endpoint has been enabled
44 * but no usb_request were queued. Driver try detects such endpoints and will
45 * use this workaround only for these endpoint.
47 * Driver use limited number of buffer. This number can be set by macro
48 * CDNS3_WA2_NUM_BUFFERS.
50 * Such blocking situation was observed on ACM gadget. For this function
51 * host send OUT data packet but ACM function is not prepared for this packet.
52 * It's cause that buffer placed in on chip memory block transfer to other
55 * Issue has been fixed in DEV_VER_V2 version of controller.
59 #include <linux/dma-mapping.h>
60 #include <linux/usb/gadget.h>
61 #include <linux/module.h>
62 #include <linux/iopoll.h>
65 #include "gadget-export.h"
70 static int __cdns3_gadget_ep_queue(struct usb_ep
*ep
,
71 struct usb_request
*request
,
74 static int cdns3_ep_run_transfer(struct cdns3_endpoint
*priv_ep
,
75 struct usb_request
*request
);
77 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint
*priv_ep
,
78 struct usb_request
*request
);
81 * cdns3_clear_register_bit - clear bit in given register.
82 * @ptr: address of device controller register to be read and changed
83 * @mask: bits requested to clar
85 void cdns3_clear_register_bit(void __iomem
*ptr
, u32 mask
)
87 mask
= readl(ptr
) & ~mask
;
92 * cdns3_set_register_bit - set bit in given register.
93 * @ptr: address of device controller register to be read and changed
94 * @mask: bits requested to set
96 void cdns3_set_register_bit(void __iomem
*ptr
, u32 mask
)
98 mask
= readl(ptr
) | mask
;
103 * cdns3_ep_addr_to_index - Macro converts endpoint address to
104 * index of endpoint object in cdns3_device.eps[] container
105 * @ep_addr: endpoint address for which endpoint object is required
108 u8
cdns3_ep_addr_to_index(u8 ep_addr
)
110 return (((ep_addr
& 0x7F)) + ((ep_addr
& USB_DIR_IN
) ? 16 : 0));
113 static int cdns3_get_dma_pos(struct cdns3_device
*priv_dev
,
114 struct cdns3_endpoint
*priv_ep
)
118 dma_index
= readl(&priv_dev
->regs
->ep_traddr
) - priv_ep
->trb_pool_dma
;
120 return dma_index
/ TRB_SIZE
;
124 * cdns3_next_request - returns next request from list
125 * @list: list containing requests
127 * Returns request or NULL if no requests in list
129 struct usb_request
*cdns3_next_request(struct list_head
*list
)
131 return list_first_entry_or_null(list
, struct usb_request
, list
);
135 * cdns3_next_align_buf - returns next buffer from list
136 * @list: list containing buffers
138 * Returns buffer or NULL if no buffers in list
140 struct cdns3_aligned_buf
*cdns3_next_align_buf(struct list_head
*list
)
142 return list_first_entry_or_null(list
, struct cdns3_aligned_buf
, list
);
146 * cdns3_next_priv_request - returns next request from list
147 * @list: list containing requests
149 * Returns request or NULL if no requests in list
151 struct cdns3_request
*cdns3_next_priv_request(struct list_head
*list
)
153 return list_first_entry_or_null(list
, struct cdns3_request
, list
);
157 * select_ep - selects endpoint
158 * @priv_dev: extended gadget object
159 * @ep: endpoint address
161 void cdns3_select_ep(struct cdns3_device
*priv_dev
, u32 ep
)
163 if (priv_dev
->selected_ep
== ep
)
166 priv_dev
->selected_ep
= ep
;
167 writel(ep
, &priv_dev
->regs
->ep_sel
);
171 * cdns3_get_tdl - gets current tdl for selected endpoint.
172 * @priv_dev: extended gadget object
174 * Before calling this function the appropriate endpoint must
175 * be selected by means of cdns3_select_ep function.
177 static int cdns3_get_tdl(struct cdns3_device
*priv_dev
)
179 if (priv_dev
->dev_ver
< DEV_VER_V3
)
180 return EP_CMD_TDL_GET(readl(&priv_dev
->regs
->ep_cmd
));
182 return readl(&priv_dev
->regs
->ep_tdl
);
185 dma_addr_t
cdns3_trb_virt_to_dma(struct cdns3_endpoint
*priv_ep
,
186 struct cdns3_trb
*trb
)
188 u32 offset
= (char *)trb
- (char *)priv_ep
->trb_pool
;
190 return priv_ep
->trb_pool_dma
+ offset
;
193 int cdns3_ring_size(struct cdns3_endpoint
*priv_ep
)
195 switch (priv_ep
->type
) {
196 case USB_ENDPOINT_XFER_ISOC
:
197 return TRB_ISO_RING_SIZE
;
198 case USB_ENDPOINT_XFER_CONTROL
:
199 return TRB_CTRL_RING_SIZE
;
201 if (priv_ep
->use_streams
)
202 return TRB_STREAM_RING_SIZE
;
204 return TRB_RING_SIZE
;
208 static void cdns3_free_trb_pool(struct cdns3_endpoint
*priv_ep
)
210 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
212 if (priv_ep
->trb_pool
) {
213 dma_free_coherent(priv_dev
->sysdev
,
214 cdns3_ring_size(priv_ep
),
215 priv_ep
->trb_pool
, priv_ep
->trb_pool_dma
);
216 priv_ep
->trb_pool
= NULL
;
221 * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
222 * @priv_ep: endpoint object
224 * Function will return 0 on success or -ENOMEM on allocation error
226 int cdns3_allocate_trb_pool(struct cdns3_endpoint
*priv_ep
)
228 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
229 int ring_size
= cdns3_ring_size(priv_ep
);
230 int num_trbs
= ring_size
/ TRB_SIZE
;
231 struct cdns3_trb
*link_trb
;
233 if (priv_ep
->trb_pool
&& priv_ep
->alloc_ring_size
< ring_size
)
234 cdns3_free_trb_pool(priv_ep
);
236 if (!priv_ep
->trb_pool
) {
237 priv_ep
->trb_pool
= dma_alloc_coherent(priv_dev
->sysdev
,
239 &priv_ep
->trb_pool_dma
,
240 GFP_DMA32
| GFP_ATOMIC
);
241 if (!priv_ep
->trb_pool
)
244 priv_ep
->alloc_ring_size
= ring_size
;
245 memset(priv_ep
->trb_pool
, 0, ring_size
);
248 priv_ep
->num_trbs
= num_trbs
;
253 /* Initialize the last TRB as Link TRB */
254 link_trb
= (priv_ep
->trb_pool
+ (priv_ep
->num_trbs
- 1));
256 if (priv_ep
->use_streams
) {
258 * For stream capable endpoints driver use single correct TRB.
259 * The last trb has zeroed cycle bit
261 link_trb
->control
= 0;
263 link_trb
->buffer
= TRB_BUFFER(priv_ep
->trb_pool_dma
);
264 link_trb
->control
= TRB_CYCLE
| TRB_TYPE(TRB_LINK
) | TRB_TOGGLE
;
270 * cdns3_ep_stall_flush - Stalls and flushes selected endpoint
271 * @priv_ep: endpoint object
273 * Endpoint must be selected before call to this function
275 static void cdns3_ep_stall_flush(struct cdns3_endpoint
*priv_ep
)
277 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
280 trace_cdns3_halt(priv_ep
, 1, 1);
282 writel(EP_CMD_DFLUSH
| EP_CMD_ERDY
| EP_CMD_SSTALL
,
283 &priv_dev
->regs
->ep_cmd
);
285 /* wait for DFLUSH cleared */
286 readl_poll_timeout_atomic(&priv_dev
->regs
->ep_cmd
, val
,
287 !(val
& EP_CMD_DFLUSH
), 1, 1000);
288 priv_ep
->flags
|= EP_STALLED
;
289 priv_ep
->flags
&= ~EP_STALL_PENDING
;
293 * cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
294 * @priv_dev: extended gadget object
296 void cdns3_hw_reset_eps_config(struct cdns3_device
*priv_dev
)
298 writel(USB_CONF_CFGRST
, &priv_dev
->regs
->usb_conf
);
300 cdns3_allow_enable_l1(priv_dev
, 0);
301 priv_dev
->hw_configured_flag
= 0;
302 priv_dev
->onchip_used_size
= 0;
303 priv_dev
->out_mem_is_allocated
= 0;
304 priv_dev
->wait_for_setup
= 0;
305 priv_dev
->using_streams
= 0;
309 * cdns3_ep_inc_trb - increment a trb index.
310 * @index: Pointer to the TRB index to increment.
312 * @trb_in_seg: number of TRBs in segment
314 * The index should never point to the link TRB. After incrementing,
315 * if it is point to the link TRB, wrap around to the beginning and revert
316 * cycle state bit The
317 * link TRB is always at the last TRB entry.
319 static void cdns3_ep_inc_trb(int *index
, u8
*cs
, int trb_in_seg
)
322 if (*index
== (trb_in_seg
- 1)) {
329 * cdns3_ep_inc_enq - increment endpoint's enqueue pointer
330 * @priv_ep: The endpoint whose enqueue pointer we're incrementing
332 static void cdns3_ep_inc_enq(struct cdns3_endpoint
*priv_ep
)
334 priv_ep
->free_trbs
--;
335 cdns3_ep_inc_trb(&priv_ep
->enqueue
, &priv_ep
->pcs
, priv_ep
->num_trbs
);
339 * cdns3_ep_inc_deq - increment endpoint's dequeue pointer
340 * @priv_ep: The endpoint whose dequeue pointer we're incrementing
342 static void cdns3_ep_inc_deq(struct cdns3_endpoint
*priv_ep
)
344 priv_ep
->free_trbs
++;
345 cdns3_ep_inc_trb(&priv_ep
->dequeue
, &priv_ep
->ccs
, priv_ep
->num_trbs
);
348 void cdns3_move_deq_to_next_trb(struct cdns3_request
*priv_req
)
350 struct cdns3_endpoint
*priv_ep
= priv_req
->priv_ep
;
351 int current_trb
= priv_req
->start_trb
;
353 while (current_trb
!= priv_req
->end_trb
) {
354 cdns3_ep_inc_deq(priv_ep
);
355 current_trb
= priv_ep
->dequeue
;
358 cdns3_ep_inc_deq(priv_ep
);
362 * cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
363 * @priv_dev: Extended gadget object
364 * @enable: Enable/disable permit to transition to L1.
366 * If bit USB_CONF_L1EN is set and device receive Extended Token packet,
367 * then controller answer with ACK handshake.
368 * If bit USB_CONF_L1DS is set and device receive Extended Token packet,
369 * then controller answer with NYET handshake.
371 void cdns3_allow_enable_l1(struct cdns3_device
*priv_dev
, int enable
)
374 writel(USB_CONF_L1EN
, &priv_dev
->regs
->usb_conf
);
376 writel(USB_CONF_L1DS
, &priv_dev
->regs
->usb_conf
);
379 enum usb_device_speed
cdns3_get_speed(struct cdns3_device
*priv_dev
)
383 reg
= readl(&priv_dev
->regs
->usb_sts
);
385 if (DEV_SUPERSPEED(reg
))
386 return USB_SPEED_SUPER
;
387 else if (DEV_HIGHSPEED(reg
))
388 return USB_SPEED_HIGH
;
389 else if (DEV_FULLSPEED(reg
))
390 return USB_SPEED_FULL
;
391 else if (DEV_LOWSPEED(reg
))
392 return USB_SPEED_LOW
;
393 return USB_SPEED_UNKNOWN
;
397 * cdns3_start_all_request - add to ring all request not started
398 * @priv_dev: Extended gadget object
399 * @priv_ep: The endpoint for whom request will be started.
401 * Returns return ENOMEM if transfer ring i not enough TRBs to start
404 static int cdns3_start_all_request(struct cdns3_device
*priv_dev
,
405 struct cdns3_endpoint
*priv_ep
)
407 struct usb_request
*request
;
409 u8 pending_empty
= list_empty(&priv_ep
->pending_req_list
);
412 * If the last pending transfer is INTERNAL
413 * OR streams are enabled for this endpoint
414 * do NOT start new transfer till the last one is pending
416 if (!pending_empty
) {
417 struct cdns3_request
*priv_req
;
419 request
= cdns3_next_request(&priv_ep
->pending_req_list
);
420 priv_req
= to_cdns3_request(request
);
421 if ((priv_req
->flags
& REQUEST_INTERNAL
) ||
422 (priv_ep
->flags
& EP_TDLCHK_EN
) ||
423 priv_ep
->use_streams
) {
424 trace_printk("Blocking external request\n");
429 while (!list_empty(&priv_ep
->deferred_req_list
)) {
430 request
= cdns3_next_request(&priv_ep
->deferred_req_list
);
432 if (!priv_ep
->use_streams
) {
433 ret
= cdns3_ep_run_transfer(priv_ep
, request
);
435 priv_ep
->stream_sg_idx
= 0;
436 ret
= cdns3_ep_run_stream_transfer(priv_ep
, request
);
441 list_del(&request
->list
);
442 list_add_tail(&request
->list
,
443 &priv_ep
->pending_req_list
);
444 if (request
->stream_id
!= 0 || (priv_ep
->flags
& EP_TDLCHK_EN
))
448 priv_ep
->flags
&= ~EP_RING_FULL
;
453 * WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
454 * driver try to detect whether endpoint need additional internal
455 * buffer for unblocking on-chip FIFO buffer. This flag will be cleared
456 * if before first DESCMISS interrupt the DMA will be armed.
458 #define cdns3_wa2_enable_detection(priv_dev, priv_ep, reg) do { \
459 if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
460 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
461 (reg) |= EP_STS_EN_DESCMISEN; \
465 * cdns3_wa2_descmiss_copy_data copy data from internal requests to
466 * request queued by class driver.
467 * @priv_ep: extended endpoint object
468 * @request: request object
470 static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint
*priv_ep
,
471 struct usb_request
*request
)
473 struct usb_request
*descmiss_req
;
474 struct cdns3_request
*descmiss_priv_req
;
476 while (!list_empty(&priv_ep
->wa2_descmiss_req_list
)) {
481 cdns3_next_priv_request(&priv_ep
->wa2_descmiss_req_list
);
482 descmiss_req
= &descmiss_priv_req
->request
;
484 /* driver can't touch pending request */
485 if (descmiss_priv_req
->flags
& REQUEST_PENDING
)
488 chunk_end
= descmiss_priv_req
->flags
& REQUEST_INTERNAL_CH
;
489 length
= request
->actual
+ descmiss_req
->actual
;
491 request
->status
= descmiss_req
->status
;
493 if (length
<= request
->length
) {
494 memcpy(&((u8
*)request
->buf
)[request
->actual
],
496 descmiss_req
->actual
);
497 request
->actual
= length
;
499 /* It should never occures */
500 request
->status
= -ENOMEM
;
503 list_del_init(&descmiss_priv_req
->list
);
505 kfree(descmiss_req
->buf
);
506 cdns3_gadget_ep_free_request(&priv_ep
->endpoint
, descmiss_req
);
507 --priv_ep
->wa2_counter
;
514 struct usb_request
*cdns3_wa2_gadget_giveback(struct cdns3_device
*priv_dev
,
515 struct cdns3_endpoint
*priv_ep
,
516 struct cdns3_request
*priv_req
)
518 if (priv_ep
->flags
& EP_QUIRK_EXTRA_BUF_EN
&&
519 priv_req
->flags
& REQUEST_INTERNAL
) {
520 struct usb_request
*req
;
522 req
= cdns3_next_request(&priv_ep
->deferred_req_list
);
524 priv_ep
->descmis_req
= NULL
;
529 /* unmap the gadget request before copying data */
530 usb_gadget_unmap_request_by_dev(priv_dev
->sysdev
, req
,
533 cdns3_wa2_descmiss_copy_data(priv_ep
, req
);
534 if (!(priv_ep
->flags
& EP_QUIRK_END_TRANSFER
) &&
535 req
->length
!= req
->actual
) {
536 /* wait for next part of transfer */
537 /* re-map the gadget request buffer*/
538 usb_gadget_map_request_by_dev(priv_dev
->sysdev
, req
,
539 usb_endpoint_dir_in(priv_ep
->endpoint
.desc
));
543 if (req
->status
== -EINPROGRESS
)
546 list_del_init(&req
->list
);
547 cdns3_start_all_request(priv_dev
, priv_ep
);
551 return &priv_req
->request
;
554 int cdns3_wa2_gadget_ep_queue(struct cdns3_device
*priv_dev
,
555 struct cdns3_endpoint
*priv_ep
,
556 struct cdns3_request
*priv_req
)
561 * If transfer was queued before DESCMISS appear than we
562 * can disable handling of DESCMISS interrupt. Driver assumes that it
563 * can disable special treatment for this endpoint.
565 if (priv_ep
->flags
& EP_QUIRK_EXTRA_BUF_DET
) {
568 cdns3_select_ep(priv_dev
, priv_ep
->num
| priv_ep
->dir
);
569 priv_ep
->flags
&= ~EP_QUIRK_EXTRA_BUF_DET
;
570 reg
= readl(&priv_dev
->regs
->ep_sts_en
);
571 reg
&= ~EP_STS_EN_DESCMISEN
;
572 trace_cdns3_wa2(priv_ep
, "workaround disabled\n");
573 writel(reg
, &priv_dev
->regs
->ep_sts_en
);
576 if (priv_ep
->flags
& EP_QUIRK_EXTRA_BUF_EN
) {
577 u8 pending_empty
= list_empty(&priv_ep
->pending_req_list
);
578 u8 descmiss_empty
= list_empty(&priv_ep
->wa2_descmiss_req_list
);
581 * DESCMISS transfer has been finished, so data will be
582 * directly copied from internal allocated usb_request
585 if (pending_empty
&& !descmiss_empty
&&
586 !(priv_req
->flags
& REQUEST_INTERNAL
)) {
587 cdns3_wa2_descmiss_copy_data(priv_ep
,
590 trace_cdns3_wa2(priv_ep
, "get internal stored data");
592 list_add_tail(&priv_req
->request
.list
,
593 &priv_ep
->pending_req_list
);
594 cdns3_gadget_giveback(priv_ep
, priv_req
,
595 priv_req
->request
.status
);
598 * Intentionally driver returns positive value as
599 * correct value. It informs that transfer has
606 * Driver will wait for completion DESCMISS transfer,
607 * before starts new, not DESCMISS transfer.
609 if (!pending_empty
&& !descmiss_empty
) {
610 trace_cdns3_wa2(priv_ep
, "wait for pending transfer\n");
614 if (priv_req
->flags
& REQUEST_INTERNAL
)
615 list_add_tail(&priv_req
->list
,
616 &priv_ep
->wa2_descmiss_req_list
);
622 static void cdns3_wa2_remove_old_request(struct cdns3_endpoint
*priv_ep
)
624 struct cdns3_request
*priv_req
;
626 while (!list_empty(&priv_ep
->wa2_descmiss_req_list
)) {
629 priv_req
= cdns3_next_priv_request(&priv_ep
->wa2_descmiss_req_list
);
630 chain
= !!(priv_req
->flags
& REQUEST_INTERNAL_CH
);
632 trace_cdns3_wa2(priv_ep
, "removes eldest request");
634 kfree(priv_req
->request
.buf
);
635 cdns3_gadget_ep_free_request(&priv_ep
->endpoint
,
637 list_del_init(&priv_req
->list
);
638 --priv_ep
->wa2_counter
;
646 * cdns3_wa2_descmissing_packet - handles descriptor missing event.
647 * @priv_dev: extended gadget object
649 * This function is used only for WA2. For more information see Work around 2
652 static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint
*priv_ep
)
654 struct cdns3_request
*priv_req
;
655 struct usb_request
*request
;
656 u8 pending_empty
= list_empty(&priv_ep
->pending_req_list
);
658 /* check for pending transfer */
659 if (!pending_empty
) {
660 trace_cdns3_wa2(priv_ep
, "Ignoring Descriptor missing IRQ\n");
664 if (priv_ep
->flags
& EP_QUIRK_EXTRA_BUF_DET
) {
665 priv_ep
->flags
&= ~EP_QUIRK_EXTRA_BUF_DET
;
666 priv_ep
->flags
|= EP_QUIRK_EXTRA_BUF_EN
;
669 trace_cdns3_wa2(priv_ep
, "Description Missing detected\n");
671 if (priv_ep
->wa2_counter
>= CDNS3_WA2_NUM_BUFFERS
) {
672 trace_cdns3_wa2(priv_ep
, "WA2 overflow\n");
673 cdns3_wa2_remove_old_request(priv_ep
);
676 request
= cdns3_gadget_ep_alloc_request(&priv_ep
->endpoint
,
681 priv_req
= to_cdns3_request(request
);
682 priv_req
->flags
|= REQUEST_INTERNAL
;
684 /* if this field is still assigned it indicate that transfer related
685 * with this request has not been finished yet. Driver in this
686 * case simply allocate next request and assign flag REQUEST_INTERNAL_CH
687 * flag to previous one. It will indicate that current request is
688 * part of the previous one.
690 if (priv_ep
->descmis_req
)
691 priv_ep
->descmis_req
->flags
|= REQUEST_INTERNAL_CH
;
693 priv_req
->request
.buf
= kzalloc(CDNS3_DESCMIS_BUF_SIZE
,
695 priv_ep
->wa2_counter
++;
697 if (!priv_req
->request
.buf
) {
698 cdns3_gadget_ep_free_request(&priv_ep
->endpoint
, request
);
702 priv_req
->request
.length
= CDNS3_DESCMIS_BUF_SIZE
;
703 priv_ep
->descmis_req
= priv_req
;
705 __cdns3_gadget_ep_queue(&priv_ep
->endpoint
,
706 &priv_ep
->descmis_req
->request
,
712 dev_err(priv_ep
->cdns3_dev
->dev
,
713 "Failed: No sufficient memory for DESCMIS\n");
716 static void cdns3_wa2_reset_tdl(struct cdns3_device
*priv_dev
)
718 u16 tdl
= EP_CMD_TDL_GET(readl(&priv_dev
->regs
->ep_cmd
));
721 u16 reset_val
= EP_CMD_TDL_MAX
+ 1 - tdl
;
723 writel(EP_CMD_TDL_SET(reset_val
) | EP_CMD_STDL
,
724 &priv_dev
->regs
->ep_cmd
);
728 static void cdns3_wa2_check_outq_status(struct cdns3_device
*priv_dev
)
733 cdns3_select_ep(priv_dev
, 0);
735 ep_sts_reg
= readl(&priv_dev
->regs
->ep_sts
);
737 if (EP_STS_OUTQ_VAL(ep_sts_reg
)) {
738 u32 outq_ep_num
= EP_STS_OUTQ_NO(ep_sts_reg
);
739 struct cdns3_endpoint
*outq_ep
= priv_dev
->eps
[outq_ep_num
];
741 if ((outq_ep
->flags
& EP_ENABLED
) && !(outq_ep
->use_streams
) &&
742 outq_ep
->type
!= USB_ENDPOINT_XFER_ISOC
&& outq_ep_num
) {
743 u8 pending_empty
= list_empty(&outq_ep
->pending_req_list
);
745 if ((outq_ep
->flags
& EP_QUIRK_EXTRA_BUF_DET
) ||
746 (outq_ep
->flags
& EP_QUIRK_EXTRA_BUF_EN
) ||
752 cdns3_select_ep(priv_dev
, outq_ep
->num
|
754 ep_sts_en_reg
= readl(&priv_dev
->regs
->ep_sts_en
);
755 ep_cmd_reg
= readl(&priv_dev
->regs
->ep_cmd
);
757 outq_ep
->flags
|= EP_TDLCHK_EN
;
758 cdns3_set_register_bit(&priv_dev
->regs
->ep_cfg
,
761 cdns3_wa2_enable_detection(priv_dev
, outq_ep
,
763 writel(ep_sts_en_reg
,
764 &priv_dev
->regs
->ep_sts_en
);
765 /* reset tdl value to zero */
766 cdns3_wa2_reset_tdl(priv_dev
);
768 * Memory barrier - Reset tdl before ringing the
772 if (EP_CMD_DRDY
& ep_cmd_reg
) {
773 trace_cdns3_wa2(outq_ep
, "Enabling WA2 skipping doorbell\n");
776 trace_cdns3_wa2(outq_ep
, "Enabling WA2 ringing doorbell\n");
778 * ring doorbell to generate DESCMIS irq
781 &priv_dev
->regs
->ep_cmd
);
789 * cdns3_gadget_giveback - call struct usb_request's ->complete callback
790 * @priv_ep: The endpoint to whom the request belongs to
791 * @priv_req: The request we're giving back
792 * @status: completion code for the request
794 * Must be called with controller's lock held and interrupts disabled. This
795 * function will unmap @req and call its ->complete() callback to notify upper
796 * layers that it has completed.
798 void cdns3_gadget_giveback(struct cdns3_endpoint
*priv_ep
,
799 struct cdns3_request
*priv_req
,
802 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
803 struct usb_request
*request
= &priv_req
->request
;
805 list_del_init(&request
->list
);
807 if (request
->status
== -EINPROGRESS
)
808 request
->status
= status
;
810 usb_gadget_unmap_request_by_dev(priv_dev
->sysdev
, request
,
813 if ((priv_req
->flags
& REQUEST_UNALIGNED
) &&
814 priv_ep
->dir
== USB_DIR_OUT
&& !request
->status
)
815 memcpy(request
->buf
, priv_req
->aligned_buf
->buf
,
818 priv_req
->flags
&= ~(REQUEST_PENDING
| REQUEST_UNALIGNED
);
819 trace_cdns3_gadget_giveback(priv_req
);
821 if (priv_dev
->dev_ver
< DEV_VER_V2
) {
822 request
= cdns3_wa2_gadget_giveback(priv_dev
, priv_ep
,
828 if (request
->complete
) {
829 spin_unlock(&priv_dev
->lock
);
830 usb_gadget_giveback_request(&priv_ep
->endpoint
,
832 spin_lock(&priv_dev
->lock
);
835 if (request
->buf
== priv_dev
->zlp_buf
)
836 cdns3_gadget_ep_free_request(&priv_ep
->endpoint
, request
);
839 void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint
*priv_ep
)
841 /* Work around for stale data address in TRB*/
842 if (priv_ep
->wa1_set
) {
843 trace_cdns3_wa1(priv_ep
, "restore cycle bit");
845 priv_ep
->wa1_set
= 0;
846 priv_ep
->wa1_trb_index
= 0xFFFF;
847 if (priv_ep
->wa1_cycle_bit
) {
848 priv_ep
->wa1_trb
->control
=
849 priv_ep
->wa1_trb
->control
| 0x1;
851 priv_ep
->wa1_trb
->control
=
852 priv_ep
->wa1_trb
->control
& ~0x1;
857 static void cdns3_free_aligned_request_buf(struct work_struct
*work
)
859 struct cdns3_device
*priv_dev
= container_of(work
, struct cdns3_device
,
861 struct cdns3_aligned_buf
*buf
, *tmp
;
864 spin_lock_irqsave(&priv_dev
->lock
, flags
);
866 list_for_each_entry_safe(buf
, tmp
, &priv_dev
->aligned_buf_list
, list
) {
868 list_del(&buf
->list
);
871 * Re-enable interrupts to free DMA capable memory.
872 * Driver can't free this memory with disabled
875 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
876 dma_free_coherent(priv_dev
->sysdev
, buf
->size
,
879 spin_lock_irqsave(&priv_dev
->lock
, flags
);
883 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
886 static int cdns3_prepare_aligned_request_buf(struct cdns3_request
*priv_req
)
888 struct cdns3_endpoint
*priv_ep
= priv_req
->priv_ep
;
889 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
890 struct cdns3_aligned_buf
*buf
;
892 /* check if buffer is aligned to 8. */
893 if (!((uintptr_t)priv_req
->request
.buf
& 0x7))
896 buf
= priv_req
->aligned_buf
;
898 if (!buf
|| priv_req
->request
.length
> buf
->size
) {
899 buf
= kzalloc(sizeof(*buf
), GFP_ATOMIC
);
903 buf
->size
= priv_req
->request
.length
;
905 buf
->buf
= dma_alloc_coherent(priv_dev
->sysdev
,
914 if (priv_req
->aligned_buf
) {
915 trace_cdns3_free_aligned_request(priv_req
);
916 priv_req
->aligned_buf
->in_use
= 0;
917 queue_work(system_freezable_wq
,
918 &priv_dev
->aligned_buf_wq
);
922 priv_req
->aligned_buf
= buf
;
924 list_add_tail(&buf
->list
,
925 &priv_dev
->aligned_buf_list
);
928 if (priv_ep
->dir
== USB_DIR_IN
) {
929 memcpy(buf
->buf
, priv_req
->request
.buf
,
930 priv_req
->request
.length
);
933 priv_req
->flags
|= REQUEST_UNALIGNED
;
934 trace_cdns3_prepare_aligned_request(priv_req
);
939 static int cdns3_wa1_update_guard(struct cdns3_endpoint
*priv_ep
,
940 struct cdns3_trb
*trb
)
942 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
944 if (!priv_ep
->wa1_set
) {
947 doorbell
= !!(readl(&priv_dev
->regs
->ep_cmd
) & EP_CMD_DRDY
);
950 priv_ep
->wa1_cycle_bit
= priv_ep
->pcs
? TRB_CYCLE
: 0;
951 priv_ep
->wa1_set
= 1;
952 priv_ep
->wa1_trb
= trb
;
953 priv_ep
->wa1_trb_index
= priv_ep
->enqueue
;
954 trace_cdns3_wa1(priv_ep
, "set guard");
961 static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device
*priv_dev
,
962 struct cdns3_endpoint
*priv_ep
)
967 doorbell
= !!(readl(&priv_dev
->regs
->ep_cmd
) & EP_CMD_DRDY
);
968 dma_index
= cdns3_get_dma_pos(priv_dev
, priv_ep
);
970 if (!doorbell
|| dma_index
!= priv_ep
->wa1_trb_index
)
971 cdns3_wa1_restore_cycle_bit(priv_ep
);
974 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint
*priv_ep
,
975 struct usb_request
*request
)
977 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
978 struct cdns3_request
*priv_req
;
979 struct cdns3_trb
*trb
;
985 unsigned int sg_idx
= priv_ep
->stream_sg_idx
;
987 priv_req
= to_cdns3_request(request
);
988 address
= priv_ep
->endpoint
.desc
->bEndpointAddress
;
990 priv_ep
->flags
|= EP_PENDING_REQUEST
;
992 /* must allocate buffer aligned to 8 */
993 if (priv_req
->flags
& REQUEST_UNALIGNED
)
994 trb_dma
= priv_req
->aligned_buf
->dma
;
996 trb_dma
= request
->dma
;
998 /* For stream capable endpoints driver use only single TD. */
999 trb
= priv_ep
->trb_pool
+ priv_ep
->enqueue
;
1000 priv_req
->start_trb
= priv_ep
->enqueue
;
1001 priv_req
->end_trb
= priv_req
->start_trb
;
1002 priv_req
->trb
= trb
;
1004 cdns3_select_ep(priv_ep
->cdns3_dev
, address
);
1006 control
= TRB_TYPE(TRB_NORMAL
) | TRB_CYCLE
|
1007 TRB_STREAM_ID(priv_req
->request
.stream_id
) | TRB_ISP
;
1009 if (!request
->num_sgs
) {
1010 trb
->buffer
= TRB_BUFFER(trb_dma
);
1011 length
= request
->length
;
1013 trb
->buffer
= TRB_BUFFER(request
->sg
[sg_idx
].dma_address
);
1014 length
= request
->sg
[sg_idx
].length
;
1017 tdl
= DIV_ROUND_UP(length
, priv_ep
->endpoint
.maxpacket
);
1019 trb
->length
= TRB_BURST_LEN(16 /*priv_ep->trb_burst_size*/) |
1023 * For DEV_VER_V2 controller version we have enabled
1024 * USB_CONF2_EN_TDL_TRB in DMULT configuration.
1025 * This enables TDL calculation based on TRB, hence setting TDL in TRB.
1027 if (priv_dev
->dev_ver
>= DEV_VER_V2
) {
1028 if (priv_dev
->gadget
.speed
== USB_SPEED_SUPER
)
1029 trb
->length
|= TRB_TDL_SS_SIZE(tdl
);
1031 priv_req
->flags
|= REQUEST_PENDING
;
1033 trb
->control
= control
;
1035 trace_cdns3_prepare_trb(priv_ep
, priv_req
->trb
);
1038 * Memory barrier - Cycle Bit must be set before trb->length and
1039 * trb->buffer fields.
1043 /* always first element */
1044 writel(EP_TRADDR_TRADDR(priv_ep
->trb_pool_dma
),
1045 &priv_dev
->regs
->ep_traddr
);
1047 if (!(priv_ep
->flags
& EP_STALLED
)) {
1048 trace_cdns3_ring(priv_ep
);
1049 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1050 writel(EP_STS_TRBERR
| EP_STS_DESCMIS
, &priv_dev
->regs
->ep_sts
);
1052 priv_ep
->prime_flag
= false;
1055 * Controller version DEV_VER_V2 tdl calculation
1059 if (priv_dev
->dev_ver
< DEV_VER_V2
)
1060 writel(EP_CMD_TDL_SET(tdl
) | EP_CMD_STDL
,
1061 &priv_dev
->regs
->ep_cmd
);
1062 else if (priv_dev
->dev_ver
> DEV_VER_V2
)
1063 writel(tdl
, &priv_dev
->regs
->ep_tdl
);
1065 priv_ep
->last_stream_id
= priv_req
->request
.stream_id
;
1066 writel(EP_CMD_DRDY
, &priv_dev
->regs
->ep_cmd
);
1067 writel(EP_CMD_ERDY_SID(priv_req
->request
.stream_id
) |
1068 EP_CMD_ERDY
, &priv_dev
->regs
->ep_cmd
);
1070 trace_cdns3_doorbell_epx(priv_ep
->name
,
1071 readl(&priv_dev
->regs
->ep_traddr
));
1074 /* WORKAROUND for transition to L0 */
1075 __cdns3_gadget_wakeup(priv_dev
);
1081 * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware
1082 * @priv_ep: endpoint object
1084 * Returns zero on success or negative value on failure
1086 static int cdns3_ep_run_transfer(struct cdns3_endpoint
*priv_ep
,
1087 struct usb_request
*request
)
1089 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
1090 struct cdns3_request
*priv_req
;
1091 struct cdns3_trb
*trb
;
1101 if (priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
)
1102 num_trb
= priv_ep
->interval
;
1104 num_trb
= request
->num_sgs
? request
->num_sgs
: 1;
1106 if (num_trb
> priv_ep
->free_trbs
) {
1107 priv_ep
->flags
|= EP_RING_FULL
;
1111 priv_req
= to_cdns3_request(request
);
1112 address
= priv_ep
->endpoint
.desc
->bEndpointAddress
;
1114 priv_ep
->flags
|= EP_PENDING_REQUEST
;
1116 /* must allocate buffer aligned to 8 */
1117 if (priv_req
->flags
& REQUEST_UNALIGNED
)
1118 trb_dma
= priv_req
->aligned_buf
->dma
;
1120 trb_dma
= request
->dma
;
1122 trb
= priv_ep
->trb_pool
+ priv_ep
->enqueue
;
1123 priv_req
->start_trb
= priv_ep
->enqueue
;
1124 priv_req
->trb
= trb
;
1126 cdns3_select_ep(priv_ep
->cdns3_dev
, address
);
1129 if ((priv_ep
->enqueue
+ num_trb
) >= (priv_ep
->num_trbs
- 1)) {
1130 struct cdns3_trb
*link_trb
;
1131 int doorbell
, dma_index
;
1134 doorbell
= !!(readl(&priv_dev
->regs
->ep_cmd
) & EP_CMD_DRDY
);
1135 dma_index
= cdns3_get_dma_pos(priv_dev
, priv_ep
);
1137 /* Driver can't update LINK TRB if it is current processed. */
1138 if (doorbell
&& dma_index
== priv_ep
->num_trbs
- 1) {
1139 priv_ep
->flags
|= EP_DEFERRED_DRDY
;
1143 /*updating C bt in Link TRB before starting DMA*/
1144 link_trb
= priv_ep
->trb_pool
+ (priv_ep
->num_trbs
- 1);
1146 * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
1147 * that DMA stuck at the LINK TRB.
1148 * On the other hand, removing TRB_CHAIN for longer TRs for
1149 * epXout cause that DMA stuck after handling LINK TRB.
1150 * To eliminate this strange behavioral driver set TRB_CHAIN
1151 * bit only for TR size > 2.
1153 if (priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
||
1154 TRBS_PER_SEGMENT
> 2)
1157 link_trb
->control
= ((priv_ep
->pcs
) ? TRB_CYCLE
: 0) |
1158 TRB_TYPE(TRB_LINK
) | TRB_TOGGLE
| ch_bit
;
1161 if (priv_dev
->dev_ver
<= DEV_VER_V2
)
1162 togle_pcs
= cdns3_wa1_update_guard(priv_ep
, trb
);
1164 /* set incorrect Cycle Bit for first trb*/
1165 control
= priv_ep
->pcs
? 0 : TRB_CYCLE
;
1172 control
|= TRB_TYPE(TRB_NORMAL
);
1173 trb
->buffer
= TRB_BUFFER(request
->num_sgs
== 0
1174 ? trb_dma
: request
->sg
[sg_iter
].dma_address
);
1176 if (likely(!request
->num_sgs
))
1177 length
= request
->length
;
1179 length
= request
->sg
[sg_iter
].length
;
1181 if (likely(priv_dev
->dev_ver
>= DEV_VER_V2
))
1182 td_size
= DIV_ROUND_UP(length
,
1183 priv_ep
->endpoint
.maxpacket
);
1184 else if (priv_ep
->flags
& EP_TDLCHK_EN
)
1185 total_tdl
+= DIV_ROUND_UP(length
,
1186 priv_ep
->endpoint
.maxpacket
);
1188 trb
->length
= TRB_BURST_LEN(priv_ep
->trb_burst_size
) |
1190 if (priv_dev
->gadget
.speed
== USB_SPEED_SUPER
)
1191 trb
->length
|= TRB_TDL_SS_SIZE(td_size
);
1193 control
|= TRB_TDL_HS_SIZE(td_size
);
1195 pcs
= priv_ep
->pcs
? TRB_CYCLE
: 0;
1198 * first trb should be prepared as last to avoid processing
1204 if (priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
&& !priv_ep
->dir
) {
1205 control
|= TRB_IOC
| TRB_ISP
;
1207 /* for last element in TD or in SG list */
1208 if (sg_iter
== (num_trb
- 1) && sg_iter
!= 0)
1209 control
|= pcs
| TRB_IOC
| TRB_ISP
;
1213 trb
->control
= control
;
1215 priv_req
->trb
->control
= control
;
1219 priv_req
->end_trb
= priv_ep
->enqueue
;
1220 cdns3_ep_inc_enq(priv_ep
);
1221 trb
= priv_ep
->trb_pool
+ priv_ep
->enqueue
;
1222 } while (sg_iter
< num_trb
);
1224 trb
= priv_req
->trb
;
1226 priv_req
->flags
|= REQUEST_PENDING
;
1229 trb
->control
|= TRB_IOC
| TRB_ISP
;
1231 if (priv_dev
->dev_ver
< DEV_VER_V2
&&
1232 (priv_ep
->flags
& EP_TDLCHK_EN
)) {
1233 u16 tdl
= total_tdl
;
1234 u16 old_tdl
= EP_CMD_TDL_GET(readl(&priv_dev
->regs
->ep_cmd
));
1236 if (tdl
> EP_CMD_TDL_MAX
) {
1237 tdl
= EP_CMD_TDL_MAX
;
1238 priv_ep
->pending_tdl
= total_tdl
- EP_CMD_TDL_MAX
;
1241 if (old_tdl
< tdl
) {
1243 writel(EP_CMD_TDL_SET(tdl
) | EP_CMD_STDL
,
1244 &priv_dev
->regs
->ep_cmd
);
1249 * Memory barrier - cycle bit must be set before other filds in trb.
1253 /* give the TD to the consumer*/
1255 trb
->control
= trb
->control
^ 1;
1257 if (priv_dev
->dev_ver
<= DEV_VER_V2
)
1258 cdns3_wa1_tray_restore_cycle_bit(priv_dev
, priv_ep
);
1260 trace_cdns3_prepare_trb(priv_ep
, priv_req
->trb
);
1263 * Memory barrier - Cycle Bit must be set before trb->length and
1264 * trb->buffer fields.
1269 * For DMULT mode we can set address to transfer ring only once after
1270 * enabling endpoint.
1272 if (priv_ep
->flags
& EP_UPDATE_EP_TRBADDR
) {
1274 * Until SW is not ready to handle the OUT transfer the ISO OUT
1275 * Endpoint should be disabled (EP_CFG.ENABLE = 0).
1276 * EP_CFG_ENABLE must be set before updating ep_traddr.
1278 if (priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
&& !priv_ep
->dir
&&
1279 !(priv_ep
->flags
& EP_QUIRK_ISO_OUT_EN
)) {
1280 priv_ep
->flags
|= EP_QUIRK_ISO_OUT_EN
;
1281 cdns3_set_register_bit(&priv_dev
->regs
->ep_cfg
,
1285 writel(EP_TRADDR_TRADDR(priv_ep
->trb_pool_dma
+
1286 priv_req
->start_trb
* TRB_SIZE
),
1287 &priv_dev
->regs
->ep_traddr
);
1289 priv_ep
->flags
&= ~EP_UPDATE_EP_TRBADDR
;
1292 if (!priv_ep
->wa1_set
&& !(priv_ep
->flags
& EP_STALLED
)) {
1293 trace_cdns3_ring(priv_ep
);
1294 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1295 writel(EP_STS_TRBERR
| EP_STS_DESCMIS
, &priv_dev
->regs
->ep_sts
);
1296 writel(EP_CMD_DRDY
, &priv_dev
->regs
->ep_cmd
);
1297 trace_cdns3_doorbell_epx(priv_ep
->name
,
1298 readl(&priv_dev
->regs
->ep_traddr
));
1301 /* WORKAROUND for transition to L0 */
1302 __cdns3_gadget_wakeup(priv_dev
);
1307 void cdns3_set_hw_configuration(struct cdns3_device
*priv_dev
)
1309 struct cdns3_endpoint
*priv_ep
;
1313 if (priv_dev
->hw_configured_flag
)
1316 writel(USB_CONF_CFGSET
, &priv_dev
->regs
->usb_conf
);
1317 writel(EP_CMD_ERDY
| EP_CMD_REQ_CMPL
, &priv_dev
->regs
->ep_cmd
);
1319 cdns3_set_register_bit(&priv_dev
->regs
->usb_conf
,
1320 USB_CONF_U1EN
| USB_CONF_U2EN
);
1322 /* wait until configuration set */
1323 readl_poll_timeout_atomic(&priv_dev
->regs
->usb_sts
, val
,
1324 val
& USB_STS_CFGSTS_MASK
, 1, 100);
1326 priv_dev
->hw_configured_flag
= 1;
1328 list_for_each_entry(ep
, &priv_dev
->gadget
.ep_list
, ep_list
) {
1330 priv_ep
= ep_to_cdns3_ep(ep
);
1331 cdns3_start_all_request(priv_dev
, priv_ep
);
1337 * cdns3_request_handled - check whether request has been handled by DMA
1339 * @priv_ep: extended endpoint object.
1340 * @priv_req: request object for checking
1342 * Endpoint must be selected before invoking this function.
1344 * Returns false if request has not been handled by DMA, else returns true.
1348 * DQ = priv_ep->dequeue - dequeue position
1349 * EQ = priv_ep->enqueue - enqueue position
1350 * ST = priv_req->start_trb - index of first TRB in transfer ring
1351 * ET = priv_req->end_trb - index of last TRB in transfer ring
1352 * CI = current_index - index of processed TRB by DMA.
1354 * As first step, function checks if cycle bit for priv_req->start_trb is
1358 * 1. priv_ep->dequeue never exceed current_index.
1359 * 2 priv_ep->enqueue never exceed priv_ep->dequeue
1360 * 3. exception: priv_ep->enqueue == priv_ep->dequeue
1361 * and priv_ep->free_trbs is zero.
1362 * This case indicate that TR is full.
1364 * Then We can split recognition into two parts:
1365 * Case 1 - priv_ep->dequeue < current_index
1366 * SR ... EQ ... DQ ... CI ... ER
1367 * SR ... DQ ... CI ... EQ ... ER
1369 * Request has been handled by DMA if ST and ET is between DQ and CI.
1371 * Case 2 - priv_ep->dequeue > current_index
1372 * This situation take place when CI go through the LINK TRB at the end of
1374 * SR ... CI ... EQ ... DQ ... ER
1376 * Request has been handled by DMA if ET is less then CI or
1377 * ET is greater or equal DQ.
1379 static bool cdns3_request_handled(struct cdns3_endpoint
*priv_ep
,
1380 struct cdns3_request
*priv_req
)
1382 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
1383 struct cdns3_trb
*trb
= priv_req
->trb
;
1384 int current_index
= 0;
1388 current_index
= cdns3_get_dma_pos(priv_dev
, priv_ep
);
1389 doorbell
= !!(readl(&priv_dev
->regs
->ep_cmd
) & EP_CMD_DRDY
);
1391 trb
= &priv_ep
->trb_pool
[priv_req
->start_trb
];
1393 if ((trb
->control
& TRB_CYCLE
) != priv_ep
->ccs
)
1396 if (doorbell
== 1 && current_index
== priv_ep
->dequeue
)
1399 /* The corner case for TRBS_PER_SEGMENT equal 2). */
1400 if (TRBS_PER_SEGMENT
== 2 && priv_ep
->type
!= USB_ENDPOINT_XFER_ISOC
) {
1405 if (priv_ep
->enqueue
== priv_ep
->dequeue
&&
1406 priv_ep
->free_trbs
== 0) {
1408 } else if (priv_ep
->dequeue
< current_index
) {
1409 if ((current_index
== (priv_ep
->num_trbs
- 1)) &&
1413 if (priv_req
->end_trb
>= priv_ep
->dequeue
&&
1414 priv_req
->end_trb
< current_index
)
1416 } else if (priv_ep
->dequeue
> current_index
) {
1417 if (priv_req
->end_trb
< current_index
||
1418 priv_req
->end_trb
>= priv_ep
->dequeue
)
1423 trace_cdns3_request_handled(priv_req
, current_index
, handled
);
1428 static void cdns3_transfer_completed(struct cdns3_device
*priv_dev
,
1429 struct cdns3_endpoint
*priv_ep
)
1431 struct cdns3_request
*priv_req
;
1432 struct usb_request
*request
;
1433 struct cdns3_trb
*trb
;
1435 while (!list_empty(&priv_ep
->pending_req_list
)) {
1436 request
= cdns3_next_request(&priv_ep
->pending_req_list
);
1437 priv_req
= to_cdns3_request(request
);
1439 trb
= priv_ep
->trb_pool
+ priv_ep
->dequeue
;
1441 /* Request was dequeued and TRB was changed to TRB_LINK. */
1442 if (TRB_FIELD_TO_TYPE(trb
->control
) == TRB_LINK
) {
1443 trace_cdns3_complete_trb(priv_ep
, trb
);
1444 cdns3_move_deq_to_next_trb(priv_req
);
1447 if (!request
->stream_id
) {
1448 /* Re-select endpoint. It could be changed by other CPU
1449 * during handling usb_gadget_giveback_request.
1451 cdns3_select_ep(priv_dev
, priv_ep
->endpoint
.address
);
1453 if (!cdns3_request_handled(priv_ep
, priv_req
))
1454 goto prepare_next_td
;
1456 trb
= priv_ep
->trb_pool
+ priv_ep
->dequeue
;
1457 trace_cdns3_complete_trb(priv_ep
, trb
);
1459 if (trb
!= priv_req
->trb
)
1460 dev_warn(priv_dev
->dev
,
1461 "request_trb=0x%p, queue_trb=0x%p\n",
1462 priv_req
->trb
, trb
);
1464 request
->actual
= TRB_LEN(le32_to_cpu(trb
->length
));
1465 cdns3_move_deq_to_next_trb(priv_req
);
1466 cdns3_gadget_giveback(priv_ep
, priv_req
, 0);
1468 if (priv_ep
->type
!= USB_ENDPOINT_XFER_ISOC
&&
1469 TRBS_PER_SEGMENT
== 2)
1472 /* Re-select endpoint. It could be changed by other CPU
1473 * during handling usb_gadget_giveback_request.
1475 cdns3_select_ep(priv_dev
, priv_ep
->endpoint
.address
);
1477 trb
= priv_ep
->trb_pool
;
1478 trace_cdns3_complete_trb(priv_ep
, trb
);
1480 if (trb
!= priv_req
->trb
)
1481 dev_warn(priv_dev
->dev
,
1482 "request_trb=0x%p, queue_trb=0x%p\n",
1483 priv_req
->trb
, trb
);
1485 request
->actual
+= TRB_LEN(le32_to_cpu(trb
->length
));
1487 if (!request
->num_sgs
||
1488 (request
->num_sgs
== (priv_ep
->stream_sg_idx
+ 1))) {
1489 priv_ep
->stream_sg_idx
= 0;
1490 cdns3_gadget_giveback(priv_ep
, priv_req
, 0);
1492 priv_ep
->stream_sg_idx
++;
1493 cdns3_ep_run_stream_transfer(priv_ep
, request
);
1498 priv_ep
->flags
&= ~EP_PENDING_REQUEST
;
1501 if (!(priv_ep
->flags
& EP_STALLED
) &&
1502 !(priv_ep
->flags
& EP_STALL_PENDING
))
1503 cdns3_start_all_request(priv_dev
, priv_ep
);
1506 void cdns3_rearm_transfer(struct cdns3_endpoint
*priv_ep
, u8 rearm
)
1508 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
1510 cdns3_wa1_restore_cycle_bit(priv_ep
);
1513 trace_cdns3_ring(priv_ep
);
1515 /* Cycle Bit must be updated before arming DMA. */
1517 writel(EP_CMD_DRDY
, &priv_dev
->regs
->ep_cmd
);
1519 __cdns3_gadget_wakeup(priv_dev
);
1521 trace_cdns3_doorbell_epx(priv_ep
->name
,
1522 readl(&priv_dev
->regs
->ep_traddr
));
1526 static void cdns3_reprogram_tdl(struct cdns3_endpoint
*priv_ep
)
1528 u16 tdl
= priv_ep
->pending_tdl
;
1529 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
1531 if (tdl
> EP_CMD_TDL_MAX
) {
1532 tdl
= EP_CMD_TDL_MAX
;
1533 priv_ep
->pending_tdl
-= EP_CMD_TDL_MAX
;
1535 priv_ep
->pending_tdl
= 0;
1538 writel(EP_CMD_TDL_SET(tdl
) | EP_CMD_STDL
, &priv_dev
->regs
->ep_cmd
);
1542 * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint
1543 * @priv_ep: endpoint object
1547 static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint
*priv_ep
)
1549 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
1551 struct usb_request
*deferred_request
;
1552 struct usb_request
*pending_request
;
1555 cdns3_select_ep(priv_dev
, priv_ep
->endpoint
.address
);
1557 trace_cdns3_epx_irq(priv_dev
, priv_ep
);
1559 ep_sts_reg
= readl(&priv_dev
->regs
->ep_sts
);
1560 writel(ep_sts_reg
, &priv_dev
->regs
->ep_sts
);
1562 if ((ep_sts_reg
& EP_STS_PRIME
) && priv_ep
->use_streams
) {
1563 bool dbusy
= !!(ep_sts_reg
& EP_STS_DBUSY
);
1565 tdl
= cdns3_get_tdl(priv_dev
);
1568 * Continue the previous transfer:
1569 * There is some racing between ERDY and PRIME. The device send
1570 * ERDY and almost in the same time Host send PRIME. It cause
1571 * that host ignore the ERDY packet and driver has to send it
1574 if (tdl
&& (dbusy
| !EP_STS_BUFFEMPTY(ep_sts_reg
) |
1575 EP_STS_HOSTPP(ep_sts_reg
))) {
1576 writel(EP_CMD_ERDY
|
1577 EP_CMD_ERDY_SID(priv_ep
->last_stream_id
),
1578 &priv_dev
->regs
->ep_cmd
);
1579 ep_sts_reg
&= ~(EP_STS_MD_EXIT
| EP_STS_IOC
);
1581 priv_ep
->prime_flag
= true;
1583 pending_request
= cdns3_next_request(&priv_ep
->pending_req_list
);
1584 deferred_request
= cdns3_next_request(&priv_ep
->deferred_req_list
);
1586 if (deferred_request
&& !pending_request
) {
1587 cdns3_start_all_request(priv_dev
, priv_ep
);
1592 if (ep_sts_reg
& EP_STS_TRBERR
) {
1593 if (priv_ep
->flags
& EP_STALL_PENDING
&&
1594 !(ep_sts_reg
& EP_STS_DESCMIS
&&
1595 priv_dev
->dev_ver
< DEV_VER_V2
)) {
1596 cdns3_ep_stall_flush(priv_ep
);
1600 * For isochronous transfer driver completes request on
1601 * IOC or on TRBERR. IOC appears only when device receive
1602 * OUT data packet. If host disable stream or lost some packet
1603 * then the only way to finish all queued transfer is to do it
1606 if (priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
&&
1607 !priv_ep
->wa1_set
) {
1608 if (!priv_ep
->dir
) {
1609 u32 ep_cfg
= readl(&priv_dev
->regs
->ep_cfg
);
1611 ep_cfg
&= ~EP_CFG_ENABLE
;
1612 writel(ep_cfg
, &priv_dev
->regs
->ep_cfg
);
1613 priv_ep
->flags
&= ~EP_QUIRK_ISO_OUT_EN
;
1615 cdns3_transfer_completed(priv_dev
, priv_ep
);
1616 } else if (!(priv_ep
->flags
& EP_STALLED
) &&
1617 !(priv_ep
->flags
& EP_STALL_PENDING
)) {
1618 if (priv_ep
->flags
& EP_DEFERRED_DRDY
) {
1619 priv_ep
->flags
&= ~EP_DEFERRED_DRDY
;
1620 cdns3_start_all_request(priv_dev
, priv_ep
);
1622 cdns3_rearm_transfer(priv_ep
,
1628 if ((ep_sts_reg
& EP_STS_IOC
) || (ep_sts_reg
& EP_STS_ISP
) ||
1629 (ep_sts_reg
& EP_STS_IOT
)) {
1630 if (priv_ep
->flags
& EP_QUIRK_EXTRA_BUF_EN
) {
1631 if (ep_sts_reg
& EP_STS_ISP
)
1632 priv_ep
->flags
|= EP_QUIRK_END_TRANSFER
;
1634 priv_ep
->flags
&= ~EP_QUIRK_END_TRANSFER
;
1637 if (!priv_ep
->use_streams
) {
1638 if ((ep_sts_reg
& EP_STS_IOC
) ||
1639 (ep_sts_reg
& EP_STS_ISP
)) {
1640 cdns3_transfer_completed(priv_dev
, priv_ep
);
1641 } else if ((priv_ep
->flags
& EP_TDLCHK_EN
) &
1642 priv_ep
->pending_tdl
) {
1643 /* handle IOT with pending tdl */
1644 cdns3_reprogram_tdl(priv_ep
);
1646 } else if (priv_ep
->dir
== USB_DIR_OUT
) {
1647 priv_ep
->ep_sts_pending
|= ep_sts_reg
;
1648 } else if (ep_sts_reg
& EP_STS_IOT
) {
1649 cdns3_transfer_completed(priv_dev
, priv_ep
);
1654 * MD_EXIT interrupt sets when stream capable endpoint exits
1655 * from MOVE DATA state of Bulk IN/OUT stream protocol state machine
1657 if (priv_ep
->dir
== USB_DIR_OUT
&& (ep_sts_reg
& EP_STS_MD_EXIT
) &&
1658 (priv_ep
->ep_sts_pending
& EP_STS_IOT
) && priv_ep
->use_streams
) {
1659 priv_ep
->ep_sts_pending
= 0;
1660 cdns3_transfer_completed(priv_dev
, priv_ep
);
1664 * WA2: this condition should only be meet when
1665 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET or
1666 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
1667 * In other cases this interrupt will be disabled.
1669 if (ep_sts_reg
& EP_STS_DESCMIS
&& priv_dev
->dev_ver
< DEV_VER_V2
&&
1670 !(priv_ep
->flags
& EP_STALLED
))
1671 cdns3_wa2_descmissing_packet(priv_ep
);
1676 static void cdns3_disconnect_gadget(struct cdns3_device
*priv_dev
)
1678 if (priv_dev
->gadget_driver
&& priv_dev
->gadget_driver
->disconnect
) {
1679 spin_unlock(&priv_dev
->lock
);
1680 priv_dev
->gadget_driver
->disconnect(&priv_dev
->gadget
);
1681 spin_lock(&priv_dev
->lock
);
1686 * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
1687 * @priv_dev: extended gadget object
1688 * @usb_ists: bitmap representation of device's reported interrupts
1689 * (usb_ists register value)
1691 static void cdns3_check_usb_interrupt_proceed(struct cdns3_device
*priv_dev
,
1696 trace_cdns3_usb_irq(priv_dev
, usb_ists
);
1697 if (usb_ists
& USB_ISTS_L1ENTI
) {
1699 * WORKAROUND: CDNS3 controller has issue with hardware resuming
1700 * from L1. To fix it, if any DMA transfer is pending driver
1701 * must starts driving resume signal immediately.
1703 if (readl(&priv_dev
->regs
->drbl
))
1704 __cdns3_gadget_wakeup(priv_dev
);
1707 /* Connection detected */
1708 if (usb_ists
& (USB_ISTS_CON2I
| USB_ISTS_CONI
)) {
1709 speed
= cdns3_get_speed(priv_dev
);
1710 priv_dev
->gadget
.speed
= speed
;
1711 usb_gadget_set_state(&priv_dev
->gadget
, USB_STATE_POWERED
);
1712 cdns3_ep0_config(priv_dev
);
1715 /* Disconnection detected */
1716 if (usb_ists
& (USB_ISTS_DIS2I
| USB_ISTS_DISI
)) {
1717 cdns3_disconnect_gadget(priv_dev
);
1718 priv_dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1719 usb_gadget_set_state(&priv_dev
->gadget
, USB_STATE_NOTATTACHED
);
1720 cdns3_hw_reset_eps_config(priv_dev
);
1723 if (usb_ists
& (USB_ISTS_L2ENTI
| USB_ISTS_U3ENTI
)) {
1724 if (priv_dev
->gadget_driver
&&
1725 priv_dev
->gadget_driver
->suspend
) {
1726 spin_unlock(&priv_dev
->lock
);
1727 priv_dev
->gadget_driver
->suspend(&priv_dev
->gadget
);
1728 spin_lock(&priv_dev
->lock
);
1732 if (usb_ists
& (USB_ISTS_L2EXTI
| USB_ISTS_U3EXTI
)) {
1733 if (priv_dev
->gadget_driver
&&
1734 priv_dev
->gadget_driver
->resume
) {
1735 spin_unlock(&priv_dev
->lock
);
1736 priv_dev
->gadget_driver
->resume(&priv_dev
->gadget
);
1737 spin_lock(&priv_dev
->lock
);
1742 if (usb_ists
& (USB_ISTS_UWRESI
| USB_ISTS_UHRESI
| USB_ISTS_U2RESI
)) {
1743 if (priv_dev
->gadget_driver
) {
1744 spin_unlock(&priv_dev
->lock
);
1745 usb_gadget_udc_reset(&priv_dev
->gadget
,
1746 priv_dev
->gadget_driver
);
1747 spin_lock(&priv_dev
->lock
);
1749 /*read again to check the actual speed*/
1750 speed
= cdns3_get_speed(priv_dev
);
1751 priv_dev
->gadget
.speed
= speed
;
1752 cdns3_hw_reset_eps_config(priv_dev
);
1753 cdns3_ep0_config(priv_dev
);
1759 * cdns3_device_irq_handler- interrupt handler for device part of controller
1761 * @irq: irq number for cdns3 core device
1762 * @data: structure of cdns3
1764 * Returns IRQ_HANDLED or IRQ_NONE
1766 static irqreturn_t
cdns3_device_irq_handler(int irq
, void *data
)
1768 struct cdns3_device
*priv_dev
= data
;
1769 irqreturn_t ret
= IRQ_NONE
;
1772 /* check USB device interrupt */
1773 reg
= readl(&priv_dev
->regs
->usb_ists
);
1775 /* After masking interrupts the new interrupts won't be
1776 * reported in usb_ists/ep_ists. In order to not lose some
1777 * of them driver disables only detected interrupts.
1778 * They will be enabled ASAP after clearing source of
1779 * interrupt. This an unusual behavior only applies to
1780 * usb_ists register.
1782 reg
= ~reg
& readl(&priv_dev
->regs
->usb_ien
);
1783 /* mask deferred interrupt. */
1784 writel(reg
, &priv_dev
->regs
->usb_ien
);
1785 ret
= IRQ_WAKE_THREAD
;
1788 /* check endpoint interrupt */
1789 reg
= readl(&priv_dev
->regs
->ep_ists
);
1791 writel(0, &priv_dev
->regs
->ep_ien
);
1792 ret
= IRQ_WAKE_THREAD
;
1799 * cdns3_device_thread_irq_handler- interrupt handler for device part
1802 * @irq: irq number for cdns3 core device
1803 * @data: structure of cdns3
1805 * Returns IRQ_HANDLED or IRQ_NONE
1807 static irqreturn_t
cdns3_device_thread_irq_handler(int irq
, void *data
)
1809 struct cdns3_device
*priv_dev
= data
;
1810 irqreturn_t ret
= IRQ_NONE
;
1811 unsigned long flags
;
1815 spin_lock_irqsave(&priv_dev
->lock
, flags
);
1817 reg
= readl(&priv_dev
->regs
->usb_ists
);
1819 writel(reg
, &priv_dev
->regs
->usb_ists
);
1820 writel(USB_IEN_INIT
, &priv_dev
->regs
->usb_ien
);
1821 cdns3_check_usb_interrupt_proceed(priv_dev
, reg
);
1825 reg
= readl(&priv_dev
->regs
->ep_ists
);
1827 /* handle default endpoint OUT */
1828 if (reg
& EP_ISTS_EP_OUT0
) {
1829 cdns3_check_ep0_interrupt_proceed(priv_dev
, USB_DIR_OUT
);
1833 /* handle default endpoint IN */
1834 if (reg
& EP_ISTS_EP_IN0
) {
1835 cdns3_check_ep0_interrupt_proceed(priv_dev
, USB_DIR_IN
);
1839 /* check if interrupt from non default endpoint, if no exit */
1840 reg
&= ~(EP_ISTS_EP_OUT0
| EP_ISTS_EP_IN0
);
1844 for_each_set_bit(bit
, (unsigned long *)®
,
1845 sizeof(u32
) * BITS_PER_BYTE
) {
1846 cdns3_check_ep_interrupt_proceed(priv_dev
->eps
[bit
]);
1850 if (priv_dev
->dev_ver
< DEV_VER_V2
&& priv_dev
->using_streams
)
1851 cdns3_wa2_check_outq_status(priv_dev
);
1854 writel(~0, &priv_dev
->regs
->ep_ien
);
1855 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
1861 * cdns3_ep_onchip_buffer_reserve - Try to reserve onchip buf for EP
1863 * The real reservation will occur during write to EP_CFG register,
1864 * this function is used to check if the 'size' reservation is allowed.
1866 * @priv_dev: extended gadget object
1867 * @size: the size (KB) for EP would like to allocate
1868 * @is_in: endpoint direction
1870 * Return 0 if the required size can met or negative value on failure
1872 static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device
*priv_dev
,
1873 int size
, int is_in
)
1877 /* 2KB are reserved for EP0*/
1878 remained
= priv_dev
->onchip_buffers
- priv_dev
->onchip_used_size
- 2;
1881 if (remained
< size
)
1884 priv_dev
->onchip_used_size
+= size
;
1889 * ALL OUT EPs are shared the same chunk onchip memory, so
1890 * driver checks if it already has assigned enough buffers
1892 if (priv_dev
->out_mem_is_allocated
>= size
)
1895 required
= size
- priv_dev
->out_mem_is_allocated
;
1897 if (required
> remained
)
1900 priv_dev
->out_mem_is_allocated
+= required
;
1901 priv_dev
->onchip_used_size
+= required
;
1907 void cdns3_stream_ep_reconfig(struct cdns3_device
*priv_dev
,
1908 struct cdns3_endpoint
*priv_ep
)
1910 if (!priv_ep
->use_streams
|| priv_dev
->gadget
.speed
< USB_SPEED_SUPER
)
1913 if (priv_dev
->dev_ver
>= DEV_VER_V3
) {
1914 u32 mask
= BIT(priv_ep
->num
+ (priv_ep
->dir
? 16 : 0));
1917 * Stream capable endpoints are handled by using ep_tdl
1918 * register. Other endpoints use TDL from TRB feature.
1920 cdns3_clear_register_bit(&priv_dev
->regs
->tdl_from_trb
, mask
);
1923 /* Enable Stream Bit TDL chk and SID chk */
1924 cdns3_set_register_bit(&priv_dev
->regs
->ep_cfg
, EP_CFG_STREAM_EN
|
1925 EP_CFG_TDL_CHK
| EP_CFG_SID_CHK
);
1928 void cdns3_configure_dmult(struct cdns3_device
*priv_dev
,
1929 struct cdns3_endpoint
*priv_ep
)
1931 struct cdns3_usb_regs __iomem
*regs
= priv_dev
->regs
;
1933 /* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
1934 if (priv_dev
->dev_ver
<= DEV_VER_V2
)
1935 writel(USB_CONF_DMULT
, ®s
->usb_conf
);
1937 if (priv_dev
->dev_ver
== DEV_VER_V2
)
1938 writel(USB_CONF2_EN_TDL_TRB
, ®s
->usb_conf2
);
1940 if (priv_dev
->dev_ver
>= DEV_VER_V3
&& priv_ep
) {
1944 mask
= BIT(priv_ep
->num
+ 16);
1946 mask
= BIT(priv_ep
->num
);
1948 if (priv_ep
->type
!= USB_ENDPOINT_XFER_ISOC
) {
1949 cdns3_set_register_bit(®s
->tdl_from_trb
, mask
);
1950 cdns3_set_register_bit(®s
->tdl_beh
, mask
);
1951 cdns3_set_register_bit(®s
->tdl_beh2
, mask
);
1952 cdns3_set_register_bit(®s
->dma_adv_td
, mask
);
1955 if (priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
&& !priv_ep
->dir
)
1956 cdns3_set_register_bit(®s
->tdl_from_trb
, mask
);
1958 cdns3_set_register_bit(®s
->dtrans
, mask
);
1963 * cdns3_ep_config Configure hardware endpoint
1964 * @priv_ep: extended endpoint object
1966 void cdns3_ep_config(struct cdns3_endpoint
*priv_ep
)
1968 bool is_iso_ep
= (priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
);
1969 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
1970 u32 bEndpointAddress
= priv_ep
->num
| priv_ep
->dir
;
1971 u32 max_packet_size
= 0;
1978 buffering
= CDNS3_EP_BUF_SIZE
- 1;
1980 cdns3_configure_dmult(priv_dev
, priv_ep
);
1982 switch (priv_ep
->type
) {
1983 case USB_ENDPOINT_XFER_INT
:
1984 ep_cfg
= EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT
);
1986 if ((priv_dev
->dev_ver
== DEV_VER_V2
&& !priv_ep
->dir
) ||
1987 priv_dev
->dev_ver
> DEV_VER_V2
)
1988 ep_cfg
|= EP_CFG_TDL_CHK
;
1990 case USB_ENDPOINT_XFER_BULK
:
1991 ep_cfg
= EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK
);
1993 if ((priv_dev
->dev_ver
== DEV_VER_V2
&& !priv_ep
->dir
) ||
1994 priv_dev
->dev_ver
> DEV_VER_V2
)
1995 ep_cfg
|= EP_CFG_TDL_CHK
;
1998 ep_cfg
= EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC
);
1999 mult
= CDNS3_EP_ISO_HS_MULT
- 1;
2000 buffering
= mult
+ 1;
2003 switch (priv_dev
->gadget
.speed
) {
2004 case USB_SPEED_FULL
:
2005 max_packet_size
= is_iso_ep
? 1023 : 64;
2007 case USB_SPEED_HIGH
:
2008 max_packet_size
= is_iso_ep
? 1024 : 512;
2010 case USB_SPEED_SUPER
:
2011 /* It's limitation that driver assumes in driver. */
2013 max_packet_size
= 1024;
2014 if (priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
) {
2015 maxburst
= CDNS3_EP_ISO_SS_BURST
- 1;
2016 buffering
= (mult
+ 1) *
2019 if (priv_ep
->interval
> 1)
2022 maxburst
= CDNS3_EP_BUF_SIZE
- 1;
2026 /* all other speed are not supported */
2030 if (max_packet_size
== 1024)
2031 priv_ep
->trb_burst_size
= 128;
2032 else if (max_packet_size
>= 512)
2033 priv_ep
->trb_burst_size
= 64;
2035 priv_ep
->trb_burst_size
= 16;
2037 ret
= cdns3_ep_onchip_buffer_reserve(priv_dev
, buffering
+ 1,
2040 dev_err(priv_dev
->dev
, "onchip mem is full, ep is invalid\n");
2044 ep_cfg
|= EP_CFG_MAXPKTSIZE(max_packet_size
) |
2046 EP_CFG_BUFFERING(buffering
) |
2047 EP_CFG_MAXBURST(maxburst
);
2049 cdns3_select_ep(priv_dev
, bEndpointAddress
);
2050 writel(ep_cfg
, &priv_dev
->regs
->ep_cfg
);
2052 dev_dbg(priv_dev
->dev
, "Configure %s: with val %08x\n",
2053 priv_ep
->name
, ep_cfg
);
2056 /* Find correct direction for HW endpoint according to description */
2057 static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor
*desc
,
2058 struct cdns3_endpoint
*priv_ep
)
2060 return (priv_ep
->endpoint
.caps
.dir_in
&& usb_endpoint_dir_in(desc
)) ||
2061 (priv_ep
->endpoint
.caps
.dir_out
&& usb_endpoint_dir_out(desc
));
2065 cdns3_endpoint
*cdns3_find_available_ep(struct cdns3_device
*priv_dev
,
2066 struct usb_endpoint_descriptor
*desc
)
2069 struct cdns3_endpoint
*priv_ep
;
2071 list_for_each_entry(ep
, &priv_dev
->gadget
.ep_list
, ep_list
) {
2074 /* ep name pattern likes epXin or epXout */
2075 char c
[2] = {ep
->name
[2], '\0'};
2077 ret
= kstrtoul(c
, 10, &num
);
2079 return ERR_PTR(ret
);
2081 priv_ep
= ep_to_cdns3_ep(ep
);
2082 if (cdns3_ep_dir_is_correct(desc
, priv_ep
)) {
2083 if (!(priv_ep
->flags
& EP_CLAIMED
)) {
2090 return ERR_PTR(-ENOENT
);
2094 * Cadence IP has one limitation that all endpoints must be configured
2095 * (Type & MaxPacketSize) before setting configuration through hardware
2096 * register, it means we can't change endpoints configuration after
2097 * set_configuration.
2099 * This function set EP_CLAIMED flag which is added when the gadget driver
2100 * uses usb_ep_autoconfig to configure specific endpoint;
2101 * When the udc driver receives set_configurion request,
2102 * it goes through all claimed endpoints, and configure all endpoints
2105 * At usb_ep_ops.enable/disable, we only enable and disable endpoint through
2106 * ep_cfg register which can be changed after set_configuration, and do
2107 * some software operation accordingly.
2110 usb_ep
*cdns3_gadget_match_ep(struct usb_gadget
*gadget
,
2111 struct usb_endpoint_descriptor
*desc
,
2112 struct usb_ss_ep_comp_descriptor
*comp_desc
)
2114 struct cdns3_device
*priv_dev
= gadget_to_cdns3_device(gadget
);
2115 struct cdns3_endpoint
*priv_ep
;
2116 unsigned long flags
;
2118 priv_ep
= cdns3_find_available_ep(priv_dev
, desc
);
2119 if (IS_ERR(priv_ep
)) {
2120 dev_err(priv_dev
->dev
, "no available ep\n");
2124 dev_dbg(priv_dev
->dev
, "match endpoint: %s\n", priv_ep
->name
);
2126 spin_lock_irqsave(&priv_dev
->lock
, flags
);
2127 priv_ep
->endpoint
.desc
= desc
;
2128 priv_ep
->dir
= usb_endpoint_dir_in(desc
) ? USB_DIR_IN
: USB_DIR_OUT
;
2129 priv_ep
->type
= usb_endpoint_type(desc
);
2130 priv_ep
->flags
|= EP_CLAIMED
;
2131 priv_ep
->interval
= desc
->bInterval
? BIT(desc
->bInterval
- 1) : 0;
2133 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
2134 return &priv_ep
->endpoint
;
2138 * cdns3_gadget_ep_alloc_request Allocates request
2139 * @ep: endpoint object associated with request
2140 * @gfp_flags: gfp flags
2142 * Returns allocated request address, NULL on allocation error
2144 struct usb_request
*cdns3_gadget_ep_alloc_request(struct usb_ep
*ep
,
2147 struct cdns3_endpoint
*priv_ep
= ep_to_cdns3_ep(ep
);
2148 struct cdns3_request
*priv_req
;
2150 priv_req
= kzalloc(sizeof(*priv_req
), gfp_flags
);
2154 priv_req
->priv_ep
= priv_ep
;
2156 trace_cdns3_alloc_request(priv_req
);
2157 return &priv_req
->request
;
2161 * cdns3_gadget_ep_free_request Free memory occupied by request
2162 * @ep: endpoint object associated with request
2163 * @request: request to free memory
2165 void cdns3_gadget_ep_free_request(struct usb_ep
*ep
,
2166 struct usb_request
*request
)
2168 struct cdns3_request
*priv_req
= to_cdns3_request(request
);
2170 if (priv_req
->aligned_buf
)
2171 priv_req
->aligned_buf
->in_use
= 0;
2173 trace_cdns3_free_request(priv_req
);
2178 * cdns3_gadget_ep_enable Enable endpoint
2179 * @ep: endpoint object
2180 * @desc: endpoint descriptor
2182 * Returns 0 on success, error code elsewhere
2184 static int cdns3_gadget_ep_enable(struct usb_ep
*ep
,
2185 const struct usb_endpoint_descriptor
*desc
)
2187 struct cdns3_endpoint
*priv_ep
;
2188 struct cdns3_device
*priv_dev
;
2189 const struct usb_ss_ep_comp_descriptor
*comp_desc
;
2190 u32 reg
= EP_STS_EN_TRBERREN
;
2191 u32 bEndpointAddress
;
2192 unsigned long flags
;
2197 priv_ep
= ep_to_cdns3_ep(ep
);
2198 priv_dev
= priv_ep
->cdns3_dev
;
2199 comp_desc
= priv_ep
->endpoint
.comp_desc
;
2201 if (!ep
|| !desc
|| desc
->bDescriptorType
!= USB_DT_ENDPOINT
) {
2202 dev_dbg(priv_dev
->dev
, "usbss: invalid parameters\n");
2206 if (!desc
->wMaxPacketSize
) {
2207 dev_err(priv_dev
->dev
, "usbss: missing wMaxPacketSize\n");
2211 if (dev_WARN_ONCE(priv_dev
->dev
, priv_ep
->flags
& EP_ENABLED
,
2212 "%s is already enabled\n", priv_ep
->name
))
2215 spin_lock_irqsave(&priv_dev
->lock
, flags
);
2217 priv_ep
->endpoint
.desc
= desc
;
2218 priv_ep
->type
= usb_endpoint_type(desc
);
2219 priv_ep
->interval
= desc
->bInterval
? BIT(desc
->bInterval
- 1) : 0;
2221 if (priv_ep
->interval
> ISO_MAX_INTERVAL
&&
2222 priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
) {
2223 dev_err(priv_dev
->dev
, "Driver is limited to %d period\n",
2230 bEndpointAddress
= priv_ep
->num
| priv_ep
->dir
;
2231 cdns3_select_ep(priv_dev
, bEndpointAddress
);
2233 if (usb_ss_max_streams(comp_desc
) && usb_endpoint_xfer_bulk(desc
)) {
2235 * Enable stream support (SS mode) related interrupts
2236 * in EP_STS_EN Register
2238 if (priv_dev
->gadget
.speed
>= USB_SPEED_SUPER
) {
2239 reg
|= EP_STS_EN_IOTEN
| EP_STS_EN_PRIMEEEN
|
2240 EP_STS_EN_SIDERREN
| EP_STS_EN_MD_EXITEN
|
2241 EP_STS_EN_STREAMREN
;
2242 priv_ep
->use_streams
= true;
2243 cdns3_stream_ep_reconfig(priv_dev
, priv_ep
);
2244 priv_dev
->using_streams
|= true;
2248 ret
= cdns3_allocate_trb_pool(priv_ep
);
2253 bEndpointAddress
= priv_ep
->num
| priv_ep
->dir
;
2254 cdns3_select_ep(priv_dev
, bEndpointAddress
);
2256 trace_cdns3_gadget_ep_enable(priv_ep
);
2258 writel(EP_CMD_EPRST
, &priv_dev
->regs
->ep_cmd
);
2260 ret
= readl_poll_timeout_atomic(&priv_dev
->regs
->ep_cmd
, val
,
2261 !(val
& (EP_CMD_CSTALL
| EP_CMD_EPRST
)),
2264 if (unlikely(ret
)) {
2265 cdns3_free_trb_pool(priv_ep
);
2270 /* enable interrupt for selected endpoint */
2271 cdns3_set_register_bit(&priv_dev
->regs
->ep_ien
,
2272 BIT(cdns3_ep_addr_to_index(bEndpointAddress
)));
2274 if (priv_dev
->dev_ver
< DEV_VER_V2
)
2275 cdns3_wa2_enable_detection(priv_dev
, priv_ep
, reg
);
2277 writel(reg
, &priv_dev
->regs
->ep_sts_en
);
2280 * For some versions of controller at some point during ISO OUT traffic
2281 * DMA reads Transfer Ring for the EP which has never got doorbell.
2282 * This issue was detected only on simulation, but to avoid this issue
2283 * driver add protection against it. To fix it driver enable ISO OUT
2284 * endpoint before setting DRBL. This special treatment of ISO OUT
2285 * endpoints are recommended by controller specification.
2287 if (priv_ep
->type
== USB_ENDPOINT_XFER_ISOC
&& !priv_ep
->dir
)
2291 cdns3_set_register_bit(&priv_dev
->regs
->ep_cfg
, EP_CFG_ENABLE
);
2294 priv_ep
->flags
&= ~(EP_PENDING_REQUEST
| EP_STALLED
| EP_STALL_PENDING
|
2295 EP_QUIRK_ISO_OUT_EN
| EP_QUIRK_EXTRA_BUF_EN
);
2296 priv_ep
->flags
|= EP_ENABLED
| EP_UPDATE_EP_TRBADDR
;
2297 priv_ep
->wa1_set
= 0;
2298 priv_ep
->enqueue
= 0;
2299 priv_ep
->dequeue
= 0;
2300 reg
= readl(&priv_dev
->regs
->ep_sts
);
2301 priv_ep
->pcs
= !!EP_STS_CCS(reg
);
2302 priv_ep
->ccs
= !!EP_STS_CCS(reg
);
2303 /* one TRB is reserved for link TRB used in DMULT mode*/
2304 priv_ep
->free_trbs
= priv_ep
->num_trbs
- 1;
2306 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
2312 * cdns3_gadget_ep_disable Disable endpoint
2313 * @ep: endpoint object
2315 * Returns 0 on success, error code elsewhere
2317 static int cdns3_gadget_ep_disable(struct usb_ep
*ep
)
2319 struct cdns3_endpoint
*priv_ep
;
2320 struct cdns3_request
*priv_req
;
2321 struct cdns3_device
*priv_dev
;
2322 struct usb_request
*request
;
2323 unsigned long flags
;
2329 pr_err("usbss: invalid parameters\n");
2333 priv_ep
= ep_to_cdns3_ep(ep
);
2334 priv_dev
= priv_ep
->cdns3_dev
;
2336 if (dev_WARN_ONCE(priv_dev
->dev
, !(priv_ep
->flags
& EP_ENABLED
),
2337 "%s is already disabled\n", priv_ep
->name
))
2340 spin_lock_irqsave(&priv_dev
->lock
, flags
);
2342 trace_cdns3_gadget_ep_disable(priv_ep
);
2344 cdns3_select_ep(priv_dev
, ep
->desc
->bEndpointAddress
);
2346 ep_cfg
= readl(&priv_dev
->regs
->ep_cfg
);
2347 ep_cfg
&= ~EP_CFG_ENABLE
;
2348 writel(ep_cfg
, &priv_dev
->regs
->ep_cfg
);
2351 * Driver needs some time before resetting endpoint.
2352 * It need waits for clearing DBUSY bit or for timeout expired.
2353 * 10us is enough time for controller to stop transfer.
2355 readl_poll_timeout_atomic(&priv_dev
->regs
->ep_sts
, val
,
2356 !(val
& EP_STS_DBUSY
), 1, 10);
2357 writel(EP_CMD_EPRST
, &priv_dev
->regs
->ep_cmd
);
2359 readl_poll_timeout_atomic(&priv_dev
->regs
->ep_cmd
, val
,
2360 !(val
& (EP_CMD_CSTALL
| EP_CMD_EPRST
)),
2363 dev_err(priv_dev
->dev
, "Timeout: %s resetting failed.\n",
2366 while (!list_empty(&priv_ep
->pending_req_list
)) {
2367 request
= cdns3_next_request(&priv_ep
->pending_req_list
);
2369 cdns3_gadget_giveback(priv_ep
, to_cdns3_request(request
),
2373 while (!list_empty(&priv_ep
->wa2_descmiss_req_list
)) {
2374 priv_req
= cdns3_next_priv_request(&priv_ep
->wa2_descmiss_req_list
);
2376 kfree(priv_req
->request
.buf
);
2377 cdns3_gadget_ep_free_request(&priv_ep
->endpoint
,
2378 &priv_req
->request
);
2379 list_del_init(&priv_req
->list
);
2380 --priv_ep
->wa2_counter
;
2383 while (!list_empty(&priv_ep
->deferred_req_list
)) {
2384 request
= cdns3_next_request(&priv_ep
->deferred_req_list
);
2386 cdns3_gadget_giveback(priv_ep
, to_cdns3_request(request
),
2390 priv_ep
->descmis_req
= NULL
;
2393 priv_ep
->flags
&= ~EP_ENABLED
;
2394 priv_ep
->use_streams
= false;
2396 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
2402 * cdns3_gadget_ep_queue Transfer data on endpoint
2403 * @ep: endpoint object
2404 * @request: request object
2405 * @gfp_flags: gfp flags
2407 * Returns 0 on success, error code elsewhere
2409 static int __cdns3_gadget_ep_queue(struct usb_ep
*ep
,
2410 struct usb_request
*request
,
2413 struct cdns3_endpoint
*priv_ep
= ep_to_cdns3_ep(ep
);
2414 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
2415 struct cdns3_request
*priv_req
;
2418 request
->actual
= 0;
2419 request
->status
= -EINPROGRESS
;
2420 priv_req
= to_cdns3_request(request
);
2421 trace_cdns3_ep_queue(priv_req
);
2423 if (priv_dev
->dev_ver
< DEV_VER_V2
) {
2424 ret
= cdns3_wa2_gadget_ep_queue(priv_dev
, priv_ep
,
2427 if (ret
== EINPROGRESS
)
2431 ret
= cdns3_prepare_aligned_request_buf(priv_req
);
2435 ret
= usb_gadget_map_request_by_dev(priv_dev
->sysdev
, request
,
2436 usb_endpoint_dir_in(ep
->desc
));
2440 list_add_tail(&request
->list
, &priv_ep
->deferred_req_list
);
2443 * For stream capable endpoint if prime irq flag is set then only start
2445 * If hardware endpoint configuration has not been set yet then
2446 * just queue request in deferred list. Transfer will be started in
2447 * cdns3_set_hw_configuration.
2449 if (!request
->stream_id
) {
2450 if (priv_dev
->hw_configured_flag
&&
2451 !(priv_ep
->flags
& EP_STALLED
) &&
2452 !(priv_ep
->flags
& EP_STALL_PENDING
))
2453 cdns3_start_all_request(priv_dev
, priv_ep
);
2455 if (priv_dev
->hw_configured_flag
&& priv_ep
->prime_flag
)
2456 cdns3_start_all_request(priv_dev
, priv_ep
);
2462 static int cdns3_gadget_ep_queue(struct usb_ep
*ep
, struct usb_request
*request
,
2465 struct usb_request
*zlp_request
;
2466 struct cdns3_endpoint
*priv_ep
;
2467 struct cdns3_device
*priv_dev
;
2468 unsigned long flags
;
2471 if (!request
|| !ep
)
2474 priv_ep
= ep_to_cdns3_ep(ep
);
2475 priv_dev
= priv_ep
->cdns3_dev
;
2477 spin_lock_irqsave(&priv_dev
->lock
, flags
);
2479 ret
= __cdns3_gadget_ep_queue(ep
, request
, gfp_flags
);
2481 if (ret
== 0 && request
->zero
&& request
->length
&&
2482 (request
->length
% ep
->maxpacket
== 0)) {
2483 struct cdns3_request
*priv_req
;
2485 zlp_request
= cdns3_gadget_ep_alloc_request(ep
, GFP_ATOMIC
);
2486 zlp_request
->buf
= priv_dev
->zlp_buf
;
2487 zlp_request
->length
= 0;
2489 priv_req
= to_cdns3_request(zlp_request
);
2490 priv_req
->flags
|= REQUEST_ZLP
;
2492 dev_dbg(priv_dev
->dev
, "Queuing ZLP for endpoint: %s\n",
2494 ret
= __cdns3_gadget_ep_queue(ep
, zlp_request
, gfp_flags
);
2497 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
2502 * cdns3_gadget_ep_dequeue Remove request from transfer queue
2503 * @ep: endpoint object associated with request
2504 * @request: request object
2506 * Returns 0 on success, error code elsewhere
2508 int cdns3_gadget_ep_dequeue(struct usb_ep
*ep
,
2509 struct usb_request
*request
)
2511 struct cdns3_endpoint
*priv_ep
= ep_to_cdns3_ep(ep
);
2512 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
2513 struct usb_request
*req
, *req_temp
;
2514 struct cdns3_request
*priv_req
;
2515 struct cdns3_trb
*link_trb
;
2516 u8 req_on_hw_ring
= 0;
2517 unsigned long flags
;
2520 if (!ep
|| !request
|| !ep
->desc
)
2523 spin_lock_irqsave(&priv_dev
->lock
, flags
);
2525 priv_req
= to_cdns3_request(request
);
2527 trace_cdns3_ep_dequeue(priv_req
);
2529 cdns3_select_ep(priv_dev
, ep
->desc
->bEndpointAddress
);
2531 list_for_each_entry_safe(req
, req_temp
, &priv_ep
->pending_req_list
,
2533 if (request
== req
) {
2539 list_for_each_entry_safe(req
, req_temp
, &priv_ep
->deferred_req_list
,
2548 link_trb
= priv_req
->trb
;
2550 /* Update ring only if removed request is on pending_req_list list */
2551 if (req_on_hw_ring
) {
2552 link_trb
->buffer
= TRB_BUFFER(priv_ep
->trb_pool_dma
+
2553 (priv_req
->start_trb
* TRB_SIZE
));
2554 link_trb
->control
= (link_trb
->control
& TRB_CYCLE
) |
2555 TRB_TYPE(TRB_LINK
) | TRB_CHAIN
;
2557 if (priv_ep
->wa1_trb
== priv_req
->trb
)
2558 cdns3_wa1_restore_cycle_bit(priv_ep
);
2561 cdns3_gadget_giveback(priv_ep
, priv_req
, -ECONNRESET
);
2564 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
2569 * __cdns3_gadget_ep_set_halt Sets stall on selected endpoint
2570 * Should be called after acquiring spin_lock and selecting ep
2571 * @ep: endpoint object to set stall on.
2573 void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint
*priv_ep
)
2575 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
2577 trace_cdns3_halt(priv_ep
, 1, 0);
2579 if (!(priv_ep
->flags
& EP_STALLED
)) {
2580 u32 ep_sts_reg
= readl(&priv_dev
->regs
->ep_sts
);
2582 if (!(ep_sts_reg
& EP_STS_DBUSY
))
2583 cdns3_ep_stall_flush(priv_ep
);
2585 priv_ep
->flags
|= EP_STALL_PENDING
;
2590 * __cdns3_gadget_ep_clear_halt Clears stall on selected endpoint
2591 * Should be called after acquiring spin_lock and selecting ep
2592 * @ep: endpoint object to clear stall on
2594 int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint
*priv_ep
)
2596 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
2597 struct usb_request
*request
;
2601 trace_cdns3_halt(priv_ep
, 0, 0);
2603 writel(EP_CMD_CSTALL
| EP_CMD_EPRST
, &priv_dev
->regs
->ep_cmd
);
2605 /* wait for EPRST cleared */
2606 ret
= readl_poll_timeout_atomic(&priv_dev
->regs
->ep_cmd
, val
,
2607 !(val
& EP_CMD_EPRST
), 1, 100);
2611 priv_ep
->flags
&= ~(EP_STALLED
| EP_STALL_PENDING
);
2613 request
= cdns3_next_request(&priv_ep
->pending_req_list
);
2616 cdns3_rearm_transfer(priv_ep
, 1);
2618 cdns3_start_all_request(priv_dev
, priv_ep
);
2623 * cdns3_gadget_ep_set_halt Sets/clears stall on selected endpoint
2624 * @ep: endpoint object to set/clear stall on
2625 * @value: 1 for set stall, 0 for clear stall
2627 * Returns 0 on success, error code elsewhere
2629 int cdns3_gadget_ep_set_halt(struct usb_ep
*ep
, int value
)
2631 struct cdns3_endpoint
*priv_ep
= ep_to_cdns3_ep(ep
);
2632 struct cdns3_device
*priv_dev
= priv_ep
->cdns3_dev
;
2633 unsigned long flags
;
2636 if (!(priv_ep
->flags
& EP_ENABLED
))
2639 spin_lock_irqsave(&priv_dev
->lock
, flags
);
2641 cdns3_select_ep(priv_dev
, ep
->desc
->bEndpointAddress
);
2644 priv_ep
->flags
&= ~EP_WEDGE
;
2645 ret
= __cdns3_gadget_ep_clear_halt(priv_ep
);
2647 __cdns3_gadget_ep_set_halt(priv_ep
);
2650 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
2655 extern const struct usb_ep_ops cdns3_gadget_ep0_ops
;
2657 static const struct usb_ep_ops cdns3_gadget_ep_ops
= {
2658 .enable
= cdns3_gadget_ep_enable
,
2659 .disable
= cdns3_gadget_ep_disable
,
2660 .alloc_request
= cdns3_gadget_ep_alloc_request
,
2661 .free_request
= cdns3_gadget_ep_free_request
,
2662 .queue
= cdns3_gadget_ep_queue
,
2663 .dequeue
= cdns3_gadget_ep_dequeue
,
2664 .set_halt
= cdns3_gadget_ep_set_halt
,
2665 .set_wedge
= cdns3_gadget_ep_set_wedge
,
2669 * cdns3_gadget_get_frame Returns number of actual ITP frame
2670 * @gadget: gadget object
2672 * Returns number of actual ITP frame
2674 static int cdns3_gadget_get_frame(struct usb_gadget
*gadget
)
2676 struct cdns3_device
*priv_dev
= gadget_to_cdns3_device(gadget
);
2678 return readl(&priv_dev
->regs
->usb_itpn
);
2681 int __cdns3_gadget_wakeup(struct cdns3_device
*priv_dev
)
2683 enum usb_device_speed speed
;
2685 speed
= cdns3_get_speed(priv_dev
);
2687 if (speed
>= USB_SPEED_SUPER
)
2690 /* Start driving resume signaling to indicate remote wakeup. */
2691 writel(USB_CONF_LGO_L0
, &priv_dev
->regs
->usb_conf
);
2696 static int cdns3_gadget_wakeup(struct usb_gadget
*gadget
)
2698 struct cdns3_device
*priv_dev
= gadget_to_cdns3_device(gadget
);
2699 unsigned long flags
;
2702 spin_lock_irqsave(&priv_dev
->lock
, flags
);
2703 ret
= __cdns3_gadget_wakeup(priv_dev
);
2704 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
2708 static int cdns3_gadget_set_selfpowered(struct usb_gadget
*gadget
,
2711 struct cdns3_device
*priv_dev
= gadget_to_cdns3_device(gadget
);
2712 unsigned long flags
;
2714 spin_lock_irqsave(&priv_dev
->lock
, flags
);
2715 priv_dev
->is_selfpowered
= !!is_selfpowered
;
2716 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
2720 static int cdns3_gadget_pullup(struct usb_gadget
*gadget
, int is_on
)
2722 struct cdns3_device
*priv_dev
= gadget_to_cdns3_device(gadget
);
2725 writel(USB_CONF_DEVEN
, &priv_dev
->regs
->usb_conf
);
2727 writel(USB_CONF_DEVDS
, &priv_dev
->regs
->usb_conf
);
2732 static void cdns3_gadget_config(struct cdns3_device
*priv_dev
)
2734 struct cdns3_usb_regs __iomem
*regs
= priv_dev
->regs
;
2737 cdns3_ep0_config(priv_dev
);
2739 /* enable interrupts for endpoint 0 (in and out) */
2740 writel(EP_IEN_EP_OUT0
| EP_IEN_EP_IN0
, ®s
->ep_ien
);
2743 * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
2744 * revision of controller.
2746 if (priv_dev
->dev_ver
== DEV_VER_TI_V1
) {
2747 reg
= readl(®s
->dbg_link1
);
2749 reg
&= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK
;
2750 reg
|= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
2751 DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET
;
2752 writel(reg
, ®s
->dbg_link1
);
2756 * By default some platforms has set protected access to memory.
2757 * This cause problem with cache, so driver restore non-secure
2760 reg
= readl(®s
->dma_axi_ctrl
);
2761 reg
|= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE
) |
2762 DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE
);
2763 writel(reg
, ®s
->dma_axi_ctrl
);
2765 /* enable generic interrupt*/
2766 writel(USB_IEN_INIT
, ®s
->usb_ien
);
2767 writel(USB_CONF_CLK2OFFDS
| USB_CONF_L1DS
, ®s
->usb_conf
);
2769 cdns3_configure_dmult(priv_dev
, NULL
);
2773 * cdns3_gadget_udc_start Gadget start
2774 * @gadget: gadget object
2775 * @driver: driver which operates on this gadget
2777 * Returns 0 on success, error code elsewhere
2779 static int cdns3_gadget_udc_start(struct usb_gadget
*gadget
,
2780 struct usb_gadget_driver
*driver
)
2782 struct cdns3_device
*priv_dev
= gadget_to_cdns3_device(gadget
);
2783 unsigned long flags
;
2784 enum usb_device_speed max_speed
= driver
->max_speed
;
2786 spin_lock_irqsave(&priv_dev
->lock
, flags
);
2787 priv_dev
->gadget_driver
= driver
;
2789 /* limit speed if necessary */
2790 max_speed
= min(driver
->max_speed
, gadget
->max_speed
);
2792 switch (max_speed
) {
2793 case USB_SPEED_FULL
:
2794 writel(USB_CONF_SFORCE_FS
, &priv_dev
->regs
->usb_conf
);
2795 writel(USB_CONF_USB3DIS
, &priv_dev
->regs
->usb_conf
);
2797 case USB_SPEED_HIGH
:
2798 writel(USB_CONF_USB3DIS
, &priv_dev
->regs
->usb_conf
);
2800 case USB_SPEED_SUPER
:
2803 dev_err(priv_dev
->dev
,
2804 "invalid maximum_speed parameter %d\n",
2807 case USB_SPEED_UNKNOWN
:
2808 /* default to superspeed */
2809 max_speed
= USB_SPEED_SUPER
;
2813 cdns3_gadget_config(priv_dev
);
2814 spin_unlock_irqrestore(&priv_dev
->lock
, flags
);
2819 * cdns3_gadget_udc_stop Stops gadget
2820 * @gadget: gadget object
2824 static int cdns3_gadget_udc_stop(struct usb_gadget
*gadget
)
2826 struct cdns3_device
*priv_dev
= gadget_to_cdns3_device(gadget
);
2827 struct cdns3_endpoint
*priv_ep
;
2828 u32 bEndpointAddress
;
2832 priv_dev
->gadget_driver
= NULL
;
2834 priv_dev
->onchip_used_size
= 0;
2835 priv_dev
->out_mem_is_allocated
= 0;
2836 priv_dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
2838 list_for_each_entry(ep
, &priv_dev
->gadget
.ep_list
, ep_list
) {
2839 priv_ep
= ep_to_cdns3_ep(ep
);
2840 bEndpointAddress
= priv_ep
->num
| priv_ep
->dir
;
2841 cdns3_select_ep(priv_dev
, bEndpointAddress
);
2842 writel(EP_CMD_EPRST
, &priv_dev
->regs
->ep_cmd
);
2843 readl_poll_timeout_atomic(&priv_dev
->regs
->ep_cmd
, val
,
2844 !(val
& EP_CMD_EPRST
), 1, 100);
2846 priv_ep
->flags
&= ~EP_CLAIMED
;
2849 /* disable interrupt for device */
2850 writel(0, &priv_dev
->regs
->usb_ien
);
2851 writel(USB_CONF_DEVDS
, &priv_dev
->regs
->usb_conf
);
2856 static const struct usb_gadget_ops cdns3_gadget_ops
= {
2857 .get_frame
= cdns3_gadget_get_frame
,
2858 .wakeup
= cdns3_gadget_wakeup
,
2859 .set_selfpowered
= cdns3_gadget_set_selfpowered
,
2860 .pullup
= cdns3_gadget_pullup
,
2861 .udc_start
= cdns3_gadget_udc_start
,
2862 .udc_stop
= cdns3_gadget_udc_stop
,
2863 .match_ep
= cdns3_gadget_match_ep
,
2866 static void cdns3_free_all_eps(struct cdns3_device
*priv_dev
)
2870 /* ep0 OUT point to ep0 IN. */
2871 priv_dev
->eps
[16] = NULL
;
2873 for (i
= 0; i
< CDNS3_ENDPOINTS_MAX_COUNT
; i
++)
2874 if (priv_dev
->eps
[i
]) {
2875 cdns3_free_trb_pool(priv_dev
->eps
[i
]);
2876 devm_kfree(priv_dev
->dev
, priv_dev
->eps
[i
]);
2881 * cdns3_init_eps Initializes software endpoints of gadget
2882 * @cdns3: extended gadget object
2884 * Returns 0 on success, error code elsewhere
2886 static int cdns3_init_eps(struct cdns3_device
*priv_dev
)
2888 u32 ep_enabled_reg
, iso_ep_reg
;
2889 struct cdns3_endpoint
*priv_ep
;
2890 int ep_dir
, ep_number
;
2895 /* Read it from USB_CAP3 to USB_CAP5 */
2896 ep_enabled_reg
= readl(&priv_dev
->regs
->usb_cap3
);
2897 iso_ep_reg
= readl(&priv_dev
->regs
->usb_cap4
);
2899 dev_dbg(priv_dev
->dev
, "Initializing non-zero endpoints\n");
2901 for (i
= 0; i
< CDNS3_ENDPOINTS_MAX_COUNT
; i
++) {
2902 ep_dir
= i
>> 4; /* i div 16 */
2903 ep_number
= i
& 0xF; /* i % 16 */
2906 if (!(ep_enabled_reg
& ep_mask
))
2909 if (ep_dir
&& !ep_number
) {
2910 priv_dev
->eps
[i
] = priv_dev
->eps
[0];
2914 priv_ep
= devm_kzalloc(priv_dev
->dev
, sizeof(*priv_ep
),
2919 /* set parent of endpoint object */
2920 priv_ep
->cdns3_dev
= priv_dev
;
2921 priv_dev
->eps
[i
] = priv_ep
;
2922 priv_ep
->num
= ep_number
;
2923 priv_ep
->dir
= ep_dir
? USB_DIR_IN
: USB_DIR_OUT
;
2926 ret
= cdns3_init_ep0(priv_dev
, priv_ep
);
2928 dev_err(priv_dev
->dev
, "Failed to init ep0\n");
2932 snprintf(priv_ep
->name
, sizeof(priv_ep
->name
), "ep%d%s",
2933 ep_number
, !!ep_dir
? "in" : "out");
2934 priv_ep
->endpoint
.name
= priv_ep
->name
;
2936 usb_ep_set_maxpacket_limit(&priv_ep
->endpoint
,
2937 CDNS3_EP_MAX_PACKET_LIMIT
);
2938 priv_ep
->endpoint
.max_streams
= CDNS3_EP_MAX_STREAMS
;
2939 priv_ep
->endpoint
.ops
= &cdns3_gadget_ep_ops
;
2941 priv_ep
->endpoint
.caps
.dir_in
= 1;
2943 priv_ep
->endpoint
.caps
.dir_out
= 1;
2945 if (iso_ep_reg
& ep_mask
)
2946 priv_ep
->endpoint
.caps
.type_iso
= 1;
2948 priv_ep
->endpoint
.caps
.type_bulk
= 1;
2949 priv_ep
->endpoint
.caps
.type_int
= 1;
2951 list_add_tail(&priv_ep
->endpoint
.ep_list
,
2952 &priv_dev
->gadget
.ep_list
);
2957 dev_info(priv_dev
->dev
, "Initialized %s support: %s %s\n",
2959 priv_ep
->endpoint
.caps
.type_bulk
? "BULK, INT" : "",
2960 priv_ep
->endpoint
.caps
.type_iso
? "ISO" : "");
2962 INIT_LIST_HEAD(&priv_ep
->pending_req_list
);
2963 INIT_LIST_HEAD(&priv_ep
->deferred_req_list
);
2964 INIT_LIST_HEAD(&priv_ep
->wa2_descmiss_req_list
);
2969 cdns3_free_all_eps(priv_dev
);
2973 void cdns3_gadget_exit(struct cdns3
*cdns
)
2975 struct cdns3_device
*priv_dev
;
2977 priv_dev
= cdns
->gadget_dev
;
2979 devm_free_irq(cdns
->dev
, cdns
->dev_irq
, priv_dev
);
2981 pm_runtime_mark_last_busy(cdns
->dev
);
2982 pm_runtime_put_autosuspend(cdns
->dev
);
2984 usb_del_gadget_udc(&priv_dev
->gadget
);
2986 cdns3_free_all_eps(priv_dev
);
2988 while (!list_empty(&priv_dev
->aligned_buf_list
)) {
2989 struct cdns3_aligned_buf
*buf
;
2991 buf
= cdns3_next_align_buf(&priv_dev
->aligned_buf_list
);
2992 dma_free_coherent(priv_dev
->sysdev
, buf
->size
,
2996 list_del(&buf
->list
);
3000 dma_free_coherent(priv_dev
->sysdev
, 8, priv_dev
->setup_buf
,
3001 priv_dev
->setup_dma
);
3003 kfree(priv_dev
->zlp_buf
);
3005 cdns
->gadget_dev
= NULL
;
3006 cdns3_drd_switch_gadget(cdns
, 0);
3009 static int cdns3_gadget_start(struct cdns3
*cdns
)
3011 struct cdns3_device
*priv_dev
;
3015 priv_dev
= kzalloc(sizeof(*priv_dev
), GFP_KERNEL
);
3019 cdns
->gadget_dev
= priv_dev
;
3020 priv_dev
->sysdev
= cdns
->dev
;
3021 priv_dev
->dev
= cdns
->dev
;
3022 priv_dev
->regs
= cdns
->dev_regs
;
3024 device_property_read_u16(priv_dev
->dev
, "cdns,on-chip-buff-size",
3025 &priv_dev
->onchip_buffers
);
3027 if (priv_dev
->onchip_buffers
<= 0) {
3028 u32 reg
= readl(&priv_dev
->regs
->usb_cap2
);
3030 priv_dev
->onchip_buffers
= USB_CAP2_ACTUAL_MEM_SIZE(reg
);
3033 if (!priv_dev
->onchip_buffers
)
3034 priv_dev
->onchip_buffers
= 256;
3036 max_speed
= usb_get_maximum_speed(cdns
->dev
);
3038 /* Check the maximum_speed parameter */
3039 switch (max_speed
) {
3040 case USB_SPEED_FULL
:
3041 case USB_SPEED_HIGH
:
3042 case USB_SPEED_SUPER
:
3045 dev_err(cdns
->dev
, "invalid maximum_speed parameter %d\n",
3048 case USB_SPEED_UNKNOWN
:
3049 /* default to superspeed */
3050 max_speed
= USB_SPEED_SUPER
;
3054 /* fill gadget fields */
3055 priv_dev
->gadget
.max_speed
= max_speed
;
3056 priv_dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
3057 priv_dev
->gadget
.ops
= &cdns3_gadget_ops
;
3058 priv_dev
->gadget
.name
= "usb-ss-gadget";
3059 priv_dev
->gadget
.sg_supported
= 1;
3060 priv_dev
->gadget
.quirk_avoids_skb_reserve
= 1;
3062 spin_lock_init(&priv_dev
->lock
);
3063 INIT_WORK(&priv_dev
->pending_status_wq
,
3064 cdns3_pending_setup_status_handler
);
3066 INIT_WORK(&priv_dev
->aligned_buf_wq
,
3067 cdns3_free_aligned_request_buf
);
3069 /* initialize endpoint container */
3070 INIT_LIST_HEAD(&priv_dev
->gadget
.ep_list
);
3071 INIT_LIST_HEAD(&priv_dev
->aligned_buf_list
);
3073 ret
= cdns3_init_eps(priv_dev
);
3075 dev_err(priv_dev
->dev
, "Failed to create endpoints\n");
3079 /* allocate memory for setup packet buffer */
3080 priv_dev
->setup_buf
= dma_alloc_coherent(priv_dev
->sysdev
, 8,
3081 &priv_dev
->setup_dma
, GFP_DMA
);
3082 if (!priv_dev
->setup_buf
) {
3087 priv_dev
->dev_ver
= readl(&priv_dev
->regs
->usb_cap6
);
3089 dev_dbg(priv_dev
->dev
, "Device Controller version: %08x\n",
3090 readl(&priv_dev
->regs
->usb_cap6
));
3091 dev_dbg(priv_dev
->dev
, "USB Capabilities:: %08x\n",
3092 readl(&priv_dev
->regs
->usb_cap1
));
3093 dev_dbg(priv_dev
->dev
, "On-Chip memory configuration: %08x\n",
3094 readl(&priv_dev
->regs
->usb_cap2
));
3096 priv_dev
->dev_ver
= GET_DEV_BASE_VERSION(priv_dev
->dev_ver
);
3098 priv_dev
->zlp_buf
= kzalloc(CDNS3_EP_ZLP_BUF_SIZE
, GFP_KERNEL
);
3099 if (!priv_dev
->zlp_buf
) {
3104 /* add USB gadget device */
3105 ret
= usb_add_gadget_udc(priv_dev
->dev
, &priv_dev
->gadget
);
3107 dev_err(priv_dev
->dev
,
3108 "Failed to register USB device controller\n");
3114 kfree(priv_dev
->zlp_buf
);
3116 dma_free_coherent(priv_dev
->sysdev
, 8, priv_dev
->setup_buf
,
3117 priv_dev
->setup_dma
);
3119 cdns3_free_all_eps(priv_dev
);
3121 cdns
->gadget_dev
= NULL
;
3125 static int __cdns3_gadget_init(struct cdns3
*cdns
)
3129 /* Ensure 32-bit DMA Mask in case we switched back from Host mode */
3130 ret
= dma_set_mask_and_coherent(cdns
->dev
, DMA_BIT_MASK(32));
3132 dev_err(cdns
->dev
, "Failed to set dma mask: %d\n", ret
);
3136 cdns3_drd_switch_gadget(cdns
, 1);
3137 pm_runtime_get_sync(cdns
->dev
);
3139 ret
= cdns3_gadget_start(cdns
);
3144 * Because interrupt line can be shared with other components in
3145 * driver it can't use IRQF_ONESHOT flag here.
3147 ret
= devm_request_threaded_irq(cdns
->dev
, cdns
->dev_irq
,
3148 cdns3_device_irq_handler
,
3149 cdns3_device_thread_irq_handler
,
3150 IRQF_SHARED
, dev_name(cdns
->dev
),
3158 cdns3_gadget_exit(cdns
);
3162 static int cdns3_gadget_suspend(struct cdns3
*cdns
, bool do_wakeup
)
3164 struct cdns3_device
*priv_dev
= cdns
->gadget_dev
;
3166 cdns3_disconnect_gadget(priv_dev
);
3168 priv_dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
3169 usb_gadget_set_state(&priv_dev
->gadget
, USB_STATE_NOTATTACHED
);
3170 cdns3_hw_reset_eps_config(priv_dev
);
3172 /* disable interrupt for device */
3173 writel(0, &priv_dev
->regs
->usb_ien
);
3178 static int cdns3_gadget_resume(struct cdns3
*cdns
, bool hibernated
)
3180 struct cdns3_device
*priv_dev
= cdns
->gadget_dev
;
3182 if (!priv_dev
->gadget_driver
)
3185 cdns3_gadget_config(priv_dev
);
3191 * cdns3_gadget_init - initialize device structure
3193 * cdns: cdns3 instance
3195 * This function initializes the gadget.
3197 int cdns3_gadget_init(struct cdns3
*cdns
)
3199 struct cdns3_role_driver
*rdrv
;
3201 rdrv
= devm_kzalloc(cdns
->dev
, sizeof(*rdrv
), GFP_KERNEL
);
3205 rdrv
->start
= __cdns3_gadget_init
;
3206 rdrv
->stop
= cdns3_gadget_exit
;
3207 rdrv
->suspend
= cdns3_gadget_suspend
;
3208 rdrv
->resume
= cdns3_gadget_resume
;
3209 rdrv
->state
= CDNS3_ROLE_STATE_INACTIVE
;
3210 rdrv
->name
= "gadget";
3211 cdns
->roles
[USB_ROLE_DEVICE
] = rdrv
;