drivers/usb/musb/musb_dsps.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Texas Instruments DSPS platforms "glue layer"
   4  *
   5  * Copyright (C) 2012, by Texas Instruments
   6  *
   7  * Based on the am35x "glue layer" code.
   8  *
   9  * This file is part of the Inventra Controller Driver for Linux.
  10  *
  11  * musb_dsps.c will be a common file for all the TI DSPS platforms
  12  * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
  13  * For now only ti81x is using this and in future davinci.c, am35x.c
  14  * da8xx.c would be merged to this file after testing.
  15  */
  16
  17 #include <linux/io.h>
  18 #include <linux/err.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/dma-mapping.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/module.h>
  23 #include <linux/usb/usb_phy_generic.h>
  24 #include <linux/platform_data/usb-omap.h>
  25 #include <linux/sizes.h>
  26
  27 #include <linux/of.h>
  28 #include <linux/of_device.h>
  29 #include <linux/of_address.h>
  30 #include <linux/of_irq.h>
  31 #include <linux/usb/of.h>
  32
  33 #include <linux/debugfs.h>
  34
  35 #include "musb_core.h"
  36
  37 static const struct of_device_id musb_dsps_of_match[];
  38
  39 /**
  40  * DSPS musb wrapper register offset.
  41  * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
  42  * musb ips.
  43  */
  44 struct dsps_musb_wrapper {
  45         u16     revision;
  46         u16     control;
  47         u16     status;
  48         u16     epintr_set;
  49         u16     epintr_clear;
  50         u16     epintr_status;
  51         u16     coreintr_set;
  52         u16     coreintr_clear;
  53         u16     coreintr_status;
  54         u16     phy_utmi;
  55         u16     mode;
  56         u16     tx_mode;
  57         u16     rx_mode;
  58
  59         /* bit positions for control */
  60         unsigned        reset:5;
  61
  62         /* bit positions for interrupt */
  63         unsigned        usb_shift:5;
  64         u32             usb_mask;
  65         u32             usb_bitmap;
  66         unsigned        drvvbus:5;
  67
  68         unsigned        txep_shift:5;
  69         u32             txep_mask;
  70         u32             txep_bitmap;
  71
  72         unsigned        rxep_shift:5;
  73         u32             rxep_mask;
  74         u32             rxep_bitmap;
  75
  76         /* bit positions for phy_utmi */
  77         unsigned        otg_disable:5;
  78
  79         /* bit positions for mode */
  80         unsigned        iddig:5;
  81         unsigned        iddig_mux:5;
  82         /* miscellaneous stuff */
  83         unsigned        poll_timeout;
  84 };
  85
  86 /*
  87  * register shadow for suspend
  88  */
  89 struct dsps_context {
  90         u32 control;
  91         u32 epintr;
  92         u32 coreintr;
  93         u32 phy_utmi;
  94         u32 mode;
  95         u32 tx_mode;
  96         u32 rx_mode;
  97 };
  98
  99 /**
 100  * DSPS glue structure.
 101  */
 102 struct dsps_glue {
 103         struct device *dev;
 104         struct platform_device *musb;   /* child musb pdev */
 105         const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
 106         int vbus_irq;                   /* optional vbus irq */
 107         unsigned long last_timer;    /* last timer data for each instance */
 108         bool sw_babble_enabled;
 109         void __iomem *usbss_base;
 110
 111         struct dsps_context context;
 112         struct debugfs_regset32 regset;
 113         struct dentry *dbgfs_root;
 114 };
 115
 116 static const struct debugfs_reg32 dsps_musb_regs[] = {
 117         { "revision",           0x00 },
 118         { "control",            0x14 },
 119         { "status",             0x18 },
 120         { "eoi",                0x24 },
 121         { "intr0_stat",         0x30 },
 122         { "intr1_stat",         0x34 },
 123         { "intr0_set",          0x38 },
 124         { "intr1_set",          0x3c },
 125         { "txmode",             0x70 },
 126         { "rxmode",             0x74 },
 127         { "autoreq",            0xd0 },
 128         { "srpfixtime",         0xd4 },
 129         { "tdown",              0xd8 },
 130         { "phy_utmi",           0xe0 },
 131         { "mode",               0xe8 },
 132 };
 133
 134 static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms)
 135 {
 136         struct musb *musb = platform_get_drvdata(glue->musb);
 137         int wait;
 138
 139         if (wait_ms < 0)
 140                 wait = msecs_to_jiffies(glue->wrp->poll_timeout);
 141         else
 142                 wait = msecs_to_jiffies(wait_ms);
 143
 144         mod_timer(&musb->dev_timer, jiffies + wait);
 145 }
 146
 147 /*
 148  * If no vbus irq from the PMIC is configured, we need to poll VBUS status.
 149  */
 150 static void dsps_mod_timer_optional(struct dsps_glue *glue)
 151 {
 152         if (glue->vbus_irq)
 153                 return;
 154
 155         dsps_mod_timer(glue, -1);
 156 }
 157
 158 /* USBSS  / USB AM335x */
 159 #define USBSS_IRQ_STATUS        0x28
 160 #define USBSS_IRQ_ENABLER       0x2c
 161 #define USBSS_IRQ_CLEARR        0x30
 162
 163 #define USBSS_IRQ_PD_COMP       (1 << 2)
 164
 165 /**
 166  * dsps_musb_enable - enable interrupts
 167  */
 168 static void dsps_musb_enable(struct musb *musb)
 169 {
 170         struct device *dev = musb->controller;
 171         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 172         const struct dsps_musb_wrapper *wrp = glue->wrp;
 173         void __iomem *reg_base = musb->ctrl_base;
 174         u32 epmask, coremask;
 175
 176         /* Workaround: setup IRQs through both register sets. */
 177         epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
 178                ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
 179         coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
 180
 181         musb_writel(reg_base, wrp->epintr_set, epmask);
 182         musb_writel(reg_base, wrp->coreintr_set, coremask);
 183         /*
 184          * start polling for runtime PM active and idle,
 185          * and for ID change in dual-role idle mode.
 186          */
 187         if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
 188                 dsps_mod_timer(glue, -1);
 189 }
 190
 191 /**
 192  * dsps_musb_disable - disable HDRC and flush interrupts
 193  */
 194 static void dsps_musb_disable(struct musb *musb)
 195 {
 196         struct device *dev = musb->controller;
 197         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 198         const struct dsps_musb_wrapper *wrp = glue->wrp;
 199         void __iomem *reg_base = musb->ctrl_base;
 200
 201         musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
 202         musb_writel(reg_base, wrp->epintr_clear,
 203                          wrp->txep_bitmap | wrp->rxep_bitmap);
 204         del_timer_sync(&musb->dev_timer);
 205 }
 206
 207 /* Caller must take musb->lock */
 208 static int dsps_check_status(struct musb *musb, void *unused)
 209 {
 210         void __iomem *mregs = musb->mregs;
 211         struct device *dev = musb->controller;
 212         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 213         const struct dsps_musb_wrapper *wrp = glue->wrp;
 214         u8 devctl;
 215         int skip_session = 0;
 216
 217         if (glue->vbus_irq)
 218                 del_timer(&musb->dev_timer);
 219
 220         /*
 221          * We poll because DSPS IP's won't expose several OTG-critical
 222          * status change events (from the transceiver) otherwise.
 223          */
 224         devctl = musb_readb(mregs, MUSB_DEVCTL);
 225         dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
 226                                 usb_otg_state_string(musb->xceiv->otg->state));
 227
 228         switch (musb->xceiv->otg->state) {
 229         case OTG_STATE_A_WAIT_VRISE:
 230                 if (musb->port_mode == MUSB_HOST) {
 231                         musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
 232                         dsps_mod_timer_optional(glue);
 233                         break;
 234                 }
 235                 /* fall through */
 236
 237         case OTG_STATE_A_WAIT_BCON:
 238                 /* keep VBUS on for host-only mode */
 239                 if (musb->port_mode == MUSB_HOST) {
 240                         dsps_mod_timer_optional(glue);
 241                         break;
 242                 }
 243                 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
 244                 skip_session = 1;
 245                 /* fall through */
 246
 247         case OTG_STATE_A_IDLE:
 248         case OTG_STATE_B_IDLE:
 249                 if (!glue->vbus_irq) {
 250                         if (devctl & MUSB_DEVCTL_BDEVICE) {
 251                                 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
 252                                 MUSB_DEV_MODE(musb);
 253                         } else {
 254                                 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
 255                                 MUSB_HST_MODE(musb);
 256                         }
 257
 258                         if (musb->port_mode == MUSB_PERIPHERAL)
 259                                 skip_session = 1;
 260
 261                         if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
 262                                 musb_writeb(mregs, MUSB_DEVCTL,
 263                                             MUSB_DEVCTL_SESSION);
 264                 }
 265                 dsps_mod_timer_optional(glue);
 266                 break;
 267         case OTG_STATE_A_WAIT_VFALL:
 268                 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
 269                 musb_writel(musb->ctrl_base, wrp->coreintr_set,
 270                             MUSB_INTR_VBUSERROR << wrp->usb_shift);
 271                 break;
 272         default:
 273                 break;
 274         }
 275
 276         return 0;
 277 }
 278
 279 static void otg_timer(struct timer_list *t)
 280 {
 281         struct musb *musb = from_timer(musb, t, dev_timer);
 282         struct device *dev = musb->controller;
 283         unsigned long flags;
 284         int err;
 285
 286         err = pm_runtime_get(dev);
 287         if ((err != -EINPROGRESS) && err < 0) {
 288                 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err);
 289                 pm_runtime_put_noidle(dev);
 290
 291                 return;
 292         }
 293
 294         spin_lock_irqsave(&musb->lock, flags);
 295         err = musb_queue_resume_work(musb, dsps_check_status, NULL);
 296         if (err < 0)
 297                 dev_err(dev, "%s resume work: %i\n", __func__, err);
 298         spin_unlock_irqrestore(&musb->lock, flags);
 299         pm_runtime_mark_last_busy(dev);
 300         pm_runtime_put_autosuspend(dev);
 301 }
 302
 303 static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum)
 304 {
 305         u32 epintr;
 306         struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
 307         const struct dsps_musb_wrapper *wrp = glue->wrp;
 308
 309         /* musb->lock might already been held */
 310         epintr = (1 << epnum) << wrp->rxep_shift;
 311         musb_writel(musb->ctrl_base, wrp->epintr_status, epintr);
 312 }
 313
 314 static irqreturn_t dsps_interrupt(int irq, void *hci)
 315 {
 316         struct musb  *musb = hci;
 317         void __iomem *reg_base = musb->ctrl_base;
 318         struct device *dev = musb->controller;
 319         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 320         const struct dsps_musb_wrapper *wrp = glue->wrp;
 321         unsigned long flags;
 322         irqreturn_t ret = IRQ_NONE;
 323         u32 epintr, usbintr;
 324
 325         spin_lock_irqsave(&musb->lock, flags);
 326
 327         /* Get endpoint interrupts */
 328         epintr = musb_readl(reg_base, wrp->epintr_status);
 329         musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
 330         musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
 331
 332         if (epintr)
 333                 musb_writel(reg_base, wrp->epintr_status, epintr);
 334
 335         /* Get usb core interrupts */
 336         usbintr = musb_readl(reg_base, wrp->coreintr_status);
 337         if (!usbintr && !epintr)
 338                 goto out;
 339
 340         musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
 341         if (usbintr)
 342                 musb_writel(reg_base, wrp->coreintr_status, usbintr);
 343
 344         dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
 345                         usbintr, epintr);
 346
 347         if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
 348                 int drvvbus = musb_readl(reg_base, wrp->status);
 349                 void __iomem *mregs = musb->mregs;
 350                 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
 351                 int err;
 352
 353                 err = musb->int_usb & MUSB_INTR_VBUSERROR;
 354                 if (err) {
 355                         /*
 356                          * The Mentor core doesn't debounce VBUS as needed
 357                          * to cope with device connect current spikes. This
 358                          * means it's not uncommon for bus-powered devices
 359                          * to get VBUS errors during enumeration.
 360                          *
 361                          * This is a workaround, but newer RTL from Mentor
 362                          * seems to allow a better one: "re"-starting sessions
 363                          * without waiting for VBUS to stop registering in
 364                          * devctl.
 365                          */
 366                         musb->int_usb &= ~MUSB_INTR_VBUSERROR;
 367                         musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
 368                         dsps_mod_timer_optional(glue);
 369                         WARNING("VBUS error workaround (delay coming)\n");
 370                 } else if (drvvbus) {
 371                         MUSB_HST_MODE(musb);
 372                         musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
 373                         dsps_mod_timer_optional(glue);
 374                 } else {
 375                         musb->is_active = 0;
 376                         MUSB_DEV_MODE(musb);
 377                         musb->xceiv->otg->state = OTG_STATE_B_IDLE;
 378                 }
 379
 380                 /* NOTE: this must complete power-on within 100 ms. */
 381                 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
 382                                 drvvbus ? "on" : "off",
 383                                 usb_otg_state_string(musb->xceiv->otg->state),
 384                                 err ? " ERROR" : "",
 385                                 devctl);
 386                 ret = IRQ_HANDLED;
 387         }
 388
 389         if (musb->int_tx || musb->int_rx || musb->int_usb)
 390                 ret |= musb_interrupt(musb);
 391
 392         /* Poll for ID change and connect */
 393         switch (musb->xceiv->otg->state) {
 394         case OTG_STATE_B_IDLE:
 395         case OTG_STATE_A_WAIT_BCON:
 396                 dsps_mod_timer_optional(glue);
 397                 break;
 398         default:
 399                 break;
 400         }
 401
 402 out:
 403         spin_unlock_irqrestore(&musb->lock, flags);
 404
 405         return ret;
 406 }
 407
 408 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
 409 {
 410         struct dentry *root;
 411         char buf[128];
 412
 413         sprintf(buf, "%s.dsps", dev_name(musb->controller));
 414         root = debugfs_create_dir(buf, usb_debug_root);
 415         glue->dbgfs_root = root;
 416
 417         glue->regset.regs = dsps_musb_regs;
 418         glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
 419         glue->regset.base = musb->ctrl_base;
 420
 421         debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
 422         return 0;
 423 }
 424
 425 static int dsps_musb_init(struct musb *musb)
 426 {
 427         struct device *dev = musb->controller;
 428         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 429         struct platform_device *parent = to_platform_device(dev->parent);
 430         const struct dsps_musb_wrapper *wrp = glue->wrp;
 431         void __iomem *reg_base;
 432         struct resource *r;
 433         u32 rev, val;
 434         int ret;
 435
 436         r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
 437         reg_base = devm_ioremap_resource(dev, r);
 438         if (IS_ERR(reg_base))
 439                 return PTR_ERR(reg_base);
 440         musb->ctrl_base = reg_base;
 441
 442         /* NOP driver needs change if supporting dual instance */
 443         musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
 444         if (IS_ERR(musb->xceiv))
 445                 return PTR_ERR(musb->xceiv);
 446
 447         musb->phy = devm_phy_get(dev->parent, "usb2-phy");
 448
 449         /* Returns zero if e.g. not clocked */
 450         rev = musb_readl(reg_base, wrp->revision);
 451         if (!rev)
 452                 return -ENODEV;
 453
 454         if (IS_ERR(musb->phy))  {
 455                 musb->phy = NULL;
 456         } else {
 457                 ret = phy_init(musb->phy);
 458                 if (ret < 0)
 459                         return ret;
 460                 ret = phy_power_on(musb->phy);
 461                 if (ret) {
 462                         phy_exit(musb->phy);
 463                         return ret;
 464                 }
 465         }
 466
 467         timer_setup(&musb->dev_timer, otg_timer, 0);
 468
 469         /* Reset the musb */
 470         musb_writel(reg_base, wrp->control, (1 << wrp->reset));
 471
 472         musb->isr = dsps_interrupt;
 473
 474         /* reset the otgdisable bit, needed for host mode to work */
 475         val = musb_readl(reg_base, wrp->phy_utmi);
 476         val &= ~(1 << wrp->otg_disable);
 477         musb_writel(musb->ctrl_base, wrp->phy_utmi, val);
 478
 479         /*
 480          *  Check whether the dsps version has babble control enabled.
 481          * In latest silicon revision the babble control logic is enabled.
 482          * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
 483          * logic enabled.
 484          */
 485         val = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
 486         if (val & MUSB_BABBLE_RCV_DISABLE) {
 487                 glue->sw_babble_enabled = true;
 488                 val |= MUSB_BABBLE_SW_SESSION_CTRL;
 489                 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
 490         }
 491
 492         dsps_mod_timer(glue, -1);
 493
 494         return dsps_musb_dbg_init(musb, glue);
 495 }
 496
 497 static int dsps_musb_exit(struct musb *musb)
 498 {
 499         struct device *dev = musb->controller;
 500         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 501
 502         del_timer_sync(&musb->dev_timer);
 503         phy_power_off(musb->phy);
 504         phy_exit(musb->phy);
 505         debugfs_remove_recursive(glue->dbgfs_root);
 506
 507         return 0;
 508 }
 509
 510 static int dsps_musb_set_mode(struct musb *musb, u8 mode)
 511 {
 512         struct device *dev = musb->controller;
 513         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 514         const struct dsps_musb_wrapper *wrp = glue->wrp;
 515         void __iomem *ctrl_base = musb->ctrl_base;
 516         u32 reg;
 517
 518         reg = musb_readl(ctrl_base, wrp->mode);
 519
 520         switch (mode) {
 521         case MUSB_HOST:
 522                 reg &= ~(1 << wrp->iddig);
 523
 524                 /*
 525                  * if we're setting mode to host-only or device-only, we're
 526                  * going to ignore whatever the PHY sends us and just force
 527                  * ID pin status by SW
 528                  */
 529                 reg |= (1 << wrp->iddig_mux);
 530
 531                 musb_writel(ctrl_base, wrp->mode, reg);
 532                 musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
 533                 break;
 534         case MUSB_PERIPHERAL:
 535                 reg |= (1 << wrp->iddig);
 536
 537                 /*
 538                  * if we're setting mode to host-only or device-only, we're
 539                  * going to ignore whatever the PHY sends us and just force
 540                  * ID pin status by SW
 541                  */
 542                 reg |= (1 << wrp->iddig_mux);
 543
 544                 musb_writel(ctrl_base, wrp->mode, reg);
 545                 break;
 546         case MUSB_OTG:
 547                 musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
 548                 break;
 549         default:
 550                 dev_err(glue->dev, "unsupported mode %d\n", mode);
 551                 return -EINVAL;
 552         }
 553
 554         return 0;
 555 }
 556
 557 static bool dsps_sw_babble_control(struct musb *musb)
 558 {
 559         u8 babble_ctl;
 560         bool session_restart =  false;
 561
 562         babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
 563         dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
 564                 babble_ctl);
 565         /*
 566          * check line monitor flag to check whether babble is
 567          * due to noise
 568          */
 569         dev_dbg(musb->controller, "STUCK_J is %s\n",
 570                 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
 571
 572         if (babble_ctl & MUSB_BABBLE_STUCK_J) {
 573                 int timeout = 10;
 574
 575                 /*
 576                  * babble is due to noise, then set transmit idle (d7 bit)
 577                  * to resume normal operation
 578                  */
 579                 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
 580                 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
 581                 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
 582
 583                 /* wait till line monitor flag cleared */
 584                 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
 585                 do {
 586                         babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
 587                         udelay(1);
 588                 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
 589
 590                 /* check whether stuck_at_j bit cleared */
 591                 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
 592                         /*
 593                          * real babble condition has occurred
 594                          * restart the controller to start the
 595                          * session again
 596                          */
 597                         dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
 598                                 babble_ctl);
 599                         session_restart = true;
 600                 }
 601         } else {
 602                 session_restart = true;
 603         }
 604
 605         return session_restart;
 606 }
 607
 608 static int dsps_musb_recover(struct musb *musb)
 609 {
 610         struct device *dev = musb->controller;
 611         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 612         int session_restart = 0;
 613
 614         if (glue->sw_babble_enabled)
 615                 session_restart = dsps_sw_babble_control(musb);
 616         else
 617                 session_restart = 1;
 618
 619         return session_restart ? 0 : -EPIPE;
 620 }
 621
 622 /* Similar to am35x, dm81xx support only 32-bit read operation */
 623 static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
 624 {
 625         void __iomem *fifo = hw_ep->fifo;
 626
 627         if (len >= 4) {
 628                 ioread32_rep(fifo, dst, len >> 2);
 629                 dst += len & ~0x03;
 630                 len &= 0x03;
 631         }
 632
 633         /* Read any remaining 1 to 3 bytes */
 634         if (len > 0) {
 635                 u32 val = musb_readl(fifo, 0);
 636                 memcpy(dst, &val, len);
 637         }
 638 }
 639
 640 #ifdef CONFIG_USB_TI_CPPI41_DMA
 641 static void dsps_dma_controller_callback(struct dma_controller *c)
 642 {
 643         struct musb *musb = c->musb;
 644         struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
 645         void __iomem *usbss_base = glue->usbss_base;
 646         u32 status;
 647
 648         status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
 649         if (status & USBSS_IRQ_PD_COMP)
 650                 musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP);
 651 }
 652
 653 static struct dma_controller *
 654 dsps_dma_controller_create(struct musb *musb, void __iomem *base)
 655 {
 656         struct dma_controller *controller;
 657         struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
 658         void __iomem *usbss_base = glue->usbss_base;
 659
 660         controller = cppi41_dma_controller_create(musb, base);
 661         if (IS_ERR_OR_NULL(controller))
 662                 return controller;
 663
 664         musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
 665         controller->dma_callback = dsps_dma_controller_callback;
 666
 667         return controller;
 668 }
 669
 670 #ifdef CONFIG_PM_SLEEP
 671 static void dsps_dma_controller_suspend(struct dsps_glue *glue)
 672 {
 673         void __iomem *usbss_base = glue->usbss_base;
 674
 675         musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
 676 }
 677
 678 static void dsps_dma_controller_resume(struct dsps_glue *glue)
 679 {
 680         void __iomem *usbss_base = glue->usbss_base;
 681
 682         musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
 683 }
 684 #endif
 685 #else /* CONFIG_USB_TI_CPPI41_DMA */
 686 #ifdef CONFIG_PM_SLEEP
 687 static void dsps_dma_controller_suspend(struct dsps_glue *glue) {}
 688 static void dsps_dma_controller_resume(struct dsps_glue *glue) {}
 689 #endif
 690 #endif /* CONFIG_USB_TI_CPPI41_DMA */
 691
 692 static struct musb_platform_ops dsps_ops = {
 693         .quirks         = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
 694         .init           = dsps_musb_init,
 695         .exit           = dsps_musb_exit,
 696
 697 #ifdef CONFIG_USB_TI_CPPI41_DMA
 698         .dma_init       = dsps_dma_controller_create,
 699         .dma_exit       = cppi41_dma_controller_destroy,
 700 #endif
 701         .enable         = dsps_musb_enable,
 702         .disable        = dsps_musb_disable,
 703
 704         .set_mode       = dsps_musb_set_mode,
 705         .recover        = dsps_musb_recover,
 706         .clear_ep_rxintr = dsps_musb_clear_ep_rxintr,
 707 };
 708
 709 static u64 musb_dmamask = DMA_BIT_MASK(32);
 710
 711 static int get_int_prop(struct device_node *dn, const char *s)
 712 {
 713         int ret;
 714         u32 val;
 715
 716         ret = of_property_read_u32(dn, s, &val);
 717         if (ret)
 718                 return 0;
 719         return val;
 720 }
 721
 722 static int dsps_create_musb_pdev(struct dsps_glue *glue,
 723                 struct platform_device *parent)
 724 {
 725         struct musb_hdrc_platform_data pdata;
 726         struct resource resources[2];
 727         struct resource *res;
 728         struct device *dev = &parent->dev;
 729         struct musb_hdrc_config *config;
 730         struct platform_device *musb;
 731         struct device_node *dn = parent->dev.of_node;
 732         int ret, val;
 733
 734         memset(resources, 0, sizeof(resources));
 735         res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
 736         if (!res) {
 737                 dev_err(dev, "failed to get memory.\n");
 738                 return -EINVAL;
 739         }
 740         resources[0] = *res;
 741
 742         res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
 743         if (!res) {
 744                 dev_err(dev, "failed to get irq.\n");
 745                 return -EINVAL;
 746         }
 747         resources[1] = *res;
 748
 749         /* allocate the child platform device */
 750         musb = platform_device_alloc("musb-hdrc",
 751                         (resources[0].start & 0xFFF) == 0x400 ? 0 : 1);
 752         if (!musb) {
 753                 dev_err(dev, "failed to allocate musb device\n");
 754                 return -ENOMEM;
 755         }
 756
 757         musb->dev.parent                = dev;
 758         musb->dev.dma_mask              = &musb_dmamask;
 759         musb->dev.coherent_dma_mask     = musb_dmamask;
 760         device_set_of_node_from_dev(&musb->dev, &parent->dev);
 761
 762         glue->musb = musb;
 763
 764         ret = platform_device_add_resources(musb, resources,
 765                         ARRAY_SIZE(resources));
 766         if (ret) {
 767                 dev_err(dev, "failed to add resources\n");
 768                 goto err;
 769         }
 770
 771         config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
 772         if (!config) {
 773                 ret = -ENOMEM;
 774                 goto err;
 775         }
 776         pdata.config = config;
 777         pdata.platform_ops = &dsps_ops;
 778
 779         config->num_eps = get_int_prop(dn, "mentor,num-eps");
 780         config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
 781         config->host_port_deassert_reset_at_resume = 1;
 782         pdata.mode = musb_get_mode(dev);
 783         /* DT keeps this entry in mA, musb expects it as per USB spec */
 784         pdata.power = get_int_prop(dn, "mentor,power") / 2;
 785
 786         ret = of_property_read_u32(dn, "mentor,multipoint", &val);
 787         if (!ret && val)
 788                 config->multipoint = true;
 789
 790         config->maximum_speed = usb_get_maximum_speed(&parent->dev);
 791         switch (config->maximum_speed) {
 792         case USB_SPEED_LOW:
 793         case USB_SPEED_FULL:
 794                 break;
 795         case USB_SPEED_SUPER:
 796                 dev_warn(dev, "ignore incorrect maximum_speed "
 797                                 "(super-speed) setting in dts");
 798                 /* fall through */
 799         default:
 800                 config->maximum_speed = USB_SPEED_HIGH;
 801         }
 802
 803         ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
 804         if (ret) {
 805                 dev_err(dev, "failed to add platform_data\n");
 806                 goto err;
 807         }
 808
 809         ret = platform_device_add(musb);
 810         if (ret) {
 811                 dev_err(dev, "failed to register musb device\n");
 812                 goto err;
 813         }
 814         return 0;
 815
 816 err:
 817         platform_device_put(musb);
 818         return ret;
 819 }
 820
 821 static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv)
 822 {
 823         struct dsps_glue *glue = priv;
 824         struct musb *musb = platform_get_drvdata(glue->musb);
 825
 826         if (!musb)
 827                 return IRQ_NONE;
 828
 829         dev_dbg(glue->dev, "VBUS interrupt\n");
 830         dsps_mod_timer(glue, 0);
 831
 832         return IRQ_HANDLED;
 833 }
 834
 835 static int dsps_setup_optional_vbus_irq(struct platform_device *pdev,
 836                                         struct dsps_glue *glue)
 837 {
 838         int error;
 839
 840         glue->vbus_irq = platform_get_irq_byname(pdev, "vbus");
 841         if (glue->vbus_irq == -EPROBE_DEFER)
 842                 return -EPROBE_DEFER;
 843
 844         if (glue->vbus_irq <= 0) {
 845                 glue->vbus_irq = 0;
 846                 return 0;
 847         }
 848
 849         error = devm_request_threaded_irq(glue->dev, glue->vbus_irq,
 850                                           NULL, dsps_vbus_threaded_irq,
 851                                           IRQF_ONESHOT,
 852                                           "vbus", glue);
 853         if (error) {
 854                 glue->vbus_irq = 0;
 855                 return error;
 856         }
 857         dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq);
 858
 859         return 0;
 860 }
 861
 862 static int dsps_probe(struct platform_device *pdev)
 863 {
 864         const struct of_device_id *match;
 865         const struct dsps_musb_wrapper *wrp;
 866         struct dsps_glue *glue;
 867         int ret;
 868
 869         if (!strcmp(pdev->name, "musb-hdrc"))
 870                 return -ENODEV;
 871
 872         match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
 873         if (!match) {
 874                 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
 875                 return -EINVAL;
 876         }
 877         wrp = match->data;
 878
 879         if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
 880                 dsps_ops.read_fifo = dsps_read_fifo32;
 881
 882         /* allocate glue */
 883         glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
 884         if (!glue)
 885                 return -ENOMEM;
 886
 887         glue->dev = &pdev->dev;
 888         glue->wrp = wrp;
 889         glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0);
 890         if (!glue->usbss_base)
 891                 return -ENXIO;
 892
 893         if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) {
 894                 ret = dsps_setup_optional_vbus_irq(pdev, glue);
 895                 if (ret)
 896                         goto err_iounmap;
 897         }
 898
 899         platform_set_drvdata(pdev, glue);
 900         pm_runtime_enable(&pdev->dev);
 901         ret = dsps_create_musb_pdev(glue, pdev);
 902         if (ret)
 903                 goto err;
 904
 905         return 0;
 906
 907 err:
 908         pm_runtime_disable(&pdev->dev);
 909 err_iounmap:
 910         iounmap(glue->usbss_base);
 911         return ret;
 912 }
 913
 914 static int dsps_remove(struct platform_device *pdev)
 915 {
 916         struct dsps_glue *glue = platform_get_drvdata(pdev);
 917
 918         platform_device_unregister(glue->musb);
 919
 920         pm_runtime_disable(&pdev->dev);
 921         iounmap(glue->usbss_base);
 922
 923         return 0;
 924 }
 925
 926 static const struct dsps_musb_wrapper am33xx_driver_data = {
 927         .revision               = 0x00,
 928         .control                = 0x14,
 929         .status                 = 0x18,
 930         .epintr_set             = 0x38,
 931         .epintr_clear           = 0x40,
 932         .epintr_status          = 0x30,
 933         .coreintr_set           = 0x3c,
 934         .coreintr_clear         = 0x44,
 935         .coreintr_status        = 0x34,
 936         .phy_utmi               = 0xe0,
 937         .mode                   = 0xe8,
 938         .tx_mode                = 0x70,
 939         .rx_mode                = 0x74,
 940         .reset                  = 0,
 941         .otg_disable            = 21,
 942         .iddig                  = 8,
 943         .iddig_mux              = 7,
 944         .usb_shift              = 0,
 945         .usb_mask               = 0x1ff,
 946         .usb_bitmap             = (0x1ff << 0),
 947         .drvvbus                = 8,
 948         .txep_shift             = 0,
 949         .txep_mask              = 0xffff,
 950         .txep_bitmap            = (0xffff << 0),
 951         .rxep_shift             = 16,
 952         .rxep_mask              = 0xfffe,
 953         .rxep_bitmap            = (0xfffe << 16),
 954         .poll_timeout           = 2000, /* ms */
 955 };
 956
 957 static const struct of_device_id musb_dsps_of_match[] = {
 958         { .compatible = "ti,musb-am33xx",
 959                 .data = &am33xx_driver_data, },
 960         { .compatible = "ti,musb-dm816",
 961                 .data = &am33xx_driver_data, },
 962         {  },
 963 };
 964 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
 965
 966 #ifdef CONFIG_PM_SLEEP
 967 static int dsps_suspend(struct device *dev)
 968 {
 969         struct dsps_glue *glue = dev_get_drvdata(dev);
 970         const struct dsps_musb_wrapper *wrp = glue->wrp;
 971         struct musb *musb = platform_get_drvdata(glue->musb);
 972         void __iomem *mbase;
 973         int ret;
 974
 975         if (!musb)
 976                 /* This can happen if the musb device is in -EPROBE_DEFER */
 977                 return 0;
 978
 979         ret = pm_runtime_get_sync(dev);
 980         if (ret < 0) {
 981                 pm_runtime_put_noidle(dev);
 982                 return ret;
 983         }
 984
 985         del_timer_sync(&musb->dev_timer);
 986
 987         mbase = musb->ctrl_base;
 988         glue->context.control = musb_readl(mbase, wrp->control);
 989         glue->context.epintr = musb_readl(mbase, wrp->epintr_set);
 990         glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set);
 991         glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi);
 992         glue->context.mode = musb_readl(mbase, wrp->mode);
 993         glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode);
 994         glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode);
 995
 996         dsps_dma_controller_suspend(glue);
 997
 998         return 0;
 999 }
1000
1001 static int dsps_resume(struct device *dev)
1002 {
1003         struct dsps_glue *glue = dev_get_drvdata(dev);
1004         const struct dsps_musb_wrapper *wrp = glue->wrp;
1005         struct musb *musb = platform_get_drvdata(glue->musb);
1006         void __iomem *mbase;
1007
1008         if (!musb)
1009                 return 0;
1010
1011         dsps_dma_controller_resume(glue);
1012
1013         mbase = musb->ctrl_base;
1014         musb_writel(mbase, wrp->control, glue->context.control);
1015         musb_writel(mbase, wrp->epintr_set, glue->context.epintr);
1016         musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
1017         musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
1018         musb_writel(mbase, wrp->mode, glue->context.mode);
1019         musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
1020         musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
1021         if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
1022             musb->port_mode == MUSB_OTG)
1023                 dsps_mod_timer(glue, -1);
1024
1025         pm_runtime_put(dev);
1026
1027         return 0;
1028 }
1029 #endif
1030
1031 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
1032
1033 static struct platform_driver dsps_usbss_driver = {
1034         .probe          = dsps_probe,
1035         .remove         = dsps_remove,
1036         .driver         = {
1037                 .name   = "musb-dsps",
1038                 .pm     = &dsps_pm_ops,
1039                 .of_match_table = musb_dsps_of_match,
1040         },
1041 };
1042
1043 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
1044 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
1045 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
1046 MODULE_LICENSE("GPL v2");
1047
1048 module_platform_driver(dsps_usbss_driver);