2 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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40 * OTHER DEALINGS IN THE SOFTWARE.
43 #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
44 #define _DT_BINDINGS_CLK_SUN50I_A64_H_
46 #define CLK_PLL_VIDEO0 7
47 #define CLK_PLL_PERIPH0 11
49 #define CLK_BUS_MIPI_DSI 28
51 #define CLK_BUS_DMA 30
52 #define CLK_BUS_MMC0 31
53 #define CLK_BUS_MMC1 32
54 #define CLK_BUS_MMC2 33
55 #define CLK_BUS_NAND 34
56 #define CLK_BUS_DRAM 35
57 #define CLK_BUS_EMAC 36
59 #define CLK_BUS_HSTIMER 38
60 #define CLK_BUS_SPI0 39
61 #define CLK_BUS_SPI1 40
62 #define CLK_BUS_OTG 41
63 #define CLK_BUS_EHCI0 42
64 #define CLK_BUS_EHCI1 43
65 #define CLK_BUS_OHCI0 44
66 #define CLK_BUS_OHCI1 45
68 #define CLK_BUS_TCON0 47
69 #define CLK_BUS_TCON1 48
70 #define CLK_BUS_DEINTERLACE 49
71 #define CLK_BUS_CSI 50
72 #define CLK_BUS_HDMI 51
74 #define CLK_BUS_GPU 53
75 #define CLK_BUS_MSGBOX 54
76 #define CLK_BUS_SPINLOCK 55
77 #define CLK_BUS_CODEC 56
78 #define CLK_BUS_SPDIF 57
79 #define CLK_BUS_PIO 58
80 #define CLK_BUS_THS 59
81 #define CLK_BUS_I2S0 60
82 #define CLK_BUS_I2S1 61
83 #define CLK_BUS_I2S2 62
84 #define CLK_BUS_I2C0 63
85 #define CLK_BUS_I2C1 64
86 #define CLK_BUS_I2C2 65
87 #define CLK_BUS_SCR 66
88 #define CLK_BUS_UART0 67
89 #define CLK_BUS_UART1 68
90 #define CLK_BUS_UART2 69
91 #define CLK_BUS_UART3 70
92 #define CLK_BUS_UART4 71
93 #define CLK_BUS_DBG 72
107 #define CLK_USB_PHY0 86
108 #define CLK_USB_PHY1 87
109 #define CLK_USB_HSIC 88
110 #define CLK_USB_HSIC_12M 89
112 #define CLK_USB_OHCI0 91
114 #define CLK_USB_OHCI1 93
116 #define CLK_DRAM_VE 95
117 #define CLK_DRAM_CSI 96
118 #define CLK_DRAM_DEINTERLACE 97
119 #define CLK_DRAM_TS 98
121 #define CLK_TCON0 100
122 #define CLK_TCON1 101
123 #define CLK_DEINTERLACE 102
124 #define CLK_CSI_MISC 103
125 #define CLK_CSI_SCLK 104
126 #define CLK_CSI_MCLK 105
128 #define CLK_AC_DIG 107
129 #define CLK_AC_DIG_4X 108
132 #define CLK_HDMI_DDC 111
134 #define CLK_DSI_DPHY 113
137 #endif /* _DT_BINDINGS_CLK_SUN50I_H_ */