1 // SPDX-License-Identifier: GPL-2.0-only
3 * Au12x0/Au1550 PSC ALSA ASoC audio support.
5 * (c) 2007-2009 MSC Vertriebsges.m.b.H.,
6 * Manuel Lauss <manuel.lauss@gmail.com>
8 * Au1xxx-PSC AC97 glue.
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/device.h>
15 #include <linux/delay.h>
16 #include <linux/mutex.h>
17 #include <linux/suspend.h>
18 #include <sound/core.h>
19 #include <sound/pcm.h>
20 #include <sound/initval.h>
21 #include <sound/soc.h>
22 #include <asm/mach-au1x00/au1000.h>
23 #include <asm/mach-au1x00/au1xxx_psc.h>
27 /* how often to retry failed codec register reads/writes */
28 #define AC97_RW_RETRIES 5
31 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
34 SNDRV_PCM_RATE_8000_48000
37 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
39 #define AC97PCR_START(stype) \
40 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
41 #define AC97PCR_STOP(stype) \
42 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
43 #define AC97PCR_CLRFIFO(stype) \
44 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
46 #define AC97STAT_BUSY(stype) \
47 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
49 /* instance data. There can be only one, MacLeod!!!! */
50 static struct au1xpsc_audio_data
*au1xpsc_ac97_workdata
;
54 /* this could theoretically work, but ac97->bus->card->private_data can be NULL
55 * when snd_ac97_mixer() is called; I don't know if the rest further down the
56 * chain are always valid either.
58 static inline struct au1xpsc_audio_data
*ac97_to_pscdata(struct snd_ac97
*x
)
60 struct snd_soc_card
*c
= x
->bus
->card
->private_data
;
61 return snd_soc_dai_get_drvdata(c
->rtd
->cpu_dai
);
66 #define ac97_to_pscdata(x) au1xpsc_ac97_workdata
70 /* AC97 controller reads codec register */
71 static unsigned short au1xpsc_ac97_read(struct snd_ac97
*ac97
,
74 struct au1xpsc_audio_data
*pscdata
= ac97_to_pscdata(ac97
);
75 unsigned short retry
, tmo
;
78 __raw_writel(PSC_AC97EVNT_CD
, AC97_EVNT(pscdata
));
79 wmb(); /* drain writebuffer */
81 retry
= AC97_RW_RETRIES
;
83 mutex_lock(&pscdata
->lock
);
85 __raw_writel(PSC_AC97CDC_RD
| PSC_AC97CDC_INDX(reg
),
87 wmb(); /* drain writebuffer */
92 if (__raw_readl(AC97_EVNT(pscdata
)) & PSC_AC97EVNT_CD
)
96 data
= __raw_readl(AC97_CDC(pscdata
));
98 __raw_writel(PSC_AC97EVNT_CD
, AC97_EVNT(pscdata
));
99 wmb(); /* drain writebuffer */
101 mutex_unlock(&pscdata
->lock
);
103 if (reg
!= ((data
>> 16) & 0x7f))
104 tmo
= 1; /* wrong register, try again */
106 } while (--retry
&& !tmo
);
108 return retry
? data
& 0xffff : 0xffff;
111 /* AC97 controller writes to codec register */
112 static void au1xpsc_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
,
115 struct au1xpsc_audio_data
*pscdata
= ac97_to_pscdata(ac97
);
116 unsigned int tmo
, retry
;
118 __raw_writel(PSC_AC97EVNT_CD
, AC97_EVNT(pscdata
));
119 wmb(); /* drain writebuffer */
121 retry
= AC97_RW_RETRIES
;
123 mutex_lock(&pscdata
->lock
);
125 __raw_writel(PSC_AC97CDC_INDX(reg
) | (val
& 0xffff),
127 wmb(); /* drain writebuffer */
132 if (__raw_readl(AC97_EVNT(pscdata
)) & PSC_AC97EVNT_CD
)
136 __raw_writel(PSC_AC97EVNT_CD
, AC97_EVNT(pscdata
));
137 wmb(); /* drain writebuffer */
139 mutex_unlock(&pscdata
->lock
);
140 } while (--retry
&& !tmo
);
143 /* AC97 controller asserts a warm reset */
144 static void au1xpsc_ac97_warm_reset(struct snd_ac97
*ac97
)
146 struct au1xpsc_audio_data
*pscdata
= ac97_to_pscdata(ac97
);
148 __raw_writel(PSC_AC97RST_SNC
, AC97_RST(pscdata
));
149 wmb(); /* drain writebuffer */
151 __raw_writel(0, AC97_RST(pscdata
));
152 wmb(); /* drain writebuffer */
155 static void au1xpsc_ac97_cold_reset(struct snd_ac97
*ac97
)
157 struct au1xpsc_audio_data
*pscdata
= ac97_to_pscdata(ac97
);
160 /* disable PSC during cold reset */
161 __raw_writel(0, AC97_CFG(au1xpsc_ac97_workdata
));
162 wmb(); /* drain writebuffer */
163 __raw_writel(PSC_CTRL_DISABLE
, PSC_CTRL(pscdata
));
164 wmb(); /* drain writebuffer */
166 /* issue cold reset */
167 __raw_writel(PSC_AC97RST_RST
, AC97_RST(pscdata
));
168 wmb(); /* drain writebuffer */
170 __raw_writel(0, AC97_RST(pscdata
));
171 wmb(); /* drain writebuffer */
174 __raw_writel(PSC_CTRL_ENABLE
, PSC_CTRL(pscdata
));
175 wmb(); /* drain writebuffer */
177 /* wait for PSC to indicate it's ready */
179 while (!((__raw_readl(AC97_STAT(pscdata
)) & PSC_AC97STAT_SR
)) && (--i
))
183 printk(KERN_ERR
"au1xpsc-ac97: PSC not ready!\n");
187 /* enable the ac97 function */
188 __raw_writel(pscdata
->cfg
| PSC_AC97CFG_DE_ENABLE
, AC97_CFG(pscdata
));
189 wmb(); /* drain writebuffer */
191 /* wait for AC97 core to become ready */
193 while (!((__raw_readl(AC97_STAT(pscdata
)) & PSC_AC97STAT_DR
)) && (--i
))
196 printk(KERN_ERR
"au1xpsc-ac97: AC97 ctrl not ready\n");
199 /* AC97 controller operations */
200 static struct snd_ac97_bus_ops psc_ac97_ops
= {
201 .read
= au1xpsc_ac97_read
,
202 .write
= au1xpsc_ac97_write
,
203 .reset
= au1xpsc_ac97_cold_reset
,
204 .warm_reset
= au1xpsc_ac97_warm_reset
,
207 static int au1xpsc_ac97_hw_params(struct snd_pcm_substream
*substream
,
208 struct snd_pcm_hw_params
*params
,
209 struct snd_soc_dai
*dai
)
211 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(dai
);
212 unsigned long r
, ro
, stat
;
213 int chans
, t
, stype
= substream
->stream
;
215 chans
= params_channels(params
);
217 r
= ro
= __raw_readl(AC97_CFG(pscdata
));
218 stat
= __raw_readl(AC97_STAT(pscdata
));
220 /* already active? */
221 if (stat
& (PSC_AC97STAT_TB
| PSC_AC97STAT_RB
)) {
222 /* reject parameters not currently set up */
223 if ((PSC_AC97CFG_GET_LEN(r
) != params
->msbits
) ||
224 (pscdata
->rate
!= params_rate(params
)))
228 /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
229 r
&= ~PSC_AC97CFG_LEN_MASK
;
230 r
|= PSC_AC97CFG_SET_LEN(params
->msbits
);
232 /* channels: enable slots for front L/R channel */
233 if (stype
== SNDRV_PCM_STREAM_PLAYBACK
) {
234 r
&= ~PSC_AC97CFG_TXSLOT_MASK
;
235 r
|= PSC_AC97CFG_TXSLOT_ENA(3);
236 r
|= PSC_AC97CFG_TXSLOT_ENA(4);
238 r
&= ~PSC_AC97CFG_RXSLOT_MASK
;
239 r
|= PSC_AC97CFG_RXSLOT_ENA(3);
240 r
|= PSC_AC97CFG_RXSLOT_ENA(4);
243 /* do we need to poke the hardware? */
247 /* ac97 engine is about to be disabled */
248 mutex_lock(&pscdata
->lock
);
250 /* disable AC97 device controller first... */
251 __raw_writel(r
& ~PSC_AC97CFG_DE_ENABLE
, AC97_CFG(pscdata
));
252 wmb(); /* drain writebuffer */
254 /* ...wait for it... */
256 while ((__raw_readl(AC97_STAT(pscdata
)) & PSC_AC97STAT_DR
) && --t
)
260 printk(KERN_ERR
"PSC-AC97: can't disable!\n");
262 /* ...write config... */
263 __raw_writel(r
, AC97_CFG(pscdata
));
264 wmb(); /* drain writebuffer */
266 /* ...enable the AC97 controller again... */
267 __raw_writel(r
| PSC_AC97CFG_DE_ENABLE
, AC97_CFG(pscdata
));
268 wmb(); /* drain writebuffer */
270 /* ...and wait for ready bit */
272 while ((!(__raw_readl(AC97_STAT(pscdata
)) & PSC_AC97STAT_DR
)) && --t
)
276 printk(KERN_ERR
"PSC-AC97: can't enable!\n");
278 mutex_unlock(&pscdata
->lock
);
281 pscdata
->rate
= params_rate(params
);
288 static int au1xpsc_ac97_trigger(struct snd_pcm_substream
*substream
,
289 int cmd
, struct snd_soc_dai
*dai
)
291 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(dai
);
292 int ret
, stype
= substream
->stream
;
297 case SNDRV_PCM_TRIGGER_START
:
298 case SNDRV_PCM_TRIGGER_RESUME
:
299 __raw_writel(AC97PCR_CLRFIFO(stype
), AC97_PCR(pscdata
));
300 wmb(); /* drain writebuffer */
301 __raw_writel(AC97PCR_START(stype
), AC97_PCR(pscdata
));
302 wmb(); /* drain writebuffer */
304 case SNDRV_PCM_TRIGGER_STOP
:
305 case SNDRV_PCM_TRIGGER_SUSPEND
:
306 __raw_writel(AC97PCR_STOP(stype
), AC97_PCR(pscdata
));
307 wmb(); /* drain writebuffer */
309 while (__raw_readl(AC97_STAT(pscdata
)) & AC97STAT_BUSY(stype
))
310 asm volatile ("nop");
312 __raw_writel(AC97PCR_CLRFIFO(stype
), AC97_PCR(pscdata
));
313 wmb(); /* drain writebuffer */
322 static int au1xpsc_ac97_startup(struct snd_pcm_substream
*substream
,
323 struct snd_soc_dai
*dai
)
325 struct au1xpsc_audio_data
*pscdata
= snd_soc_dai_get_drvdata(dai
);
326 snd_soc_dai_set_dma_data(dai
, substream
, &pscdata
->dmaids
[0]);
330 static int au1xpsc_ac97_probe(struct snd_soc_dai
*dai
)
332 return au1xpsc_ac97_workdata
? 0 : -ENODEV
;
335 static const struct snd_soc_dai_ops au1xpsc_ac97_dai_ops
= {
336 .startup
= au1xpsc_ac97_startup
,
337 .trigger
= au1xpsc_ac97_trigger
,
338 .hw_params
= au1xpsc_ac97_hw_params
,
341 static const struct snd_soc_dai_driver au1xpsc_ac97_dai_template
= {
342 .probe
= au1xpsc_ac97_probe
,
345 .formats
= AC97_FMTS
,
351 .formats
= AC97_FMTS
,
355 .ops
= &au1xpsc_ac97_dai_ops
,
358 static const struct snd_soc_component_driver au1xpsc_ac97_component
= {
359 .name
= "au1xpsc-ac97",
362 static int au1xpsc_ac97_drvprobe(struct platform_device
*pdev
)
365 struct resource
*dmares
;
367 struct au1xpsc_audio_data
*wd
;
369 wd
= devm_kzalloc(&pdev
->dev
, sizeof(struct au1xpsc_audio_data
),
374 mutex_init(&wd
->lock
);
376 wd
->mmio
= devm_platform_ioremap_resource(pdev
, 0);
377 if (IS_ERR(wd
->mmio
))
378 return PTR_ERR(wd
->mmio
);
380 dmares
= platform_get_resource(pdev
, IORESOURCE_DMA
, 0);
383 wd
->dmaids
[SNDRV_PCM_STREAM_PLAYBACK
] = dmares
->start
;
385 dmares
= platform_get_resource(pdev
, IORESOURCE_DMA
, 1);
388 wd
->dmaids
[SNDRV_PCM_STREAM_CAPTURE
] = dmares
->start
;
390 /* configuration: max dma trigger threshold, enable ac97 */
391 wd
->cfg
= PSC_AC97CFG_RT_FIFO8
| PSC_AC97CFG_TT_FIFO8
|
392 PSC_AC97CFG_DE_ENABLE
;
394 /* preserve PSC clock source set up by platform */
395 sel
= __raw_readl(PSC_SEL(wd
)) & PSC_SEL_CLK_MASK
;
396 __raw_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
397 wmb(); /* drain writebuffer */
398 __raw_writel(0, PSC_SEL(wd
));
399 wmb(); /* drain writebuffer */
400 __raw_writel(PSC_SEL_PS_AC97MODE
| sel
, PSC_SEL(wd
));
401 wmb(); /* drain writebuffer */
403 /* name the DAI like this device instance ("au1xpsc-ac97.PSCINDEX") */
404 memcpy(&wd
->dai_drv
, &au1xpsc_ac97_dai_template
,
405 sizeof(struct snd_soc_dai_driver
));
406 wd
->dai_drv
.name
= dev_name(&pdev
->dev
);
408 platform_set_drvdata(pdev
, wd
);
410 ret
= snd_soc_set_ac97_ops(&psc_ac97_ops
);
414 ret
= snd_soc_register_component(&pdev
->dev
, &au1xpsc_ac97_component
,
419 au1xpsc_ac97_workdata
= wd
;
423 static int au1xpsc_ac97_drvremove(struct platform_device
*pdev
)
425 struct au1xpsc_audio_data
*wd
= platform_get_drvdata(pdev
);
427 snd_soc_unregister_component(&pdev
->dev
);
429 /* disable PSC completely */
430 __raw_writel(0, AC97_CFG(wd
));
431 wmb(); /* drain writebuffer */
432 __raw_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
433 wmb(); /* drain writebuffer */
435 au1xpsc_ac97_workdata
= NULL
; /* MDEV */
441 static int au1xpsc_ac97_drvsuspend(struct device
*dev
)
443 struct au1xpsc_audio_data
*wd
= dev_get_drvdata(dev
);
445 /* save interesting registers and disable PSC */
446 wd
->pm
[0] = __raw_readl(PSC_SEL(wd
));
448 __raw_writel(0, AC97_CFG(wd
));
449 wmb(); /* drain writebuffer */
450 __raw_writel(PSC_CTRL_DISABLE
, PSC_CTRL(wd
));
451 wmb(); /* drain writebuffer */
456 static int au1xpsc_ac97_drvresume(struct device
*dev
)
458 struct au1xpsc_audio_data
*wd
= dev_get_drvdata(dev
);
460 /* restore PSC clock config */
461 __raw_writel(wd
->pm
[0] | PSC_SEL_PS_AC97MODE
, PSC_SEL(wd
));
462 wmb(); /* drain writebuffer */
464 /* after this point the ac97 core will cold-reset the codec.
465 * During cold-reset the PSC is reinitialized and the last
466 * configuration set up in hw_params() is restored.
471 static const struct dev_pm_ops au1xpscac97_pmops
= {
472 .suspend
= au1xpsc_ac97_drvsuspend
,
473 .resume
= au1xpsc_ac97_drvresume
,
476 #define AU1XPSCAC97_PMOPS &au1xpscac97_pmops
480 #define AU1XPSCAC97_PMOPS NULL
484 static struct platform_driver au1xpsc_ac97_driver
= {
486 .name
= "au1xpsc_ac97",
487 .pm
= AU1XPSCAC97_PMOPS
,
489 .probe
= au1xpsc_ac97_drvprobe
,
490 .remove
= au1xpsc_ac97_drvremove
,
493 module_platform_driver(au1xpsc_ac97_driver
);
495 MODULE_LICENSE("GPL");
496 MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
497 MODULE_AUTHOR("Manuel Lauss");