sound/soc/codecs/adau1701.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Driver for ADAU1701 SigmaDSP processor
   4  *
   5  * Copyright 2011 Analog Devices Inc.
   6  * Author: Lars-Peter Clausen <lars@metafoo.de>
   7  *      based on an inital version by Cliff Cai <cliff.cai@analog.com>
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/init.h>
  12 #include <linux/i2c.h>
  13 #include <linux/delay.h>
  14 #include <linux/slab.h>
  15 #include <linux/of.h>
  16 #include <linux/of_gpio.h>
  17 #include <linux/of_device.h>
  18 #include <linux/regulator/consumer.h>
  19 #include <linux/regmap.h>
  20 #include <sound/core.h>
  21 #include <sound/pcm.h>
  22 #include <sound/pcm_params.h>
  23 #include <sound/soc.h>
  24
  25 #include <asm/unaligned.h>
  26
  27 #include "sigmadsp.h"
  28 #include "adau1701.h"
  29
  30 #define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))
  31 #define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))
  32
  33 #define ADAU1701_DSPCTRL        0x081c
  34 #define ADAU1701_SEROCTL        0x081e
  35 #define ADAU1701_SERICTL        0x081f
  36
  37 #define ADAU1701_AUXNPOW        0x0822
  38 #define ADAU1701_PINCONF_0      0x0820
  39 #define ADAU1701_PINCONF_1      0x0821
  40 #define ADAU1701_AUXNPOW        0x0822
  41
  42 #define ADAU1701_OSCIPOW        0x0826
  43 #define ADAU1701_DACSET         0x0827
  44
  45 #define ADAU1701_MAX_REGISTER   0x0828
  46
  47 #define ADAU1701_DSPCTRL_CR             (1 << 2)
  48 #define ADAU1701_DSPCTRL_DAM            (1 << 3)
  49 #define ADAU1701_DSPCTRL_ADM            (1 << 4)
  50 #define ADAU1701_DSPCTRL_IST            (1 << 5)
  51 #define ADAU1701_DSPCTRL_SR_48          0x00
  52 #define ADAU1701_DSPCTRL_SR_96          0x01
  53 #define ADAU1701_DSPCTRL_SR_192         0x02
  54 #define ADAU1701_DSPCTRL_SR_MASK        0x03
  55
  56 #define ADAU1701_SEROCTL_INV_LRCLK      0x2000
  57 #define ADAU1701_SEROCTL_INV_BCLK       0x1000
  58 #define ADAU1701_SEROCTL_MASTER         0x0800
  59
  60 #define ADAU1701_SEROCTL_OBF16          0x0000
  61 #define ADAU1701_SEROCTL_OBF8           0x0200
  62 #define ADAU1701_SEROCTL_OBF4           0x0400
  63 #define ADAU1701_SEROCTL_OBF2           0x0600
  64 #define ADAU1701_SEROCTL_OBF_MASK       0x0600
  65
  66 #define ADAU1701_SEROCTL_OLF1024        0x0000
  67 #define ADAU1701_SEROCTL_OLF512         0x0080
  68 #define ADAU1701_SEROCTL_OLF256         0x0100
  69 #define ADAU1701_SEROCTL_OLF_MASK       0x0180
  70
  71 #define ADAU1701_SEROCTL_MSB_DEALY1     0x0000
  72 #define ADAU1701_SEROCTL_MSB_DEALY0     0x0004
  73 #define ADAU1701_SEROCTL_MSB_DEALY8     0x0008
  74 #define ADAU1701_SEROCTL_MSB_DEALY12    0x000c
  75 #define ADAU1701_SEROCTL_MSB_DEALY16    0x0010
  76 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
  77
  78 #define ADAU1701_SEROCTL_WORD_LEN_24    0x0000
  79 #define ADAU1701_SEROCTL_WORD_LEN_20    0x0001
  80 #define ADAU1701_SEROCTL_WORD_LEN_16    0x0002
  81 #define ADAU1701_SEROCTL_WORD_LEN_MASK  0x0003
  82
  83 #define ADAU1701_AUXNPOW_VBPD           0x40
  84 #define ADAU1701_AUXNPOW_VRPD           0x20
  85
  86 #define ADAU1701_SERICTL_I2S            0
  87 #define ADAU1701_SERICTL_LEFTJ          1
  88 #define ADAU1701_SERICTL_TDM            2
  89 #define ADAU1701_SERICTL_RIGHTJ_24      3
  90 #define ADAU1701_SERICTL_RIGHTJ_20      4
  91 #define ADAU1701_SERICTL_RIGHTJ_18      5
  92 #define ADAU1701_SERICTL_RIGHTJ_16      6
  93 #define ADAU1701_SERICTL_MODE_MASK      7
  94 #define ADAU1701_SERICTL_INV_BCLK       BIT(3)
  95 #define ADAU1701_SERICTL_INV_LRCLK      BIT(4)
  96
  97 #define ADAU1701_OSCIPOW_OPD            0x04
  98 #define ADAU1701_DACSET_DACINIT         1
  99
 100 #define ADAU1707_CLKDIV_UNSET           (-1U)
 101
 102 #define ADAU1701_FIRMWARE "adau1701.bin"
 103
 104 static const char * const supply_names[] = {
 105         "dvdd", "avdd"
 106 };
 107
 108 struct adau1701 {
 109         int gpio_nreset;
 110         int gpio_pll_mode[2];
 111         unsigned int dai_fmt;
 112         unsigned int pll_clkdiv;
 113         unsigned int sysclk;
 114         struct regmap *regmap;
 115         struct i2c_client *client;
 116         u8 pin_config[12];
 117
 118         struct sigmadsp *sigmadsp;
 119         struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
 120 };
 121
 122 static const struct snd_kcontrol_new adau1701_controls[] = {
 123         SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
 124 };
 125
 126 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
 127         SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
 128         SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
 129         SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
 130         SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
 131         SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
 132
 133         SND_SOC_DAPM_OUTPUT("OUT0"),
 134         SND_SOC_DAPM_OUTPUT("OUT1"),
 135         SND_SOC_DAPM_OUTPUT("OUT2"),
 136         SND_SOC_DAPM_OUTPUT("OUT3"),
 137         SND_SOC_DAPM_INPUT("IN0"),
 138         SND_SOC_DAPM_INPUT("IN1"),
 139 };
 140
 141 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
 142         { "OUT0", NULL, "DAC0" },
 143         { "OUT1", NULL, "DAC1" },
 144         { "OUT2", NULL, "DAC2" },
 145         { "OUT3", NULL, "DAC3" },
 146
 147         { "ADC", NULL, "IN0" },
 148         { "ADC", NULL, "IN1" },
 149 };
 150
 151 static unsigned int adau1701_register_size(struct device *dev,
 152                 unsigned int reg)
 153 {
 154         switch (reg) {
 155         case ADAU1701_PINCONF_0:
 156         case ADAU1701_PINCONF_1:
 157                 return 3;
 158         case ADAU1701_DSPCTRL:
 159         case ADAU1701_SEROCTL:
 160         case ADAU1701_AUXNPOW:
 161         case ADAU1701_OSCIPOW:
 162         case ADAU1701_DACSET:
 163                 return 2;
 164         case ADAU1701_SERICTL:
 165                 return 1;
 166         }
 167
 168         dev_err(dev, "Unsupported register address: %d\n", reg);
 169         return 0;
 170 }
 171
 172 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
 173 {
 174         switch (reg) {
 175         case ADAU1701_DACSET:
 176         case ADAU1701_DSPCTRL:
 177                 return true;
 178         default:
 179                 return false;
 180         }
 181 }
 182
 183 static int adau1701_reg_write(void *context, unsigned int reg,
 184                               unsigned int value)
 185 {
 186         struct i2c_client *client = context;
 187         unsigned int i;
 188         unsigned int size;
 189         uint8_t buf[5];
 190         int ret;
 191
 192         size = adau1701_register_size(&client->dev, reg);
 193         if (size == 0)
 194                 return -EINVAL;
 195
 196         buf[0] = reg >> 8;
 197         buf[1] = reg & 0xff;
 198
 199         for (i = size + 1; i >= 2; --i) {
 200                 buf[i] = value;
 201                 value >>= 8;
 202         }
 203
 204         ret = i2c_master_send(client, buf, size + 2);
 205         if (ret == size + 2)
 206                 return 0;
 207         else if (ret < 0)
 208                 return ret;
 209         else
 210                 return -EIO;
 211 }
 212
 213 static int adau1701_reg_read(void *context, unsigned int reg,
 214                              unsigned int *value)
 215 {
 216         int ret;
 217         unsigned int i;
 218         unsigned int size;
 219         uint8_t send_buf[2], recv_buf[3];
 220         struct i2c_client *client = context;
 221         struct i2c_msg msgs[2];
 222
 223         size = adau1701_register_size(&client->dev, reg);
 224         if (size == 0)
 225                 return -EINVAL;
 226
 227         send_buf[0] = reg >> 8;
 228         send_buf[1] = reg & 0xff;
 229
 230         msgs[0].addr = client->addr;
 231         msgs[0].len = sizeof(send_buf);
 232         msgs[0].buf = send_buf;
 233         msgs[0].flags = 0;
 234
 235         msgs[1].addr = client->addr;
 236         msgs[1].len = size;
 237         msgs[1].buf = recv_buf;
 238         msgs[1].flags = I2C_M_RD;
 239
 240         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 241         if (ret < 0)
 242                 return ret;
 243         else if (ret != ARRAY_SIZE(msgs))
 244                 return -EIO;
 245
 246         *value = 0;
 247
 248         for (i = 0; i < size; i++) {
 249                 *value <<= 8;
 250                 *value |= recv_buf[i];
 251         }
 252
 253         return 0;
 254 }
 255
 256 static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
 257         const uint8_t bytes[], size_t len)
 258 {
 259         struct i2c_client *client = to_i2c_client(sigmadsp->dev);
 260         struct adau1701 *adau1701 = i2c_get_clientdata(client);
 261         unsigned int val;
 262         unsigned int i;
 263         uint8_t buf[10];
 264         int ret;
 265
 266         ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
 267         if (ret)
 268                 return ret;
 269
 270         if (val & ADAU1701_DSPCTRL_IST)
 271                 msleep(50);
 272
 273         for (i = 0; i < len / 4; i++) {
 274                 put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);
 275                 buf[2] = 0x00;
 276                 memcpy(buf + 3, bytes + i * 4, 4);
 277                 ret = i2c_master_send(client, buf, 7);
 278                 if (ret < 0)
 279                         return ret;
 280                 else if (ret != 7)
 281                         return -EIO;
 282
 283                 put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);
 284                 put_unaligned_le16(addr + i, buf + 2);
 285                 ret = i2c_master_send(client, buf, 4);
 286                 if (ret < 0)
 287                         return ret;
 288                 else if (ret != 4)
 289                         return -EIO;
 290         }
 291
 292         return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
 293                 ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);
 294 }
 295
 296 static const struct sigmadsp_ops adau1701_sigmadsp_ops = {
 297         .safeload = adau1701_safeload,
 298 };
 299
 300 static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv,
 301         unsigned int rate)
 302 {
 303         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 304         int ret;
 305
 306         sigmadsp_reset(adau1701->sigmadsp);
 307
 308         if (clkdiv != ADAU1707_CLKDIV_UNSET &&
 309             gpio_is_valid(adau1701->gpio_pll_mode[0]) &&
 310             gpio_is_valid(adau1701->gpio_pll_mode[1])) {
 311                 switch (clkdiv) {
 312                 case 64:
 313                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
 314                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
 315                         break;
 316                 case 256:
 317                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
 318                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
 319                         break;
 320                 case 384:
 321                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
 322                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
 323                         break;
 324                 case 0: /* fallback */
 325                 case 512:
 326                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
 327                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
 328                         break;
 329                 }
 330         }
 331
 332         adau1701->pll_clkdiv = clkdiv;
 333
 334         if (gpio_is_valid(adau1701->gpio_nreset)) {
 335                 gpio_set_value_cansleep(adau1701->gpio_nreset, 0);
 336                 /* minimum reset time is 20ns */
 337                 udelay(1);
 338                 gpio_set_value_cansleep(adau1701->gpio_nreset, 1);
 339                 /* power-up time may be as long as 85ms */
 340                 mdelay(85);
 341         }
 342
 343         /*
 344          * Postpone the firmware download to a point in time when we
 345          * know the correct PLL setup
 346          */
 347         if (clkdiv != ADAU1707_CLKDIV_UNSET) {
 348                 ret = sigmadsp_setup(adau1701->sigmadsp, rate);
 349                 if (ret) {
 350                         dev_warn(component->dev, "Failed to load firmware\n");
 351                         return ret;
 352                 }
 353         }
 354
 355         regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
 356         regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
 357
 358         regcache_mark_dirty(adau1701->regmap);
 359         regcache_sync(adau1701->regmap);
 360
 361         return 0;
 362 }
 363
 364 static int adau1701_set_capture_pcm_format(struct snd_soc_component *component,
 365                                            struct snd_pcm_hw_params *params)
 366 {
 367         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 368         unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
 369         unsigned int val;
 370
 371         switch (params_width(params)) {
 372         case 16:
 373                 val = ADAU1701_SEROCTL_WORD_LEN_16;
 374                 break;
 375         case 20:
 376                 val = ADAU1701_SEROCTL_WORD_LEN_20;
 377                 break;
 378         case 24:
 379                 val = ADAU1701_SEROCTL_WORD_LEN_24;
 380                 break;
 381         default:
 382                 return -EINVAL;
 383         }
 384
 385         if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
 386                 switch (params_width(params)) {
 387                 case 16:
 388                         val |= ADAU1701_SEROCTL_MSB_DEALY16;
 389                         break;
 390                 case 20:
 391                         val |= ADAU1701_SEROCTL_MSB_DEALY12;
 392                         break;
 393                 case 24:
 394                         val |= ADAU1701_SEROCTL_MSB_DEALY8;
 395                         break;
 396                 }
 397                 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
 398         }
 399
 400         regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
 401
 402         return 0;
 403 }
 404
 405 static int adau1701_set_playback_pcm_format(struct snd_soc_component *component,
 406                                             struct snd_pcm_hw_params *params)
 407 {
 408         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 409         unsigned int val;
 410
 411         if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
 412                 return 0;
 413
 414         switch (params_width(params)) {
 415         case 16:
 416                 val = ADAU1701_SERICTL_RIGHTJ_16;
 417                 break;
 418         case 20:
 419                 val = ADAU1701_SERICTL_RIGHTJ_20;
 420                 break;
 421         case 24:
 422                 val = ADAU1701_SERICTL_RIGHTJ_24;
 423                 break;
 424         default:
 425                 return -EINVAL;
 426         }
 427
 428         regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
 429                 ADAU1701_SERICTL_MODE_MASK, val);
 430
 431         return 0;
 432 }
 433
 434 static int adau1701_hw_params(struct snd_pcm_substream *substream,
 435                 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 436 {
 437         struct snd_soc_component *component = dai->component;
 438         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 439         unsigned int clkdiv = adau1701->sysclk / params_rate(params);
 440         unsigned int val;
 441         int ret;
 442
 443         /*
 444          * If the mclk/lrclk ratio changes, the chip needs updated PLL
 445          * mode GPIO settings, and a full reset cycle, including a new
 446          * firmware upload.
 447          */
 448         if (clkdiv != adau1701->pll_clkdiv) {
 449                 ret = adau1701_reset(component, clkdiv, params_rate(params));
 450                 if (ret < 0)
 451                         return ret;
 452         }
 453
 454         switch (params_rate(params)) {
 455         case 192000:
 456                 val = ADAU1701_DSPCTRL_SR_192;
 457                 break;
 458         case 96000:
 459                 val = ADAU1701_DSPCTRL_SR_96;
 460                 break;
 461         case 48000:
 462                 val = ADAU1701_DSPCTRL_SR_48;
 463                 break;
 464         default:
 465                 return -EINVAL;
 466         }
 467
 468         regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
 469                 ADAU1701_DSPCTRL_SR_MASK, val);
 470
 471         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 472                 return adau1701_set_playback_pcm_format(component, params);
 473         else
 474                 return adau1701_set_capture_pcm_format(component, params);
 475 }
 476
 477 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
 478                 unsigned int fmt)
 479 {
 480         struct snd_soc_component *component = codec_dai->component;
 481         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 482         unsigned int serictl = 0x00, seroctl = 0x00;
 483         bool invert_lrclk;
 484
 485         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 486         case SND_SOC_DAIFMT_CBM_CFM:
 487                 /* master, 64-bits per sample, 1 frame per sample */
 488                 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
 489                                 | ADAU1701_SEROCTL_OLF1024;
 490                 break;
 491         case SND_SOC_DAIFMT_CBS_CFS:
 492                 break;
 493         default:
 494                 return -EINVAL;
 495         }
 496
 497         /* clock inversion */
 498         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 499         case SND_SOC_DAIFMT_NB_NF:
 500                 invert_lrclk = false;
 501                 break;
 502         case SND_SOC_DAIFMT_NB_IF:
 503                 invert_lrclk = true;
 504                 break;
 505         case SND_SOC_DAIFMT_IB_NF:
 506                 invert_lrclk = false;
 507                 serictl |= ADAU1701_SERICTL_INV_BCLK;
 508                 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
 509                 break;
 510         case SND_SOC_DAIFMT_IB_IF:
 511                 invert_lrclk = true;
 512                 serictl |= ADAU1701_SERICTL_INV_BCLK;
 513                 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
 514                 break;
 515         default:
 516                 return -EINVAL;
 517         }
 518
 519         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 520         case SND_SOC_DAIFMT_I2S:
 521                 break;
 522         case SND_SOC_DAIFMT_LEFT_J:
 523                 serictl |= ADAU1701_SERICTL_LEFTJ;
 524                 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
 525                 invert_lrclk = !invert_lrclk;
 526                 break;
 527         case SND_SOC_DAIFMT_RIGHT_J:
 528                 serictl |= ADAU1701_SERICTL_RIGHTJ_24;
 529                 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
 530                 invert_lrclk = !invert_lrclk;
 531                 break;
 532         default:
 533                 return -EINVAL;
 534         }
 535
 536         if (invert_lrclk) {
 537                 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
 538                 serictl |= ADAU1701_SERICTL_INV_LRCLK;
 539         }
 540
 541         adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
 542
 543         regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
 544         regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
 545                 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
 546
 547         return 0;
 548 }
 549
 550 static int adau1701_set_bias_level(struct snd_soc_component *component,
 551                 enum snd_soc_bias_level level)
 552 {
 553         unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
 554         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 555
 556         switch (level) {
 557         case SND_SOC_BIAS_ON:
 558                 break;
 559         case SND_SOC_BIAS_PREPARE:
 560                 break;
 561         case SND_SOC_BIAS_STANDBY:
 562                 /* Enable VREF and VREF buffer */
 563                 regmap_update_bits(adau1701->regmap,
 564                                    ADAU1701_AUXNPOW, mask, 0x00);
 565                 break;
 566         case SND_SOC_BIAS_OFF:
 567                 /* Disable VREF and VREF buffer */
 568                 regmap_update_bits(adau1701->regmap,
 569                                    ADAU1701_AUXNPOW, mask, mask);
 570                 break;
 571         }
 572
 573         return 0;
 574 }
 575
 576 static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute)
 577 {
 578         struct snd_soc_component *component = dai->component;
 579         unsigned int mask = ADAU1701_DSPCTRL_DAM;
 580         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 581         unsigned int val;
 582
 583         if (mute)
 584                 val = 0;
 585         else
 586                 val = mask;
 587
 588         regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
 589
 590         return 0;
 591 }
 592
 593 static int adau1701_set_sysclk(struct snd_soc_component *component, int clk_id,
 594         int source, unsigned int freq, int dir)
 595 {
 596         unsigned int val;
 597         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 598
 599         switch (clk_id) {
 600         case ADAU1701_CLK_SRC_OSC:
 601                 val = 0x0;
 602                 break;
 603         case ADAU1701_CLK_SRC_MCLK:
 604                 val = ADAU1701_OSCIPOW_OPD;
 605                 break;
 606         default:
 607                 return -EINVAL;
 608         }
 609
 610         regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
 611                            ADAU1701_OSCIPOW_OPD, val);
 612         adau1701->sysclk = freq;
 613
 614         return 0;
 615 }
 616
 617 static int adau1701_startup(struct snd_pcm_substream *substream,
 618         struct snd_soc_dai *dai)
 619 {
 620         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(dai->component);
 621
 622         return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
 623 }
 624
 625 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
 626         SNDRV_PCM_RATE_192000)
 627
 628 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 629         SNDRV_PCM_FMTBIT_S24_LE)
 630
 631 static const struct snd_soc_dai_ops adau1701_dai_ops = {
 632         .set_fmt        = adau1701_set_dai_fmt,
 633         .hw_params      = adau1701_hw_params,
 634         .digital_mute   = adau1701_digital_mute,
 635         .startup        = adau1701_startup,
 636 };
 637
 638 static struct snd_soc_dai_driver adau1701_dai = {
 639         .name = "adau1701",
 640         .playback = {
 641                 .stream_name = "Playback",
 642                 .channels_min = 2,
 643                 .channels_max = 8,
 644                 .rates = ADAU1701_RATES,
 645                 .formats = ADAU1701_FORMATS,
 646         },
 647         .capture = {
 648                 .stream_name = "Capture",
 649                 .channels_min = 2,
 650                 .channels_max = 8,
 651                 .rates = ADAU1701_RATES,
 652                 .formats = ADAU1701_FORMATS,
 653         },
 654         .ops = &adau1701_dai_ops,
 655         .symmetric_rates = 1,
 656 };
 657
 658 #ifdef CONFIG_OF
 659 static const struct of_device_id adau1701_dt_ids[] = {
 660         { .compatible = "adi,adau1701", },
 661         { }
 662 };
 663 MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
 664 #endif
 665
 666 static int adau1701_probe(struct snd_soc_component *component)
 667 {
 668         int i, ret;
 669         unsigned int val;
 670         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 671
 672         ret = sigmadsp_attach(adau1701->sigmadsp, component);
 673         if (ret)
 674                 return ret;
 675
 676         ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
 677                                     adau1701->supplies);
 678         if (ret < 0) {
 679                 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
 680                 return ret;
 681         }
 682
 683         /*
 684          * Let the pll_clkdiv variable default to something that won't happen
 685          * at runtime. That way, we can postpone the firmware download from
 686          * adau1701_reset() to a point in time when we know the correct PLL
 687          * mode parameters.
 688          */
 689         adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
 690
 691         /* initalize with pre-configured pll mode settings */
 692         ret = adau1701_reset(component, adau1701->pll_clkdiv, 0);
 693         if (ret < 0)
 694                 goto exit_regulators_disable;
 695
 696         /* set up pin config */
 697         val = 0;
 698         for (i = 0; i < 6; i++)
 699                 val |= adau1701->pin_config[i] << (i * 4);
 700
 701         regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
 702
 703         val = 0;
 704         for (i = 0; i < 6; i++)
 705                 val |= adau1701->pin_config[i + 6] << (i * 4);
 706
 707         regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
 708
 709         return 0;
 710
 711 exit_regulators_disable:
 712
 713         regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
 714         return ret;
 715 }
 716
 717 static void adau1701_remove(struct snd_soc_component *component)
 718 {
 719         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 720
 721         if (gpio_is_valid(adau1701->gpio_nreset))
 722                 gpio_set_value_cansleep(adau1701->gpio_nreset, 0);
 723
 724         regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
 725 }
 726
 727 #ifdef CONFIG_PM
 728 static int adau1701_suspend(struct snd_soc_component *component)
 729 {
 730         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 731
 732         regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),
 733                                adau1701->supplies);
 734
 735         return 0;
 736 }
 737
 738 static int adau1701_resume(struct snd_soc_component *component)
 739 {
 740         struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 741         int ret;
 742
 743         ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
 744                                     adau1701->supplies);
 745         if (ret < 0) {
 746                 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
 747                 return ret;
 748         }
 749
 750         return adau1701_reset(component, adau1701->pll_clkdiv, 0);
 751 }
 752 #else
 753 #define adau1701_resume         NULL
 754 #define adau1701_suspend        NULL
 755 #endif /* CONFIG_PM */
 756
 757 static const struct snd_soc_component_driver adau1701_component_drv = {
 758         .probe                  = adau1701_probe,
 759         .remove                 = adau1701_remove,
 760         .resume                 = adau1701_resume,
 761         .suspend                = adau1701_suspend,
 762         .set_bias_level         = adau1701_set_bias_level,
 763         .controls               = adau1701_controls,
 764         .num_controls           = ARRAY_SIZE(adau1701_controls),
 765         .dapm_widgets           = adau1701_dapm_widgets,
 766         .num_dapm_widgets       = ARRAY_SIZE(adau1701_dapm_widgets),
 767         .dapm_routes            = adau1701_dapm_routes,
 768         .num_dapm_routes        = ARRAY_SIZE(adau1701_dapm_routes),
 769         .set_sysclk             = adau1701_set_sysclk,
 770         .use_pmdown_time        = 1,
 771         .endianness             = 1,
 772         .non_legacy_dai_naming  = 1,
 773 };
 774
 775 static const struct regmap_config adau1701_regmap = {
 776         .reg_bits               = 16,
 777         .val_bits               = 32,
 778         .max_register           = ADAU1701_MAX_REGISTER,
 779         .cache_type             = REGCACHE_RBTREE,
 780         .volatile_reg           = adau1701_volatile_reg,
 781         .reg_write              = adau1701_reg_write,
 782         .reg_read               = adau1701_reg_read,
 783 };
 784
 785 static int adau1701_i2c_probe(struct i2c_client *client,
 786                               const struct i2c_device_id *id)
 787 {
 788         struct adau1701 *adau1701;
 789         struct device *dev = &client->dev;
 790         int gpio_nreset = -EINVAL;
 791         int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
 792         int ret, i;
 793
 794         adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
 795         if (!adau1701)
 796                 return -ENOMEM;
 797
 798         for (i = 0; i < ARRAY_SIZE(supply_names); i++)
 799                 adau1701->supplies[i].supply = supply_names[i];
 800
 801         ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
 802                         adau1701->supplies);
 803         if (ret < 0) {
 804                 dev_err(dev, "Failed to get regulators: %d\n", ret);
 805                 return ret;
 806         }
 807
 808         ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
 809                         adau1701->supplies);
 810         if (ret < 0) {
 811                 dev_err(dev, "Failed to enable regulators: %d\n", ret);
 812                 return ret;
 813         }
 814
 815         adau1701->client = client;
 816         adau1701->regmap = devm_regmap_init(dev, NULL, client,
 817                                             &adau1701_regmap);
 818         if (IS_ERR(adau1701->regmap)) {
 819                 ret = PTR_ERR(adau1701->regmap);
 820                 goto exit_regulators_disable;
 821         }
 822
 823
 824         if (dev->of_node) {
 825                 gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
 826                 if (gpio_nreset < 0 && gpio_nreset != -ENOENT) {
 827                         ret = gpio_nreset;
 828                         goto exit_regulators_disable;
 829                 }
 830
 831                 gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
 832                                                    "adi,pll-mode-gpios", 0);
 833                 if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT) {
 834                         ret = gpio_pll_mode[0];
 835                         goto exit_regulators_disable;
 836                 }
 837
 838                 gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
 839                                                    "adi,pll-mode-gpios", 1);
 840                 if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT) {
 841                         ret = gpio_pll_mode[1];
 842                         goto exit_regulators_disable;
 843                 }
 844
 845                 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
 846                                      &adau1701->pll_clkdiv);
 847
 848                 of_property_read_u8_array(dev->of_node, "adi,pin-config",
 849                                           adau1701->pin_config,
 850                                           ARRAY_SIZE(adau1701->pin_config));
 851         }
 852
 853         if (gpio_is_valid(gpio_nreset)) {
 854                 ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW,
 855                                             "ADAU1701 Reset");
 856                 if (ret < 0)
 857                         goto exit_regulators_disable;
 858         }
 859
 860         if (gpio_is_valid(gpio_pll_mode[0]) &&
 861             gpio_is_valid(gpio_pll_mode[1])) {
 862                 ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
 863                                             GPIOF_OUT_INIT_LOW,
 864                                             "ADAU1701 PLL mode 0");
 865                 if (ret < 0)
 866                         goto exit_regulators_disable;
 867
 868                 ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
 869                                             GPIOF_OUT_INIT_LOW,
 870                                             "ADAU1701 PLL mode 1");
 871                 if (ret < 0)
 872                         goto exit_regulators_disable;
 873         }
 874
 875         adau1701->gpio_nreset = gpio_nreset;
 876         adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
 877         adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
 878
 879         i2c_set_clientdata(client, adau1701);
 880
 881         adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
 882                 &adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
 883         if (IS_ERR(adau1701->sigmadsp)) {
 884                 ret = PTR_ERR(adau1701->sigmadsp);
 885                 goto exit_regulators_disable;
 886         }
 887
 888         ret = devm_snd_soc_register_component(&client->dev,
 889                         &adau1701_component_drv,
 890                         &adau1701_dai, 1);
 891
 892 exit_regulators_disable:
 893
 894         regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
 895         return ret;
 896 }
 897
 898 static const struct i2c_device_id adau1701_i2c_id[] = {
 899         { "adau1401", 0 },
 900         { "adau1401a", 0 },
 901         { "adau1701", 0 },
 902         { "adau1702", 0 },
 903         { }
 904 };
 905 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
 906
 907 static struct i2c_driver adau1701_i2c_driver = {
 908         .driver = {
 909                 .name   = "adau1701",
 910                 .of_match_table = of_match_ptr(adau1701_dt_ids),
 911         },
 912         .probe          = adau1701_i2c_probe,
 913         .id_table       = adau1701_i2c_id,
 914 };
 915
 916 module_i2c_driver(adau1701_i2c_driver);
 917
 918 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
 919 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
 920 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 921 MODULE_LICENSE("GPL");