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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / sound / soc / codecs / cs42l51.c
blobe47758e4fb3600df2cb9975b3c18221323c52a9a
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * cs42l51.c
4 *
5 * ASoC Driver for Cirrus Logic CS42L51 codecs
6 *
7 * Copyright (c) 2010 Arnaud Patard <apatard@mandriva.com>
8 *
9 * Based on cs4270.c - Copyright (c) Freescale Semiconductor
10 *
11 * For now:
12 * - Only I2C is support. Not SPI
13 * - master mode *NOT* supported
14 */
15
16 #include <linux/clk.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <sound/core.h>
20 #include <sound/soc.h>
21 #include <sound/tlv.h>
22 #include <sound/initval.h>
23 #include <sound/pcm_params.h>
24 #include <sound/pcm.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/regmap.h>
27 #include <linux/regulator/consumer.h>
28
29 #include "cs42l51.h"
30
31 enum master_slave_mode {
32 MODE_SLAVE,
33 MODE_SLAVE_AUTO,
34 MODE_MASTER,
35 };
36
37 static const char * const cs42l51_supply_names[] = {
38 "VL",
39 "VD",
40 "VA",
41 "VAHP",
42 };
43
44 struct cs42l51_private {
45 unsigned int mclk;
46 struct clk *mclk_handle;
47 unsigned int audio_mode; /* The mode (I2S or left-justified) */
48 enum master_slave_mode func;
49 struct regulator_bulk_data supplies[ARRAY_SIZE(cs42l51_supply_names)];
50 struct gpio_desc *reset_gpio;
51 struct regmap *regmap;
52 };
53
54 #define CS42L51_FORMATS ( \
55 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
56 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
57 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
58 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
59
60 static int cs42l51_get_chan_mix(struct snd_kcontrol *kcontrol,
61 struct snd_ctl_elem_value *ucontrol)
62 {
63 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
64 unsigned long value = snd_soc_component_read32(component, CS42L51_PCM_MIXER)&3;
65
66 switch (value) {
67 default:
68 case 0:
69 ucontrol->value.enumerated.item[0] = 0;
70 break;
71 /* same value : (L+R)/2 and (R+L)/2 */
72 case 1:
73 case 2:
74 ucontrol->value.enumerated.item[0] = 1;
75 break;
76 case 3:
77 ucontrol->value.enumerated.item[0] = 2;
78 break;
79 }
80
81 return 0;
82 }
83
84 #define CHAN_MIX_NORMAL 0x00
85 #define CHAN_MIX_BOTH 0x55
86 #define CHAN_MIX_SWAP 0xFF
87
88 static int cs42l51_set_chan_mix(struct snd_kcontrol *kcontrol,
89 struct snd_ctl_elem_value *ucontrol)
90 {
91 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
92 unsigned char val;
93
94 switch (ucontrol->value.enumerated.item[0]) {
95 default:
96 case 0:
97 val = CHAN_MIX_NORMAL;
98 break;
99 case 1:
100 val = CHAN_MIX_BOTH;
101 break;
102 case 2:
103 val = CHAN_MIX_SWAP;
104 break;
105 }
106
107 snd_soc_component_write(component, CS42L51_PCM_MIXER, val);
108
109 return 1;
110 }
111
112 static const DECLARE_TLV_DB_SCALE(adc_pcm_tlv, -5150, 50, 0);
113 static const DECLARE_TLV_DB_SCALE(tone_tlv, -1050, 150, 0);
114
115 static const DECLARE_TLV_DB_SCALE(aout_tlv, -10200, 50, 0);
116
117 static const DECLARE_TLV_DB_SCALE(boost_tlv, 1600, 1600, 0);
118 static const DECLARE_TLV_DB_SCALE(adc_boost_tlv, 2000, 2000, 0);
119 static const char *chan_mix[] = {
120 "L R",
121 "L+R",
122 "R L",
123 };
124
125 static SOC_ENUM_SINGLE_EXT_DECL(cs42l51_chan_mix, chan_mix);
126
127 static const struct snd_kcontrol_new cs42l51_snd_controls[] = {
128 SOC_DOUBLE_R_SX_TLV("PCM Playback Volume",
129 CS42L51_PCMA_VOL, CS42L51_PCMB_VOL,
130 0, 0x19, 0x7F, adc_pcm_tlv),
131 SOC_DOUBLE_R("PCM Playback Switch",
132 CS42L51_PCMA_VOL, CS42L51_PCMB_VOL, 7, 1, 1),
133 SOC_DOUBLE_R_SX_TLV("Analog Playback Volume",
134 CS42L51_AOUTA_VOL, CS42L51_AOUTB_VOL,
135 0, 0x34, 0xE4, aout_tlv),
136 SOC_DOUBLE_R_SX_TLV("ADC Mixer Volume",
137 CS42L51_ADCA_VOL, CS42L51_ADCB_VOL,
138 0, 0x19, 0x7F, adc_pcm_tlv),
139 SOC_DOUBLE_R("ADC Mixer Switch",
140 CS42L51_ADCA_VOL, CS42L51_ADCB_VOL, 7, 1, 1),
141 SOC_SINGLE("Playback Deemphasis Switch", CS42L51_DAC_CTL, 3, 1, 0),
142 SOC_SINGLE("Auto-Mute Switch", CS42L51_DAC_CTL, 2, 1, 0),
143 SOC_SINGLE("Soft Ramp Switch", CS42L51_DAC_CTL, 1, 1, 0),
144 SOC_SINGLE("Zero Cross Switch", CS42L51_DAC_CTL, 0, 0, 0),
145 SOC_DOUBLE_TLV("Mic Boost Volume",
146 CS42L51_MIC_CTL, 0, 1, 1, 0, boost_tlv),
147 SOC_DOUBLE_TLV("ADC Boost Volume",
148 CS42L51_MIC_CTL, 5, 6, 1, 0, adc_boost_tlv),
149 SOC_SINGLE_TLV("Bass Volume", CS42L51_TONE_CTL, 0, 0xf, 1, tone_tlv),
150 SOC_SINGLE_TLV("Treble Volume", CS42L51_TONE_CTL, 4, 0xf, 1, tone_tlv),
151 SOC_ENUM_EXT("PCM channel mixer",
152 cs42l51_chan_mix,
153 cs42l51_get_chan_mix, cs42l51_set_chan_mix),
154 };
155
156 /*
157 * to power down, one must:
158 * 1.) Enable the PDN bit
159 * 2.) enable power-down for the select channels
160 * 3.) disable the PDN bit.
161 */
162 static int cs42l51_pdn_event(struct snd_soc_dapm_widget *w,
163 struct snd_kcontrol *kcontrol, int event)
164 {
165 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
166
167 switch (event) {
168 case SND_SOC_DAPM_PRE_PMD:
169 snd_soc_component_update_bits(component, CS42L51_POWER_CTL1,
170 CS42L51_POWER_CTL1_PDN,
171 CS42L51_POWER_CTL1_PDN);
172 break;
173 default:
174 case SND_SOC_DAPM_POST_PMD:
175 snd_soc_component_update_bits(component, CS42L51_POWER_CTL1,
176 CS42L51_POWER_CTL1_PDN, 0);
177 break;
178 }
179
180 return 0;
181 }
182
183 static const char *cs42l51_dac_names[] = {"Direct PCM",
184 "DSP PCM", "ADC"};
185 static SOC_ENUM_SINGLE_DECL(cs42l51_dac_mux_enum,
186 CS42L51_DAC_CTL, 6, cs42l51_dac_names);
187 static const struct snd_kcontrol_new cs42l51_dac_mux_controls =
188 SOC_DAPM_ENUM("Route", cs42l51_dac_mux_enum);
189
190 static const char *cs42l51_adcl_names[] = {"AIN1 Left", "AIN2 Left",
191 "MIC Left", "MIC+preamp Left"};
192 static SOC_ENUM_SINGLE_DECL(cs42l51_adcl_mux_enum,
193 CS42L51_ADC_INPUT, 4, cs42l51_adcl_names);
194 static const struct snd_kcontrol_new cs42l51_adcl_mux_controls =
195 SOC_DAPM_ENUM("Route", cs42l51_adcl_mux_enum);
196
197 static const char *cs42l51_adcr_names[] = {"AIN1 Right", "AIN2 Right",
198 "MIC Right", "MIC+preamp Right"};
199 static SOC_ENUM_SINGLE_DECL(cs42l51_adcr_mux_enum,
200 CS42L51_ADC_INPUT, 6, cs42l51_adcr_names);
201 static const struct snd_kcontrol_new cs42l51_adcr_mux_controls =
202 SOC_DAPM_ENUM("Route", cs42l51_adcr_mux_enum);
203
204 static const struct snd_soc_dapm_widget cs42l51_dapm_widgets[] = {
205 SND_SOC_DAPM_SUPPLY("Mic Bias", CS42L51_MIC_POWER_CTL, 1, 1, NULL,
206 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
207 SND_SOC_DAPM_PGA_E("Left PGA", CS42L51_POWER_CTL1, 3, 1, NULL, 0,
208 cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
209 SND_SOC_DAPM_PGA_E("Right PGA", CS42L51_POWER_CTL1, 4, 1, NULL, 0,
210 cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
211 SND_SOC_DAPM_ADC_E("Left ADC", "Left HiFi Capture",
212 CS42L51_POWER_CTL1, 1, 1,
213 cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
214 SND_SOC_DAPM_ADC_E("Right ADC", "Right HiFi Capture",
215 CS42L51_POWER_CTL1, 2, 1,
216 cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
217 SND_SOC_DAPM_DAC_E("Left DAC", NULL, CS42L51_POWER_CTL1, 5, 1,
218 cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
219 SND_SOC_DAPM_DAC_E("Right DAC", NULL, CS42L51_POWER_CTL1, 6, 1,
220 cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
221
222 /* analog/mic */
223 SND_SOC_DAPM_INPUT("AIN1L"),
224 SND_SOC_DAPM_INPUT("AIN1R"),
225 SND_SOC_DAPM_INPUT("AIN2L"),
226 SND_SOC_DAPM_INPUT("AIN2R"),
227 SND_SOC_DAPM_INPUT("MICL"),
228 SND_SOC_DAPM_INPUT("MICR"),
229
230 SND_SOC_DAPM_MIXER("Mic Preamp Left",
231 CS42L51_MIC_POWER_CTL, 2, 1, NULL, 0),
232 SND_SOC_DAPM_MIXER("Mic Preamp Right",
233 CS42L51_MIC_POWER_CTL, 3, 1, NULL, 0),
234
235 /* HP */
236 SND_SOC_DAPM_OUTPUT("HPL"),
237 SND_SOC_DAPM_OUTPUT("HPR"),
238
239 /* mux */
240 SND_SOC_DAPM_MUX("DAC Mux", SND_SOC_NOPM, 0, 0,
241 &cs42l51_dac_mux_controls),
242 SND_SOC_DAPM_MUX("PGA-ADC Mux Left", SND_SOC_NOPM, 0, 0,
243 &cs42l51_adcl_mux_controls),
244 SND_SOC_DAPM_MUX("PGA-ADC Mux Right", SND_SOC_NOPM, 0, 0,
245 &cs42l51_adcr_mux_controls),
246 };
247
248 static const struct snd_soc_dapm_widget cs42l51_dapm_mclk_widgets[] = {
249 SND_SOC_DAPM_CLOCK_SUPPLY("MCLK")
250 };
251
252 static const struct snd_soc_dapm_route cs42l51_routes[] = {
253 {"HPL", NULL, "Left DAC"},
254 {"HPR", NULL, "Right DAC"},
255
256 {"Right DAC", NULL, "DAC Mux"},
257 {"Left DAC", NULL, "DAC Mux"},
258
259 {"DAC Mux", "Direct PCM", "Playback"},
260 {"DAC Mux", "DSP PCM", "Playback"},
261
262 {"Left ADC", NULL, "Left PGA"},
263 {"Right ADC", NULL, "Right PGA"},
264
265 {"Mic Preamp Left", NULL, "MICL"},
266 {"Mic Preamp Right", NULL, "MICR"},
267
268 {"PGA-ADC Mux Left", "AIN1 Left", "AIN1L" },
269 {"PGA-ADC Mux Left", "AIN2 Left", "AIN2L" },
270 {"PGA-ADC Mux Left", "MIC Left", "MICL" },
271 {"PGA-ADC Mux Left", "MIC+preamp Left", "Mic Preamp Left" },
272 {"PGA-ADC Mux Right", "AIN1 Right", "AIN1R" },
273 {"PGA-ADC Mux Right", "AIN2 Right", "AIN2R" },
274 {"PGA-ADC Mux Right", "MIC Right", "MICR" },
275 {"PGA-ADC Mux Right", "MIC+preamp Right", "Mic Preamp Right" },
276
277 {"Left PGA", NULL, "PGA-ADC Mux Left"},
278 {"Right PGA", NULL, "PGA-ADC Mux Right"},
279 };
280
281 static int cs42l51_set_dai_fmt(struct snd_soc_dai *codec_dai,
282 unsigned int format)
283 {
284 struct snd_soc_component *component = codec_dai->component;
285 struct cs42l51_private *cs42l51 = snd_soc_component_get_drvdata(component);
286
287 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
288 case SND_SOC_DAIFMT_I2S:
289 case SND_SOC_DAIFMT_LEFT_J:
290 case SND_SOC_DAIFMT_RIGHT_J:
291 cs42l51->audio_mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
292 break;
293 default:
294 dev_err(component->dev, "invalid DAI format\n");
295 return -EINVAL;
296 }
297
298 switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
299 case SND_SOC_DAIFMT_CBM_CFM:
300 cs42l51->func = MODE_MASTER;
301 break;
302 case SND_SOC_DAIFMT_CBS_CFS:
303 cs42l51->func = MODE_SLAVE_AUTO;
304 break;
305 default:
306 dev_err(component->dev, "Unknown master/slave configuration\n");
307 return -EINVAL;
308 }
309
310 return 0;
311 }
312
313 struct cs42l51_ratios {
314 unsigned int ratio;
315 unsigned char speed_mode;
316 unsigned char mclk;
317 };
318
319 static struct cs42l51_ratios slave_ratios[] = {
320 { 512, CS42L51_QSM_MODE, 0 }, { 768, CS42L51_QSM_MODE, 0 },
321 { 1024, CS42L51_QSM_MODE, 0 }, { 1536, CS42L51_QSM_MODE, 0 },
322 { 2048, CS42L51_QSM_MODE, 0 }, { 3072, CS42L51_QSM_MODE, 0 },
323 { 256, CS42L51_HSM_MODE, 0 }, { 384, CS42L51_HSM_MODE, 0 },
324 { 512, CS42L51_HSM_MODE, 0 }, { 768, CS42L51_HSM_MODE, 0 },
325 { 1024, CS42L51_HSM_MODE, 0 }, { 1536, CS42L51_HSM_MODE, 0 },
326 { 128, CS42L51_SSM_MODE, 0 }, { 192, CS42L51_SSM_MODE, 0 },
327 { 256, CS42L51_SSM_MODE, 0 }, { 384, CS42L51_SSM_MODE, 0 },
328 { 512, CS42L51_SSM_MODE, 0 }, { 768, CS42L51_SSM_MODE, 0 },
329 { 128, CS42L51_DSM_MODE, 0 }, { 192, CS42L51_DSM_MODE, 0 },
330 { 256, CS42L51_DSM_MODE, 0 }, { 384, CS42L51_DSM_MODE, 0 },
331 };
332
333 static struct cs42l51_ratios slave_auto_ratios[] = {
334 { 1024, CS42L51_QSM_MODE, 0 }, { 1536, CS42L51_QSM_MODE, 0 },
335 { 2048, CS42L51_QSM_MODE, 1 }, { 3072, CS42L51_QSM_MODE, 1 },
336 { 512, CS42L51_HSM_MODE, 0 }, { 768, CS42L51_HSM_MODE, 0 },
337 { 1024, CS42L51_HSM_MODE, 1 }, { 1536, CS42L51_HSM_MODE, 1 },
338 { 256, CS42L51_SSM_MODE, 0 }, { 384, CS42L51_SSM_MODE, 0 },
339 { 512, CS42L51_SSM_MODE, 1 }, { 768, CS42L51_SSM_MODE, 1 },
340 { 128, CS42L51_DSM_MODE, 0 }, { 192, CS42L51_DSM_MODE, 0 },
341 { 256, CS42L51_DSM_MODE, 1 }, { 384, CS42L51_DSM_MODE, 1 },
342 };
343
344 /*
345 * Master mode mclk/fs ratios.
346 * Recommended configurations are SSM for 4-50khz and DSM for 50-100kHz ranges
347 * The table below provides support of following ratios:
348 * 128: SSM (%128) with div2 disabled
349 * 256: SSM (%128) with div2 enabled
350 * In both cases, if sampling rate is above 50kHz, SSM is overridden
351 * with DSM (%128) configuration
352 */
353 static struct cs42l51_ratios master_ratios[] = {
354 { 128, CS42L51_SSM_MODE, 0 }, { 256, CS42L51_SSM_MODE, 1 },
355 };
356
357 static int cs42l51_set_dai_sysclk(struct snd_soc_dai *codec_dai,
358 int clk_id, unsigned int freq, int dir)
359 {
360 struct snd_soc_component *component = codec_dai->component;
361 struct cs42l51_private *cs42l51 = snd_soc_component_get_drvdata(component);
362
363 cs42l51->mclk = freq;
364 return 0;
365 }
366
367 static int cs42l51_hw_params(struct snd_pcm_substream *substream,
368 struct snd_pcm_hw_params *params,
369 struct snd_soc_dai *dai)
370 {
371 struct snd_soc_component *component = dai->component;
372 struct cs42l51_private *cs42l51 = snd_soc_component_get_drvdata(component);
373 int ret;
374 unsigned int i;
375 unsigned int rate;
376 unsigned int ratio;
377 struct cs42l51_ratios *ratios = NULL;
378 int nr_ratios = 0;
379 int intf_ctl, power_ctl, fmt, mode;
380
381 switch (cs42l51->func) {
382 case MODE_MASTER:
383 ratios = master_ratios;
384 nr_ratios = ARRAY_SIZE(master_ratios);
385 break;
386 case MODE_SLAVE:
387 ratios = slave_ratios;
388 nr_ratios = ARRAY_SIZE(slave_ratios);
389 break;
390 case MODE_SLAVE_AUTO:
391 ratios = slave_auto_ratios;
392 nr_ratios = ARRAY_SIZE(slave_auto_ratios);
393 break;
394 }
395
396 /* Figure out which MCLK/LRCK ratio to use */
397 rate = params_rate(params); /* Sampling rate, in Hz */
398 ratio = cs42l51->mclk / rate; /* MCLK/LRCK ratio */
399 for (i = 0; i < nr_ratios; i++) {
400 if (ratios[i].ratio == ratio)
401 break;
402 }
403
404 if (i == nr_ratios) {
405 /* We did not find a matching ratio */
406 dev_err(component->dev, "could not find matching ratio\n");
407 return -EINVAL;
408 }
409
410 intf_ctl = snd_soc_component_read32(component, CS42L51_INTF_CTL);
411 power_ctl = snd_soc_component_read32(component, CS42L51_MIC_POWER_CTL);
412
413 intf_ctl &= ~(CS42L51_INTF_CTL_MASTER | CS42L51_INTF_CTL_ADC_I2S
414 | CS42L51_INTF_CTL_DAC_FORMAT(7));
415 power_ctl &= ~(CS42L51_MIC_POWER_CTL_SPEED(3)
416 | CS42L51_MIC_POWER_CTL_MCLK_DIV2);
417
418 switch (cs42l51->func) {
419 case MODE_MASTER:
420 intf_ctl |= CS42L51_INTF_CTL_MASTER;
421 mode = ratios[i].speed_mode;
422 /* Force DSM mode if sampling rate is above 50kHz */
423 if (rate > 50000)
424 mode = CS42L51_DSM_MODE;
425 power_ctl |= CS42L51_MIC_POWER_CTL_SPEED(mode);
426 /*
427 * Auto detect mode is not applicable for master mode and has to
428 * be disabled. Otherwise SPEED[1:0] bits will be ignored.
429 */
430 power_ctl &= ~CS42L51_MIC_POWER_CTL_AUTO;
431 break;
432 case MODE_SLAVE:
433 power_ctl |= CS42L51_MIC_POWER_CTL_SPEED(ratios[i].speed_mode);
434 break;
435 case MODE_SLAVE_AUTO:
436 power_ctl |= CS42L51_MIC_POWER_CTL_AUTO;
437 break;
438 }
439
440 switch (cs42l51->audio_mode) {
441 case SND_SOC_DAIFMT_I2S:
442 intf_ctl |= CS42L51_INTF_CTL_ADC_I2S;
443 intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_I2S);
444 break;
445 case SND_SOC_DAIFMT_LEFT_J:
446 intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_LJ24);
447 break;
448 case SND_SOC_DAIFMT_RIGHT_J:
449 switch (params_width(params)) {
450 case 16:
451 fmt = CS42L51_DAC_DIF_RJ16;
452 break;
453 case 18:
454 fmt = CS42L51_DAC_DIF_RJ18;
455 break;
456 case 20:
457 fmt = CS42L51_DAC_DIF_RJ20;
458 break;
459 case 24:
460 fmt = CS42L51_DAC_DIF_RJ24;
461 break;
462 default:
463 dev_err(component->dev, "unknown format\n");
464 return -EINVAL;
465 }
466 intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(fmt);
467 break;
468 default:
469 dev_err(component->dev, "unknown format\n");
470 return -EINVAL;
471 }
472
473 if (ratios[i].mclk)
474 power_ctl |= CS42L51_MIC_POWER_CTL_MCLK_DIV2;
475
476 ret = snd_soc_component_write(component, CS42L51_INTF_CTL, intf_ctl);
477 if (ret < 0)
478 return ret;
479
480 ret = snd_soc_component_write(component, CS42L51_MIC_POWER_CTL, power_ctl);
481 if (ret < 0)
482 return ret;
483
484 return 0;
485 }
486
487 static int cs42l51_dai_mute(struct snd_soc_dai *dai, int mute)
488 {
489 struct snd_soc_component *component = dai->component;
490 int reg;
491 int mask = CS42L51_DAC_OUT_CTL_DACA_MUTE|CS42L51_DAC_OUT_CTL_DACB_MUTE;
492
493 reg = snd_soc_component_read32(component, CS42L51_DAC_OUT_CTL);
494
495 if (mute)
496 reg |= mask;
497 else
498 reg &= ~mask;
499
500 return snd_soc_component_write(component, CS42L51_DAC_OUT_CTL, reg);
501 }
502
503 static int cs42l51_of_xlate_dai_id(struct snd_soc_component *component,
504 struct device_node *endpoint)
505 {
506 /* return dai id 0, whatever the endpoint index */
507 return 0;
508 }
509
510 static const struct snd_soc_dai_ops cs42l51_dai_ops = {
511 .hw_params = cs42l51_hw_params,
512 .set_sysclk = cs42l51_set_dai_sysclk,
513 .set_fmt = cs42l51_set_dai_fmt,
514 .digital_mute = cs42l51_dai_mute,
515 };
516
517 static struct snd_soc_dai_driver cs42l51_dai = {
518 .name = "cs42l51-hifi",
519 .playback = {
520 .stream_name = "Playback",
521 .channels_min = 1,
522 .channels_max = 2,
523 .rates = SNDRV_PCM_RATE_8000_96000,
524 .formats = CS42L51_FORMATS,
525 },
526 .capture = {
527 .stream_name = "Capture",
528 .channels_min = 1,
529 .channels_max = 2,
530 .rates = SNDRV_PCM_RATE_8000_96000,
531 .formats = CS42L51_FORMATS,
532 },
533 .ops = &cs42l51_dai_ops,
534 };
535
536 static int cs42l51_component_probe(struct snd_soc_component *component)
537 {
538 int ret, reg;
539 struct snd_soc_dapm_context *dapm;
540 struct cs42l51_private *cs42l51;
541
542 cs42l51 = snd_soc_component_get_drvdata(component);
543 dapm = snd_soc_component_get_dapm(component);
544
545 if (cs42l51->mclk_handle)
546 snd_soc_dapm_new_controls(dapm, cs42l51_dapm_mclk_widgets, 1);
547
548 /*
549 * DAC configuration
550 * - Use signal processor
551 * - auto mute
552 * - vol changes immediate
553 * - no de-emphasize
554 */
555 reg = CS42L51_DAC_CTL_DATA_SEL(1)
556 | CS42L51_DAC_CTL_AMUTE | CS42L51_DAC_CTL_DACSZ(0);
557 ret = snd_soc_component_write(component, CS42L51_DAC_CTL, reg);
558 if (ret < 0)
559 return ret;
560
561 return 0;
562 }
563
564 static const struct snd_soc_component_driver soc_component_device_cs42l51 = {
565 .probe = cs42l51_component_probe,
566 .controls = cs42l51_snd_controls,
567 .num_controls = ARRAY_SIZE(cs42l51_snd_controls),
568 .dapm_widgets = cs42l51_dapm_widgets,
569 .num_dapm_widgets = ARRAY_SIZE(cs42l51_dapm_widgets),
570 .dapm_routes = cs42l51_routes,
571 .num_dapm_routes = ARRAY_SIZE(cs42l51_routes),
572 .of_xlate_dai_id = cs42l51_of_xlate_dai_id,
573 .idle_bias_on = 1,
574 .use_pmdown_time = 1,
575 .endianness = 1,
576 .non_legacy_dai_naming = 1,
577 };
578
579 static bool cs42l51_writeable_reg(struct device *dev, unsigned int reg)
580 {
581 switch (reg) {
582 case CS42L51_POWER_CTL1:
583 case CS42L51_MIC_POWER_CTL:
584 case CS42L51_INTF_CTL:
585 case CS42L51_MIC_CTL:
586 case CS42L51_ADC_CTL:
587 case CS42L51_ADC_INPUT:
588 case CS42L51_DAC_OUT_CTL:
589 case CS42L51_DAC_CTL:
590 case CS42L51_ALC_PGA_CTL:
591 case CS42L51_ALC_PGB_CTL:
592 case CS42L51_ADCA_ATT:
593 case CS42L51_ADCB_ATT:
594 case CS42L51_ADCA_VOL:
595 case CS42L51_ADCB_VOL:
596 case CS42L51_PCMA_VOL:
597 case CS42L51_PCMB_VOL:
598 case CS42L51_BEEP_FREQ:
599 case CS42L51_BEEP_VOL:
600 case CS42L51_BEEP_CONF:
601 case CS42L51_TONE_CTL:
602 case CS42L51_AOUTA_VOL:
603 case CS42L51_AOUTB_VOL:
604 case CS42L51_PCM_MIXER:
605 case CS42L51_LIMIT_THRES_DIS:
606 case CS42L51_LIMIT_REL:
607 case CS42L51_LIMIT_ATT:
608 case CS42L51_ALC_EN:
609 case CS42L51_ALC_REL:
610 case CS42L51_ALC_THRES:
611 case CS42L51_NOISE_CONF:
612 case CS42L51_CHARGE_FREQ:
613 return true;
614 default:
615 return false;
616 }
617 }
618
619 static bool cs42l51_volatile_reg(struct device *dev, unsigned int reg)
620 {
621 switch (reg) {
622 case CS42L51_STATUS:
623 return true;
624 default:
625 return false;
626 }
627 }
628
629 static bool cs42l51_readable_reg(struct device *dev, unsigned int reg)
630 {
631 switch (reg) {
632 case CS42L51_CHIP_REV_ID:
633 case CS42L51_POWER_CTL1:
634 case CS42L51_MIC_POWER_CTL:
635 case CS42L51_INTF_CTL:
636 case CS42L51_MIC_CTL:
637 case CS42L51_ADC_CTL:
638 case CS42L51_ADC_INPUT:
639 case CS42L51_DAC_OUT_CTL:
640 case CS42L51_DAC_CTL:
641 case CS42L51_ALC_PGA_CTL:
642 case CS42L51_ALC_PGB_CTL:
643 case CS42L51_ADCA_ATT:
644 case CS42L51_ADCB_ATT:
645 case CS42L51_ADCA_VOL:
646 case CS42L51_ADCB_VOL:
647 case CS42L51_PCMA_VOL:
648 case CS42L51_PCMB_VOL:
649 case CS42L51_BEEP_FREQ:
650 case CS42L51_BEEP_VOL:
651 case CS42L51_BEEP_CONF:
652 case CS42L51_TONE_CTL:
653 case CS42L51_AOUTA_VOL:
654 case CS42L51_AOUTB_VOL:
655 case CS42L51_PCM_MIXER:
656 case CS42L51_LIMIT_THRES_DIS:
657 case CS42L51_LIMIT_REL:
658 case CS42L51_LIMIT_ATT:
659 case CS42L51_ALC_EN:
660 case CS42L51_ALC_REL:
661 case CS42L51_ALC_THRES:
662 case CS42L51_NOISE_CONF:
663 case CS42L51_STATUS:
664 case CS42L51_CHARGE_FREQ:
665 return true;
666 default:
667 return false;
668 }
669 }
670
671 const struct regmap_config cs42l51_regmap = {
672 .reg_bits = 8,
673 .reg_stride = 1,
674 .val_bits = 8,
675 .use_single_write = true,
676 .readable_reg = cs42l51_readable_reg,
677 .volatile_reg = cs42l51_volatile_reg,
678 .writeable_reg = cs42l51_writeable_reg,
679 .max_register = CS42L51_CHARGE_FREQ,
680 .cache_type = REGCACHE_RBTREE,
681 };
682 EXPORT_SYMBOL_GPL(cs42l51_regmap);
683
684 int cs42l51_probe(struct device *dev, struct regmap *regmap)
685 {
686 struct cs42l51_private *cs42l51;
687 unsigned int val;
688 int ret, i;
689
690 if (IS_ERR(regmap))
691 return PTR_ERR(regmap);
692
693 cs42l51 = devm_kzalloc(dev, sizeof(struct cs42l51_private),
694 GFP_KERNEL);
695 if (!cs42l51)
696 return -ENOMEM;
697
698 dev_set_drvdata(dev, cs42l51);
699 cs42l51->regmap = regmap;
700
701 cs42l51->mclk_handle = devm_clk_get(dev, "MCLK");
702 if (IS_ERR(cs42l51->mclk_handle)) {
703 if (PTR_ERR(cs42l51->mclk_handle) != -ENOENT)
704 return PTR_ERR(cs42l51->mclk_handle);
705 cs42l51->mclk_handle = NULL;
706 }
707
708 for (i = 0; i < ARRAY_SIZE(cs42l51->supplies); i++)
709 cs42l51->supplies[i].supply = cs42l51_supply_names[i];
710
711 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(cs42l51->supplies),
712 cs42l51->supplies);
713 if (ret != 0) {
714 dev_err(dev, "Failed to request supplies: %d\n", ret);
715 return ret;
716 }
717
718 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l51->supplies),
719 cs42l51->supplies);
720 if (ret != 0) {
721 dev_err(dev, "Failed to enable supplies: %d\n", ret);
722 return ret;
723 }
724
725 cs42l51->reset_gpio = devm_gpiod_get_optional(dev, "reset",
726 GPIOD_OUT_LOW);
727 if (IS_ERR(cs42l51->reset_gpio))
728 return PTR_ERR(cs42l51->reset_gpio);
729
730 if (cs42l51->reset_gpio) {
731 dev_dbg(dev, "Release reset gpio\n");
732 gpiod_set_value_cansleep(cs42l51->reset_gpio, 0);
733 mdelay(2);
734 }
735
736 /* Verify that we have a CS42L51 */
737 ret = regmap_read(regmap, CS42L51_CHIP_REV_ID, &val);
738 if (ret < 0) {
739 dev_err(dev, "failed to read I2C\n");
740 goto error;
741 }
742
743 if ((val != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_A)) &&
744 (val != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_B))) {
745 dev_err(dev, "Invalid chip id: %x\n", val);
746 ret = -ENODEV;
747 goto error;
748 }
749 dev_info(dev, "Cirrus Logic CS42L51, Revision: %02X\n",
750 val & CS42L51_CHIP_REV_MASK);
751
752 ret = devm_snd_soc_register_component(dev,
753 &soc_component_device_cs42l51, &cs42l51_dai, 1);
754 if (ret < 0)
755 goto error;
756
757 return 0;
758
759 error:
760 regulator_bulk_disable(ARRAY_SIZE(cs42l51->supplies),
761 cs42l51->supplies);
762 return ret;
763 }
764 EXPORT_SYMBOL_GPL(cs42l51_probe);
765
766 int cs42l51_remove(struct device *dev)
767 {
768 struct cs42l51_private *cs42l51 = dev_get_drvdata(dev);
769
770 gpiod_set_value_cansleep(cs42l51->reset_gpio, 1);
771
772 return regulator_bulk_disable(ARRAY_SIZE(cs42l51->supplies),
773 cs42l51->supplies);
774 }
775 EXPORT_SYMBOL_GPL(cs42l51_remove);
776
777 int __maybe_unused cs42l51_suspend(struct device *dev)
778 {
779 struct cs42l51_private *cs42l51 = dev_get_drvdata(dev);
780
781 regcache_cache_only(cs42l51->regmap, true);
782 regcache_mark_dirty(cs42l51->regmap);
783
784 return 0;
785 }
786 EXPORT_SYMBOL_GPL(cs42l51_suspend);
787
788 int __maybe_unused cs42l51_resume(struct device *dev)
789 {
790 struct cs42l51_private *cs42l51 = dev_get_drvdata(dev);
791
792 regcache_cache_only(cs42l51->regmap, false);
793
794 return regcache_sync(cs42l51->regmap);
795 }
796 EXPORT_SYMBOL_GPL(cs42l51_resume);
797
798 const struct of_device_id cs42l51_of_match[] = {
799 { .compatible = "cirrus,cs42l51", },
800 { }
801 };
802 MODULE_DEVICE_TABLE(of, cs42l51_of_match);
803 EXPORT_SYMBOL_GPL(cs42l51_of_match);
804
805 MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
806 MODULE_DESCRIPTION("Cirrus Logic CS42L51 ALSA SoC Codec Driver");
807 MODULE_LICENSE("GPL");
Linux with added FPC-III support