treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / sound / soc / codecs / rt711-sdw.c
blob85e62e1059cd050f098fcb30bd6dba0566828ac6
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // rt711-sdw.c -- rt711 ALSA SoC audio driver
4 //
5 // Copyright(c) 2019 Realtek Semiconductor Corp.
6 //
7 //
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/mod_devicetable.h>
12 #include <linux/soundwire/sdw.h>
13 #include <linux/soundwire/sdw_type.h>
14 #include <linux/module.h>
15 #include <linux/regmap.h>
16 #include <sound/soc.h>
17 #include "rt711.h"
18 #include "rt711-sdw.h"
20 static bool rt711_readable_register(struct device *dev, unsigned int reg)
22 switch (reg) {
23 case 0x00e0:
24 case 0x00f0:
25 case 0x2012 ... 0x2016:
26 case 0x201a ... 0x2027:
27 case 0x2029 ... 0x202a:
28 case 0x202d ... 0x2034:
29 case 0x2201 ... 0x2204:
30 case 0x2206 ... 0x2212:
31 case 0x2220 ... 0x2223:
32 case 0x2230 ... 0x2239:
33 case 0x2f01 ... 0x2f0f:
34 case 0x3000 ... 0x3fff:
35 case 0x7000 ... 0x7fff:
36 case 0x8300 ... 0x83ff:
37 case 0x9c00 ... 0x9cff:
38 case 0xb900 ... 0xb9ff:
39 case 0x752009:
40 case 0x752011:
41 case 0x75201a:
42 case 0x752045:
43 case 0x752046:
44 case 0x752048:
45 case 0x75204a:
46 case 0x75206b:
47 case 0x75206f:
48 case 0x752080:
49 case 0x752081:
50 case 0x752091:
51 case 0x755800:
52 return true;
53 default:
54 return false;
58 static bool rt711_volatile_register(struct device *dev, unsigned int reg)
60 switch (reg) {
61 case 0x2016:
62 case 0x201b:
63 case 0x201c:
64 case 0x201d:
65 case 0x201f:
66 case 0x2021:
67 case 0x2023:
68 case 0x2230:
69 case 0x2012 ... 0x2015: /* HD-A read */
70 case 0x202d ... 0x202f: /* BRA */
71 case 0x2201 ... 0x2212: /* i2c debug */
72 case 0x2220 ... 0x2223: /* decoded HD-A */
73 case 0x9c00 ... 0x9cff:
74 case 0xb900 ... 0xb9ff:
75 case 0xff01:
76 case 0x75201a:
77 case 0x752046:
78 case 0x752080:
79 case 0x752081:
80 case 0x755800:
81 return true;
82 default:
83 return false;
87 static int rt711_sdw_read(void *context, unsigned int reg, unsigned int *val)
89 struct device *dev = context;
90 struct rt711_priv *rt711 = dev_get_drvdata(dev);
91 unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
92 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
93 unsigned int is_hda_reg = 1, is_index_reg = 0;
94 int ret;
96 if (reg > 0xffff)
97 is_index_reg = 1;
99 mask = reg & 0xf000;
101 if (is_index_reg) { /* index registers */
102 val2 = reg & 0xff;
103 reg = reg >> 8;
104 nid = reg & 0xff;
105 ret = regmap_write(rt711->sdw_regmap, reg, 0);
106 if (ret < 0)
107 return ret;
108 reg2 = reg + 0x1000;
109 reg2 |= 0x80;
110 ret = regmap_write(rt711->sdw_regmap, reg2, val2);
111 if (ret < 0)
112 return ret;
114 reg3 = RT711_PRIV_DATA_R_H | nid;
115 ret = regmap_write(rt711->sdw_regmap,
116 reg3, ((*val >> 8) & 0xff));
117 if (ret < 0)
118 return ret;
119 reg4 = reg3 + 0x1000;
120 reg4 |= 0x80;
121 ret = regmap_write(rt711->sdw_regmap, reg4, (*val & 0xff));
122 if (ret < 0)
123 return ret;
124 } else if (mask == 0x3000) {
125 reg += 0x8000;
126 ret = regmap_write(rt711->sdw_regmap, reg, *val);
127 if (ret < 0)
128 return ret;
129 } else if (mask == 0x7000) {
130 reg += 0x2000;
131 reg |= 0x800;
132 ret = regmap_write(rt711->sdw_regmap,
133 reg, ((*val >> 8) & 0xff));
134 if (ret < 0)
135 return ret;
136 reg2 = reg + 0x1000;
137 reg2 |= 0x80;
138 ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff));
139 if (ret < 0)
140 return ret;
141 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
142 reg2 = reg - 0x1000;
143 reg2 &= ~0x80;
144 ret = regmap_write(rt711->sdw_regmap,
145 reg2, ((*val >> 8) & 0xff));
146 if (ret < 0)
147 return ret;
148 ret = regmap_write(rt711->sdw_regmap, reg, (*val & 0xff));
149 if (ret < 0)
150 return ret;
151 } else if (mask == 0x9000) {
152 ret = regmap_write(rt711->sdw_regmap,
153 reg, ((*val >> 8) & 0xff));
154 if (ret < 0)
155 return ret;
156 reg2 = reg + 0x1000;
157 reg2 |= 0x80;
158 ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff));
159 if (ret < 0)
160 return ret;
161 } else if (mask == 0xb000) {
162 ret = regmap_write(rt711->sdw_regmap, reg, *val);
163 if (ret < 0)
164 return ret;
165 } else {
166 ret = regmap_read(rt711->sdw_regmap, reg, val);
167 if (ret < 0)
168 return ret;
169 is_hda_reg = 0;
172 if (is_hda_reg || is_index_reg) {
173 sdw_data_3 = 0;
174 sdw_data_2 = 0;
175 sdw_data_1 = 0;
176 sdw_data_0 = 0;
177 ret = regmap_read(rt711->sdw_regmap,
178 RT711_READ_HDA_3, &sdw_data_3);
179 if (ret < 0)
180 return ret;
181 ret = regmap_read(rt711->sdw_regmap,
182 RT711_READ_HDA_2, &sdw_data_2);
183 if (ret < 0)
184 return ret;
185 ret = regmap_read(rt711->sdw_regmap,
186 RT711_READ_HDA_1, &sdw_data_1);
187 if (ret < 0)
188 return ret;
189 ret = regmap_read(rt711->sdw_regmap,
190 RT711_READ_HDA_0, &sdw_data_0);
191 if (ret < 0)
192 return ret;
193 *val = ((sdw_data_3 & 0xff) << 24) |
194 ((sdw_data_2 & 0xff) << 16) |
195 ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
198 if (is_hda_reg == 0)
199 dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
200 else if (is_index_reg)
201 dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n",
202 __func__, reg, reg2, reg3, reg4, *val);
203 else
204 dev_dbg(dev, "[%s] %04x %04x => %08x\n",
205 __func__, reg, reg2, *val);
207 return 0;
210 static int rt711_sdw_write(void *context, unsigned int reg, unsigned int val)
212 struct device *dev = context;
213 struct rt711_priv *rt711 = dev_get_drvdata(dev);
214 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
215 unsigned int is_index_reg = 0;
216 int ret;
218 if (reg > 0xffff)
219 is_index_reg = 1;
221 mask = reg & 0xf000;
223 if (is_index_reg) { /* index registers */
224 val2 = reg & 0xff;
225 reg = reg >> 8;
226 nid = reg & 0xff;
227 ret = regmap_write(rt711->sdw_regmap, reg, 0);
228 if (ret < 0)
229 return ret;
230 reg2 = reg + 0x1000;
231 reg2 |= 0x80;
232 ret = regmap_write(rt711->sdw_regmap, reg2, val2);
233 if (ret < 0)
234 return ret;
236 reg3 = RT711_PRIV_DATA_W_H | nid;
237 ret = regmap_write(rt711->sdw_regmap,
238 reg3, ((val >> 8) & 0xff));
239 if (ret < 0)
240 return ret;
241 reg4 = reg3 + 0x1000;
242 reg4 |= 0x80;
243 ret = regmap_write(rt711->sdw_regmap, reg4, (val & 0xff));
244 if (ret < 0)
245 return ret;
246 is_index_reg = 1;
247 } else if (reg < 0x4fff) {
248 ret = regmap_write(rt711->sdw_regmap, reg, val);
249 if (ret < 0)
250 return ret;
251 } else if (reg == RT711_FUNC_RESET) {
252 ret = regmap_write(rt711->sdw_regmap, reg, val);
253 if (ret < 0)
254 return ret;
255 } else if (mask == 0x7000) {
256 ret = regmap_write(rt711->sdw_regmap,
257 reg, ((val >> 8) & 0xff));
258 if (ret < 0)
259 return ret;
260 reg2 = reg + 0x1000;
261 reg2 |= 0x80;
262 ret = regmap_write(rt711->sdw_regmap, reg2, (val & 0xff));
263 if (ret < 0)
264 return ret;
265 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
266 reg2 = reg - 0x1000;
267 reg2 &= ~0x80;
268 ret = regmap_write(rt711->sdw_regmap,
269 reg2, ((val >> 8) & 0xff));
270 if (ret < 0)
271 return ret;
272 ret = regmap_write(rt711->sdw_regmap, reg, (val & 0xff));
273 if (ret < 0)
274 return ret;
277 if (reg2 == 0)
278 dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
279 else if (is_index_reg)
280 dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
281 __func__, reg, reg2, reg3, reg4, val2, val);
282 else
283 dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
284 __func__, reg, reg2, val);
286 return 0;
289 static const struct regmap_config rt711_regmap = {
290 .reg_bits = 24,
291 .val_bits = 32,
292 .readable_reg = rt711_readable_register,
293 .volatile_reg = rt711_volatile_register,
294 .max_register = 0x755800,
295 .reg_defaults = rt711_reg_defaults,
296 .num_reg_defaults = ARRAY_SIZE(rt711_reg_defaults),
297 .cache_type = REGCACHE_RBTREE,
298 .use_single_read = true,
299 .use_single_write = true,
300 .reg_read = rt711_sdw_read,
301 .reg_write = rt711_sdw_write,
304 static const struct regmap_config rt711_sdw_regmap = {
305 .name = "sdw",
306 .reg_bits = 32,
307 .val_bits = 8,
308 .readable_reg = rt711_readable_register,
309 .max_register = 0xff01,
310 .cache_type = REGCACHE_NONE,
311 .use_single_read = true,
312 .use_single_write = true,
315 static int rt711_update_status(struct sdw_slave *slave,
316 enum sdw_slave_status status)
318 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
320 /* Update the status */
321 rt711->status = status;
323 if (status == SDW_SLAVE_UNATTACHED)
324 rt711->hw_init = false;
327 * Perform initialization only if slave status is present and
328 * hw_init flag is false
330 if (rt711->hw_init || rt711->status != SDW_SLAVE_ATTACHED)
331 return 0;
333 /* perform I/O transfers required for Slave initialization */
334 return rt711_io_init(&slave->dev, slave);
337 static int rt711_read_prop(struct sdw_slave *slave)
339 struct sdw_slave_prop *prop = &slave->prop;
340 int nval, i, num_of_ports = 1;
341 u32 bit;
342 unsigned long addr;
343 struct sdw_dpn_prop *dpn;
345 prop->paging_support = false;
347 /* first we need to allocate memory for set bits in port lists */
348 prop->source_ports = 0x14; /* BITMAP: 00010100 */
349 prop->sink_ports = 0x8; /* BITMAP: 00001000 */
351 nval = hweight32(prop->source_ports);
352 num_of_ports += nval;
353 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
354 sizeof(*prop->src_dpn_prop),
355 GFP_KERNEL);
356 if (!prop->src_dpn_prop)
357 return -ENOMEM;
359 i = 0;
360 dpn = prop->src_dpn_prop;
361 addr = prop->source_ports;
362 for_each_set_bit(bit, &addr, 32) {
363 dpn[i].num = bit;
364 dpn[i].type = SDW_DPN_FULL;
365 dpn[i].simple_ch_prep_sm = true;
366 dpn[i].ch_prep_timeout = 10;
367 i++;
370 /* do this again for sink now */
371 nval = hweight32(prop->sink_ports);
372 num_of_ports += nval;
373 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
374 sizeof(*prop->sink_dpn_prop),
375 GFP_KERNEL);
376 if (!prop->sink_dpn_prop)
377 return -ENOMEM;
379 i = 0;
380 dpn = prop->sink_dpn_prop;
381 addr = prop->sink_ports;
382 for_each_set_bit(bit, &addr, 32) {
383 dpn[i].num = bit;
384 dpn[i].type = SDW_DPN_FULL;
385 dpn[i].simple_ch_prep_sm = true;
386 dpn[i].ch_prep_timeout = 10;
387 i++;
390 /* Allocate port_ready based on num_of_ports */
391 slave->port_ready = devm_kcalloc(&slave->dev, num_of_ports,
392 sizeof(*slave->port_ready),
393 GFP_KERNEL);
394 if (!slave->port_ready)
395 return -ENOMEM;
397 /* Initialize completion */
398 for (i = 0; i < num_of_ports; i++)
399 init_completion(&slave->port_ready[i]);
401 /* set the timeout values */
402 prop->clk_stop_timeout = 20;
404 /* wake-up event */
405 prop->wake_capable = 1;
407 return 0;
410 static int rt711_bus_config(struct sdw_slave *slave,
411 struct sdw_bus_params *params)
413 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
414 int ret;
416 memcpy(&rt711->params, params, sizeof(*params));
418 ret = rt711_clock_config(&slave->dev);
419 if (ret < 0)
420 dev_err(&slave->dev, "Invalid clk config");
422 return ret;
425 static int rt711_interrupt_callback(struct sdw_slave *slave,
426 struct sdw_slave_intr_status *status)
428 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
430 dev_dbg(&slave->dev,
431 "%s control_port_stat=%x", __func__, status->control_port);
433 if (status->control_port & 0x4) {
434 mod_delayed_work(system_power_efficient_wq,
435 &rt711->jack_detect_work, msecs_to_jiffies(250));
438 return 0;
441 static struct sdw_slave_ops rt711_slave_ops = {
442 .read_prop = rt711_read_prop,
443 .interrupt_callback = rt711_interrupt_callback,
444 .update_status = rt711_update_status,
445 .bus_config = rt711_bus_config,
448 static int rt711_sdw_probe(struct sdw_slave *slave,
449 const struct sdw_device_id *id)
451 struct regmap *sdw_regmap, *regmap;
453 /* Assign ops */
454 slave->ops = &rt711_slave_ops;
456 /* Regmap Initialization */
457 sdw_regmap = devm_regmap_init_sdw(slave, &rt711_sdw_regmap);
458 if (!sdw_regmap)
459 return -EINVAL;
461 regmap = devm_regmap_init(&slave->dev, NULL,
462 &slave->dev, &rt711_regmap);
463 if (IS_ERR(regmap))
464 return PTR_ERR(regmap);
466 rt711_init(&slave->dev, sdw_regmap, regmap, slave);
468 return 0;
471 static int rt711_sdw_remove(struct sdw_slave *slave)
473 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
475 if (rt711 && rt711->hw_init) {
476 cancel_delayed_work(&rt711->jack_detect_work);
477 cancel_delayed_work(&rt711->jack_btn_check_work);
478 cancel_work_sync(&rt711->calibration_work);
481 return 0;
484 static const struct sdw_device_id rt711_id[] = {
485 SDW_SLAVE_ENTRY(0x025d, 0x711, 0),
488 MODULE_DEVICE_TABLE(sdw, rt711_id);
490 static int rt711_dev_suspend(struct device *dev)
492 struct rt711_priv *rt711 = dev_get_drvdata(dev);
494 if (!rt711->hw_init)
495 return 0;
497 regcache_cache_only(rt711->regmap, true);
499 return 0;
502 #define RT711_PROBE_TIMEOUT 2000
504 static int rt711_dev_resume(struct device *dev)
506 struct sdw_slave *slave = dev_to_sdw_dev(dev);
507 struct rt711_priv *rt711 = dev_get_drvdata(dev);
508 unsigned long time;
510 if (!rt711->hw_init)
511 return 0;
513 if (!slave->unattach_request)
514 goto regmap_sync;
516 time = wait_for_completion_timeout(&slave->initialization_complete,
517 msecs_to_jiffies(RT711_PROBE_TIMEOUT));
518 if (!time) {
519 dev_err(&slave->dev, "Initialization not complete, timed out\n");
520 return -ETIMEDOUT;
523 regmap_sync:
524 slave->unattach_request = 0;
525 regcache_cache_only(rt711->regmap, false);
526 regcache_sync_region(rt711->regmap, 0x3000, 0x8fff);
527 regcache_sync_region(rt711->regmap, 0x752009, 0x752091);
529 return 0;
532 static const struct dev_pm_ops rt711_pm = {
533 SET_SYSTEM_SLEEP_PM_OPS(rt711_dev_suspend, rt711_dev_resume)
534 SET_RUNTIME_PM_OPS(rt711_dev_suspend, rt711_dev_resume, NULL)
537 static struct sdw_driver rt711_sdw_driver = {
538 .driver = {
539 .name = "rt711",
540 .owner = THIS_MODULE,
541 .pm = &rt711_pm,
543 .probe = rt711_sdw_probe,
544 .remove = rt711_sdw_remove,
545 .ops = &rt711_slave_ops,
546 .id_table = rt711_id,
548 module_sdw_driver(rt711_sdw_driver);
550 MODULE_DESCRIPTION("ASoC RT711 SDW driver");
551 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
552 MODULE_LICENSE("GPL");