sound/soc/codecs/tas5086.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * TAS5086 ASoC codec driver
   4  *
   5  * Copyright (c) 2013 Daniel Mack <zonque@gmail.com>
   6  *
   7  * TODO:
   8  *  - implement DAPM and input muxing
   9  *  - implement modulation limit
  10  *  - implement non-default PWM start
  11  *
  12  * Note that this chip has a very unusual register layout, specifically
  13  * because the registers are of unequal size, and multi-byte registers
  14  * require bulk writes to take effect. Regmap does not support that kind
  15  * of devices.
  16  *
  17  * Currently, the driver does not touch any of the registers >= 0x20, so
  18  * it doesn't matter because the entire map can be accessed as 8-bit
  19  * array. In case more features will be added in the future
  20  * that require access to higher registers, the entire regmap H/W I/O
  21  * routines have to be open-coded.
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/slab.h>
  26 #include <linux/delay.h>
  27 #include <linux/gpio.h>
  28 #include <linux/i2c.h>
  29 #include <linux/regmap.h>
  30 #include <linux/regulator/consumer.h>
  31 #include <linux/spi/spi.h>
  32 #include <linux/of.h>
  33 #include <linux/of_device.h>
  34 #include <linux/of_gpio.h>
  35 #include <sound/pcm.h>
  36 #include <sound/pcm_params.h>
  37 #include <sound/soc.h>
  38 #include <sound/tlv.h>
  39 #include <sound/tas5086.h>
  40
  41 #define TAS5086_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE  |         \
  42                              SNDRV_PCM_FMTBIT_S20_3LE |         \
  43                              SNDRV_PCM_FMTBIT_S24_3LE)
  44
  45 #define TAS5086_PCM_RATES   (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100  | \
  46                              SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200  | \
  47                              SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \
  48                              SNDRV_PCM_RATE_192000)
  49
  50 /*
  51  * TAS5086 registers
  52  */
  53 #define TAS5086_CLOCK_CONTROL           0x00    /* Clock control register  */
  54 #define TAS5086_CLOCK_RATE(val)         (val << 5)
  55 #define TAS5086_CLOCK_RATE_MASK         (0x7 << 5)
  56 #define TAS5086_CLOCK_RATIO(val)        (val << 2)
  57 #define TAS5086_CLOCK_RATIO_MASK        (0x7 << 2)
  58 #define TAS5086_CLOCK_SCLK_RATIO_48     (1 << 1)
  59 #define TAS5086_CLOCK_VALID             (1 << 0)
  60
  61 #define TAS5086_DEEMPH_MASK             0x03
  62 #define TAS5086_SOFT_MUTE_ALL           0x3f
  63
  64 #define TAS5086_DEV_ID                  0x01    /* Device ID register */
  65 #define TAS5086_ERROR_STATUS            0x02    /* Error status register */
  66 #define TAS5086_SYS_CONTROL_1           0x03    /* System control register 1 */
  67 #define TAS5086_SERIAL_DATA_IF          0x04    /* Serial data interface register  */
  68 #define TAS5086_SYS_CONTROL_2           0x05    /* System control register 2 */
  69 #define TAS5086_SOFT_MUTE               0x06    /* Soft mute register */
  70 #define TAS5086_MASTER_VOL              0x07    /* Master volume  */
  71 #define TAS5086_CHANNEL_VOL(X)          (0x08 + (X))    /* Channel 1-6 volume */
  72 #define TAS5086_VOLUME_CONTROL          0x09    /* Volume control register */
  73 #define TAS5086_MOD_LIMIT               0x10    /* Modulation limit register */
  74 #define TAS5086_PWM_START               0x18    /* PWM start register */
  75 #define TAS5086_SURROUND                0x19    /* Surround register */
  76 #define TAS5086_SPLIT_CAP_CHARGE        0x1a    /* Split cap charge period register */
  77 #define TAS5086_OSC_TRIM                0x1b    /* Oscillator trim register */
  78 #define TAS5086_BKNDERR                 0x1c
  79 #define TAS5086_INPUT_MUX               0x20
  80 #define TAS5086_PWM_OUTPUT_MUX          0x25
  81
  82 #define TAS5086_MAX_REGISTER            TAS5086_PWM_OUTPUT_MUX
  83
  84 #define TAS5086_PWM_START_MIDZ_FOR_START_1      (1 << 7)
  85 #define TAS5086_PWM_START_MIDZ_FOR_START_2      (1 << 6)
  86 #define TAS5086_PWM_START_CHANNEL_MASK          (0x3f)
  87
  88 /*
  89  * Default TAS5086 power-up configuration
  90  */
  91 static const struct reg_default tas5086_reg_defaults[] = {
  92         { 0x00, 0x6c },
  93         { 0x01, 0x03 },
  94         { 0x02, 0x00 },
  95         { 0x03, 0xa0 },
  96         { 0x04, 0x05 },
  97         { 0x05, 0x60 },
  98         { 0x06, 0x00 },
  99         { 0x07, 0xff },
 100         { 0x08, 0x30 },
 101         { 0x09, 0x30 },
 102         { 0x0a, 0x30 },
 103         { 0x0b, 0x30 },
 104         { 0x0c, 0x30 },
 105         { 0x0d, 0x30 },
 106         { 0x0e, 0xb1 },
 107         { 0x0f, 0x00 },
 108         { 0x10, 0x02 },
 109         { 0x11, 0x00 },
 110         { 0x12, 0x00 },
 111         { 0x13, 0x00 },
 112         { 0x14, 0x00 },
 113         { 0x15, 0x00 },
 114         { 0x16, 0x00 },
 115         { 0x17, 0x00 },
 116         { 0x18, 0x3f },
 117         { 0x19, 0x00 },
 118         { 0x1a, 0x18 },
 119         { 0x1b, 0x82 },
 120         { 0x1c, 0x05 },
 121 };
 122
 123 static int tas5086_register_size(struct device *dev, unsigned int reg)
 124 {
 125         switch (reg) {
 126         case TAS5086_CLOCK_CONTROL ... TAS5086_BKNDERR:
 127                 return 1;
 128         case TAS5086_INPUT_MUX:
 129         case TAS5086_PWM_OUTPUT_MUX:
 130                 return 4;
 131         }
 132
 133         dev_err(dev, "Unsupported register address: %d\n", reg);
 134         return 0;
 135 }
 136
 137 static bool tas5086_accessible_reg(struct device *dev, unsigned int reg)
 138 {
 139         switch (reg) {
 140         case 0x0f:
 141         case 0x11 ... 0x17:
 142         case 0x1d ... 0x1f:
 143                 return false;
 144         default:
 145                 return true;
 146         }
 147 }
 148
 149 static bool tas5086_volatile_reg(struct device *dev, unsigned int reg)
 150 {
 151         switch (reg) {
 152         case TAS5086_DEV_ID:
 153         case TAS5086_ERROR_STATUS:
 154                 return true;
 155         }
 156
 157         return false;
 158 }
 159
 160 static bool tas5086_writeable_reg(struct device *dev, unsigned int reg)
 161 {
 162         return tas5086_accessible_reg(dev, reg) && (reg != TAS5086_DEV_ID);
 163 }
 164
 165 static int tas5086_reg_write(void *context, unsigned int reg,
 166                               unsigned int value)
 167 {
 168         struct i2c_client *client = context;
 169         unsigned int i, size;
 170         uint8_t buf[5];
 171         int ret;
 172
 173         size = tas5086_register_size(&client->dev, reg);
 174         if (size == 0)
 175                 return -EINVAL;
 176
 177         buf[0] = reg;
 178
 179         for (i = size; i >= 1; --i) {
 180                 buf[i] = value;
 181                 value >>= 8;
 182         }
 183
 184         ret = i2c_master_send(client, buf, size + 1);
 185         if (ret == size + 1)
 186                 return 0;
 187         else if (ret < 0)
 188                 return ret;
 189         else
 190                 return -EIO;
 191 }
 192
 193 static int tas5086_reg_read(void *context, unsigned int reg,
 194                              unsigned int *value)
 195 {
 196         struct i2c_client *client = context;
 197         uint8_t send_buf, recv_buf[4];
 198         struct i2c_msg msgs[2];
 199         unsigned int size;
 200         unsigned int i;
 201         int ret;
 202
 203         size = tas5086_register_size(&client->dev, reg);
 204         if (size == 0)
 205                 return -EINVAL;
 206
 207         send_buf = reg;
 208
 209         msgs[0].addr = client->addr;
 210         msgs[0].len = sizeof(send_buf);
 211         msgs[0].buf = &send_buf;
 212         msgs[0].flags = 0;
 213
 214         msgs[1].addr = client->addr;
 215         msgs[1].len = size;
 216         msgs[1].buf = recv_buf;
 217         msgs[1].flags = I2C_M_RD;
 218
 219         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 220         if (ret < 0)
 221                 return ret;
 222         else if (ret != ARRAY_SIZE(msgs))
 223                 return -EIO;
 224
 225         *value = 0;
 226
 227         for (i = 0; i < size; i++) {
 228                 *value <<= 8;
 229                 *value |= recv_buf[i];
 230         }
 231
 232         return 0;
 233 }
 234
 235 static const char * const supply_names[] = {
 236         "dvdd", "avdd"
 237 };
 238
 239 struct tas5086_private {
 240         struct regmap   *regmap;
 241         unsigned int    mclk, sclk;
 242         unsigned int    format;
 243         bool            deemph;
 244         unsigned int    charge_period;
 245         unsigned int    pwm_start_mid_z;
 246         /* Current sample rate for de-emphasis control */
 247         int             rate;
 248         /* GPIO driving Reset pin, if any */
 249         int             gpio_nreset;
 250         struct          regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
 251 };
 252
 253 static int tas5086_deemph[] = { 0, 32000, 44100, 48000 };
 254
 255 static int tas5086_set_deemph(struct snd_soc_component *component)
 256 {
 257         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 258         int i, val = 0;
 259
 260         if (priv->deemph) {
 261                 for (i = 0; i < ARRAY_SIZE(tas5086_deemph); i++) {
 262                         if (tas5086_deemph[i] == priv->rate) {
 263                                 val = i;
 264                                 break;
 265                         }
 266                 }
 267         }
 268
 269         return regmap_update_bits(priv->regmap, TAS5086_SYS_CONTROL_1,
 270                                   TAS5086_DEEMPH_MASK, val);
 271 }
 272
 273 static int tas5086_get_deemph(struct snd_kcontrol *kcontrol,
 274                               struct snd_ctl_elem_value *ucontrol)
 275 {
 276         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
 277         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 278
 279         ucontrol->value.integer.value[0] = priv->deemph;
 280
 281         return 0;
 282 }
 283
 284 static int tas5086_put_deemph(struct snd_kcontrol *kcontrol,
 285                               struct snd_ctl_elem_value *ucontrol)
 286 {
 287         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
 288         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 289
 290         priv->deemph = ucontrol->value.integer.value[0];
 291
 292         return tas5086_set_deemph(component);
 293 }
 294
 295
 296 static int tas5086_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 297                                   int clk_id, unsigned int freq, int dir)
 298 {
 299         struct snd_soc_component *component = codec_dai->component;
 300         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 301
 302         switch (clk_id) {
 303         case TAS5086_CLK_IDX_MCLK:
 304                 priv->mclk = freq;
 305                 break;
 306         case TAS5086_CLK_IDX_SCLK:
 307                 priv->sclk = freq;
 308                 break;
 309         }
 310
 311         return 0;
 312 }
 313
 314 static int tas5086_set_dai_fmt(struct snd_soc_dai *codec_dai,
 315                                unsigned int format)
 316 {
 317         struct snd_soc_component *component = codec_dai->component;
 318         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 319
 320         /* The TAS5086 can only be slave to all clocks */
 321         if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
 322                 dev_err(component->dev, "Invalid clocking mode\n");
 323                 return -EINVAL;
 324         }
 325
 326         /* we need to refer to the data format from hw_params() */
 327         priv->format = format;
 328
 329         return 0;
 330 }
 331
 332 static const int tas5086_sample_rates[] = {
 333         32000, 38000, 44100, 48000, 88200, 96000, 176400, 192000
 334 };
 335
 336 static const int tas5086_ratios[] = {
 337         64, 128, 192, 256, 384, 512
 338 };
 339
 340 static int index_in_array(const int *array, int len, int needle)
 341 {
 342         int i;
 343
 344         for (i = 0; i < len; i++)
 345                 if (array[i] == needle)
 346                         return i;
 347
 348         return -ENOENT;
 349 }
 350
 351 static int tas5086_hw_params(struct snd_pcm_substream *substream,
 352                              struct snd_pcm_hw_params *params,
 353                              struct snd_soc_dai *dai)
 354 {
 355         struct snd_soc_component *component = dai->component;
 356         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 357         int val;
 358         int ret;
 359
 360         priv->rate = params_rate(params);
 361
 362         /* Look up the sample rate and refer to the offset in the list */
 363         val = index_in_array(tas5086_sample_rates,
 364                              ARRAY_SIZE(tas5086_sample_rates), priv->rate);
 365
 366         if (val < 0) {
 367                 dev_err(component->dev, "Invalid sample rate\n");
 368                 return -EINVAL;
 369         }
 370
 371         ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
 372                                  TAS5086_CLOCK_RATE_MASK,
 373                                  TAS5086_CLOCK_RATE(val));
 374         if (ret < 0)
 375                 return ret;
 376
 377         /* MCLK / Fs ratio */
 378         val = index_in_array(tas5086_ratios, ARRAY_SIZE(tas5086_ratios),
 379                              priv->mclk / priv->rate);
 380         if (val < 0) {
 381                 dev_err(component->dev, "Invalid MCLK / Fs ratio\n");
 382                 return -EINVAL;
 383         }
 384
 385         ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
 386                                  TAS5086_CLOCK_RATIO_MASK,
 387                                  TAS5086_CLOCK_RATIO(val));
 388         if (ret < 0)
 389                 return ret;
 390
 391
 392         ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
 393                                  TAS5086_CLOCK_SCLK_RATIO_48,
 394                                  (priv->sclk == 48 * priv->rate) ?
 395                                         TAS5086_CLOCK_SCLK_RATIO_48 : 0);
 396         if (ret < 0)
 397                 return ret;
 398
 399         /*
 400          * The chip has a very unituitive register mapping and muxes information
 401          * about data format and sample depth into the same register, but not on
 402          * a logical bit-boundary. Hence, we have to refer to the format passed
 403          * in the set_dai_fmt() callback and set up everything from here.
 404          *
 405          * First, determine the 'base' value, using the format ...
 406          */
 407         switch (priv->format & SND_SOC_DAIFMT_FORMAT_MASK) {
 408         case SND_SOC_DAIFMT_RIGHT_J:
 409                 val = 0x00;
 410                 break;
 411         case SND_SOC_DAIFMT_I2S:
 412                 val = 0x03;
 413                 break;
 414         case SND_SOC_DAIFMT_LEFT_J:
 415                 val = 0x06;
 416                 break;
 417         default:
 418                 dev_err(component->dev, "Invalid DAI format\n");
 419                 return -EINVAL;
 420         }
 421
 422         /* ... then add the offset for the sample bit depth. */
 423         switch (params_width(params)) {
 424         case 16:
 425                 val += 0;
 426                 break;
 427         case 20:
 428                 val += 1;
 429                 break;
 430         case 24:
 431                 val += 2;
 432                 break;
 433         default:
 434                 dev_err(component->dev, "Invalid bit width\n");
 435                 return -EINVAL;
 436         }
 437
 438         ret = regmap_write(priv->regmap, TAS5086_SERIAL_DATA_IF, val);
 439         if (ret < 0)
 440                 return ret;
 441
 442         /* clock is considered valid now */
 443         ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
 444                                  TAS5086_CLOCK_VALID, TAS5086_CLOCK_VALID);
 445         if (ret < 0)
 446                 return ret;
 447
 448         return tas5086_set_deemph(component);
 449 }
 450
 451 static int tas5086_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
 452 {
 453         struct snd_soc_component *component = dai->component;
 454         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 455         unsigned int val = 0;
 456
 457         if (mute)
 458                 val = TAS5086_SOFT_MUTE_ALL;
 459
 460         return regmap_write(priv->regmap, TAS5086_SOFT_MUTE, val);
 461 }
 462
 463 static void tas5086_reset(struct tas5086_private *priv)
 464 {
 465         if (gpio_is_valid(priv->gpio_nreset)) {
 466                 /* Reset codec - minimum assertion time is 400ns */
 467                 gpio_direction_output(priv->gpio_nreset, 0);
 468                 udelay(1);
 469                 gpio_set_value(priv->gpio_nreset, 1);
 470
 471                 /* Codec needs ~15ms to wake up */
 472                 msleep(15);
 473         }
 474 }
 475
 476 /* charge period values in microseconds */
 477 static const int tas5086_charge_period[] = {
 478           13000,  16900,   23400,   31200,   41600,   54600,   72800,   96200,
 479          130000, 156000,  234000,  312000,  416000,  546000,  728000,  962000,
 480         1300000, 169000, 2340000, 3120000, 4160000, 5460000, 7280000, 9620000,
 481 };
 482
 483 static int tas5086_init(struct device *dev, struct tas5086_private *priv)
 484 {
 485         int ret, i;
 486
 487         /*
 488          * If any of the channels is configured to start in Mid-Z mode,
 489          * configure 'part 1' of the PWM starts to use Mid-Z, and tell
 490          * all configured mid-z channels to start start under 'part 1'.
 491          */
 492         if (priv->pwm_start_mid_z)
 493                 regmap_write(priv->regmap, TAS5086_PWM_START,
 494                              TAS5086_PWM_START_MIDZ_FOR_START_1 |
 495                                 priv->pwm_start_mid_z);
 496
 497         /* lookup and set split-capacitor charge period */
 498         if (priv->charge_period == 0) {
 499                 regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, 0);
 500         } else {
 501                 i = index_in_array(tas5086_charge_period,
 502                                    ARRAY_SIZE(tas5086_charge_period),
 503                                    priv->charge_period);
 504                 if (i >= 0)
 505                         regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE,
 506                                      i + 0x08);
 507                 else
 508                         dev_warn(dev,
 509                                  "Invalid split-cap charge period of %d ns.\n",
 510                                  priv->charge_period);
 511         }
 512
 513         /* enable factory trim */
 514         ret = regmap_write(priv->regmap, TAS5086_OSC_TRIM, 0x00);
 515         if (ret < 0)
 516                 return ret;
 517
 518         /* start all channels */
 519         ret = regmap_write(priv->regmap, TAS5086_SYS_CONTROL_2, 0x20);
 520         if (ret < 0)
 521                 return ret;
 522
 523         /* mute all channels for now */
 524         ret = regmap_write(priv->regmap, TAS5086_SOFT_MUTE,
 525                            TAS5086_SOFT_MUTE_ALL);
 526         if (ret < 0)
 527                 return ret;
 528
 529         return 0;
 530 }
 531
 532 /* TAS5086 controls */
 533 static const DECLARE_TLV_DB_SCALE(tas5086_dac_tlv, -10350, 50, 1);
 534
 535 static const struct snd_kcontrol_new tas5086_controls[] = {
 536         SOC_SINGLE_TLV("Master Playback Volume", TAS5086_MASTER_VOL,
 537                        0, 0xff, 1, tas5086_dac_tlv),
 538         SOC_DOUBLE_R_TLV("Channel 1/2 Playback Volume",
 539                          TAS5086_CHANNEL_VOL(0), TAS5086_CHANNEL_VOL(1),
 540                          0, 0xff, 1, tas5086_dac_tlv),
 541         SOC_DOUBLE_R_TLV("Channel 3/4 Playback Volume",
 542                          TAS5086_CHANNEL_VOL(2), TAS5086_CHANNEL_VOL(3),
 543                          0, 0xff, 1, tas5086_dac_tlv),
 544         SOC_DOUBLE_R_TLV("Channel 5/6 Playback Volume",
 545                          TAS5086_CHANNEL_VOL(4), TAS5086_CHANNEL_VOL(5),
 546                          0, 0xff, 1, tas5086_dac_tlv),
 547         SOC_SINGLE_BOOL_EXT("De-emphasis Switch", 0,
 548                             tas5086_get_deemph, tas5086_put_deemph),
 549 };
 550
 551 /* Input mux controls */
 552 static const char *tas5086_dapm_sdin_texts[] =
 553 {
 554         "SDIN1-L", "SDIN1-R", "SDIN2-L", "SDIN2-R",
 555         "SDIN3-L", "SDIN3-R", "Ground (0)", "nc"
 556 };
 557
 558 static const struct soc_enum tas5086_dapm_input_mux_enum[] = {
 559         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 20, 8, tas5086_dapm_sdin_texts),
 560         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 16, 8, tas5086_dapm_sdin_texts),
 561         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 12, 8, tas5086_dapm_sdin_texts),
 562         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 8,  8, tas5086_dapm_sdin_texts),
 563         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 4,  8, tas5086_dapm_sdin_texts),
 564         SOC_ENUM_SINGLE(TAS5086_INPUT_MUX, 0,  8, tas5086_dapm_sdin_texts),
 565 };
 566
 567 static const struct snd_kcontrol_new tas5086_dapm_input_mux_controls[] = {
 568         SOC_DAPM_ENUM("Channel 1 input", tas5086_dapm_input_mux_enum[0]),
 569         SOC_DAPM_ENUM("Channel 2 input", tas5086_dapm_input_mux_enum[1]),
 570         SOC_DAPM_ENUM("Channel 3 input", tas5086_dapm_input_mux_enum[2]),
 571         SOC_DAPM_ENUM("Channel 4 input", tas5086_dapm_input_mux_enum[3]),
 572         SOC_DAPM_ENUM("Channel 5 input", tas5086_dapm_input_mux_enum[4]),
 573         SOC_DAPM_ENUM("Channel 6 input", tas5086_dapm_input_mux_enum[5]),
 574 };
 575
 576 /* Output mux controls */
 577 static const char *tas5086_dapm_channel_texts[] =
 578         { "Channel 1 Mux", "Channel 2 Mux", "Channel 3 Mux",
 579           "Channel 4 Mux", "Channel 5 Mux", "Channel 6 Mux" };
 580
 581 static const struct soc_enum tas5086_dapm_output_mux_enum[] = {
 582         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 20, 6, tas5086_dapm_channel_texts),
 583         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 16, 6, tas5086_dapm_channel_texts),
 584         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 12, 6, tas5086_dapm_channel_texts),
 585         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 8,  6, tas5086_dapm_channel_texts),
 586         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 4,  6, tas5086_dapm_channel_texts),
 587         SOC_ENUM_SINGLE(TAS5086_PWM_OUTPUT_MUX, 0,  6, tas5086_dapm_channel_texts),
 588 };
 589
 590 static const struct snd_kcontrol_new tas5086_dapm_output_mux_controls[] = {
 591         SOC_DAPM_ENUM("PWM1 Output", tas5086_dapm_output_mux_enum[0]),
 592         SOC_DAPM_ENUM("PWM2 Output", tas5086_dapm_output_mux_enum[1]),
 593         SOC_DAPM_ENUM("PWM3 Output", tas5086_dapm_output_mux_enum[2]),
 594         SOC_DAPM_ENUM("PWM4 Output", tas5086_dapm_output_mux_enum[3]),
 595         SOC_DAPM_ENUM("PWM5 Output", tas5086_dapm_output_mux_enum[4]),
 596         SOC_DAPM_ENUM("PWM6 Output", tas5086_dapm_output_mux_enum[5]),
 597 };
 598
 599 static const struct snd_soc_dapm_widget tas5086_dapm_widgets[] = {
 600         SND_SOC_DAPM_INPUT("SDIN1-L"),
 601         SND_SOC_DAPM_INPUT("SDIN1-R"),
 602         SND_SOC_DAPM_INPUT("SDIN2-L"),
 603         SND_SOC_DAPM_INPUT("SDIN2-R"),
 604         SND_SOC_DAPM_INPUT("SDIN3-L"),
 605         SND_SOC_DAPM_INPUT("SDIN3-R"),
 606         SND_SOC_DAPM_INPUT("SDIN4-L"),
 607         SND_SOC_DAPM_INPUT("SDIN4-R"),
 608
 609         SND_SOC_DAPM_OUTPUT("PWM1"),
 610         SND_SOC_DAPM_OUTPUT("PWM2"),
 611         SND_SOC_DAPM_OUTPUT("PWM3"),
 612         SND_SOC_DAPM_OUTPUT("PWM4"),
 613         SND_SOC_DAPM_OUTPUT("PWM5"),
 614         SND_SOC_DAPM_OUTPUT("PWM6"),
 615
 616         SND_SOC_DAPM_MUX("Channel 1 Mux", SND_SOC_NOPM, 0, 0,
 617                          &tas5086_dapm_input_mux_controls[0]),
 618         SND_SOC_DAPM_MUX("Channel 2 Mux", SND_SOC_NOPM, 0, 0,
 619                          &tas5086_dapm_input_mux_controls[1]),
 620         SND_SOC_DAPM_MUX("Channel 3 Mux", SND_SOC_NOPM, 0, 0,
 621                          &tas5086_dapm_input_mux_controls[2]),
 622         SND_SOC_DAPM_MUX("Channel 4 Mux", SND_SOC_NOPM, 0, 0,
 623                          &tas5086_dapm_input_mux_controls[3]),
 624         SND_SOC_DAPM_MUX("Channel 5 Mux", SND_SOC_NOPM, 0, 0,
 625                          &tas5086_dapm_input_mux_controls[4]),
 626         SND_SOC_DAPM_MUX("Channel 6 Mux", SND_SOC_NOPM, 0, 0,
 627                          &tas5086_dapm_input_mux_controls[5]),
 628
 629         SND_SOC_DAPM_MUX("PWM1 Mux", SND_SOC_NOPM, 0, 0,
 630                          &tas5086_dapm_output_mux_controls[0]),
 631         SND_SOC_DAPM_MUX("PWM2 Mux", SND_SOC_NOPM, 0, 0,
 632                          &tas5086_dapm_output_mux_controls[1]),
 633         SND_SOC_DAPM_MUX("PWM3 Mux", SND_SOC_NOPM, 0, 0,
 634                          &tas5086_dapm_output_mux_controls[2]),
 635         SND_SOC_DAPM_MUX("PWM4 Mux", SND_SOC_NOPM, 0, 0,
 636                          &tas5086_dapm_output_mux_controls[3]),
 637         SND_SOC_DAPM_MUX("PWM5 Mux", SND_SOC_NOPM, 0, 0,
 638                          &tas5086_dapm_output_mux_controls[4]),
 639         SND_SOC_DAPM_MUX("PWM6 Mux", SND_SOC_NOPM, 0, 0,
 640                          &tas5086_dapm_output_mux_controls[5]),
 641 };
 642
 643 static const struct snd_soc_dapm_route tas5086_dapm_routes[] = {
 644         /* SDIN inputs -> channel muxes */
 645         { "Channel 1 Mux", "SDIN1-L", "SDIN1-L" },
 646         { "Channel 1 Mux", "SDIN1-R", "SDIN1-R" },
 647         { "Channel 1 Mux", "SDIN2-L", "SDIN2-L" },
 648         { "Channel 1 Mux", "SDIN2-R", "SDIN2-R" },
 649         { "Channel 1 Mux", "SDIN3-L", "SDIN3-L" },
 650         { "Channel 1 Mux", "SDIN3-R", "SDIN3-R" },
 651
 652         { "Channel 2 Mux", "SDIN1-L", "SDIN1-L" },
 653         { "Channel 2 Mux", "SDIN1-R", "SDIN1-R" },
 654         { "Channel 2 Mux", "SDIN2-L", "SDIN2-L" },
 655         { "Channel 2 Mux", "SDIN2-R", "SDIN2-R" },
 656         { "Channel 2 Mux", "SDIN3-L", "SDIN3-L" },
 657         { "Channel 2 Mux", "SDIN3-R", "SDIN3-R" },
 658
 659         { "Channel 2 Mux", "SDIN1-L", "SDIN1-L" },
 660         { "Channel 2 Mux", "SDIN1-R", "SDIN1-R" },
 661         { "Channel 2 Mux", "SDIN2-L", "SDIN2-L" },
 662         { "Channel 2 Mux", "SDIN2-R", "SDIN2-R" },
 663         { "Channel 2 Mux", "SDIN3-L", "SDIN3-L" },
 664         { "Channel 2 Mux", "SDIN3-R", "SDIN3-R" },
 665
 666         { "Channel 3 Mux", "SDIN1-L", "SDIN1-L" },
 667         { "Channel 3 Mux", "SDIN1-R", "SDIN1-R" },
 668         { "Channel 3 Mux", "SDIN2-L", "SDIN2-L" },
 669         { "Channel 3 Mux", "SDIN2-R", "SDIN2-R" },
 670         { "Channel 3 Mux", "SDIN3-L", "SDIN3-L" },
 671         { "Channel 3 Mux", "SDIN3-R", "SDIN3-R" },
 672
 673         { "Channel 4 Mux", "SDIN1-L", "SDIN1-L" },
 674         { "Channel 4 Mux", "SDIN1-R", "SDIN1-R" },
 675         { "Channel 4 Mux", "SDIN2-L", "SDIN2-L" },
 676         { "Channel 4 Mux", "SDIN2-R", "SDIN2-R" },
 677         { "Channel 4 Mux", "SDIN3-L", "SDIN3-L" },
 678         { "Channel 4 Mux", "SDIN3-R", "SDIN3-R" },
 679
 680         { "Channel 5 Mux", "SDIN1-L", "SDIN1-L" },
 681         { "Channel 5 Mux", "SDIN1-R", "SDIN1-R" },
 682         { "Channel 5 Mux", "SDIN2-L", "SDIN2-L" },
 683         { "Channel 5 Mux", "SDIN2-R", "SDIN2-R" },
 684         { "Channel 5 Mux", "SDIN3-L", "SDIN3-L" },
 685         { "Channel 5 Mux", "SDIN3-R", "SDIN3-R" },
 686
 687         { "Channel 6 Mux", "SDIN1-L", "SDIN1-L" },
 688         { "Channel 6 Mux", "SDIN1-R", "SDIN1-R" },
 689         { "Channel 6 Mux", "SDIN2-L", "SDIN2-L" },
 690         { "Channel 6 Mux", "SDIN2-R", "SDIN2-R" },
 691         { "Channel 6 Mux", "SDIN3-L", "SDIN3-L" },
 692         { "Channel 6 Mux", "SDIN3-R", "SDIN3-R" },
 693
 694         /* Channel muxes -> PWM muxes */
 695         { "PWM1 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 696         { "PWM2 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 697         { "PWM3 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 698         { "PWM4 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 699         { "PWM5 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 700         { "PWM6 Mux", "Channel 1 Mux", "Channel 1 Mux" },
 701
 702         { "PWM1 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 703         { "PWM2 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 704         { "PWM3 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 705         { "PWM4 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 706         { "PWM5 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 707         { "PWM6 Mux", "Channel 2 Mux", "Channel 2 Mux" },
 708
 709         { "PWM1 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 710         { "PWM2 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 711         { "PWM3 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 712         { "PWM4 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 713         { "PWM5 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 714         { "PWM6 Mux", "Channel 3 Mux", "Channel 3 Mux" },
 715
 716         { "PWM1 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 717         { "PWM2 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 718         { "PWM3 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 719         { "PWM4 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 720         { "PWM5 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 721         { "PWM6 Mux", "Channel 4 Mux", "Channel 4 Mux" },
 722
 723         { "PWM1 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 724         { "PWM2 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 725         { "PWM3 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 726         { "PWM4 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 727         { "PWM5 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 728         { "PWM6 Mux", "Channel 5 Mux", "Channel 5 Mux" },
 729
 730         { "PWM1 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 731         { "PWM2 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 732         { "PWM3 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 733         { "PWM4 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 734         { "PWM5 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 735         { "PWM6 Mux", "Channel 6 Mux", "Channel 6 Mux" },
 736
 737         /* The PWM muxes are directly connected to the PWM outputs */
 738         { "PWM1", NULL, "PWM1 Mux" },
 739         { "PWM2", NULL, "PWM2 Mux" },
 740         { "PWM3", NULL, "PWM3 Mux" },
 741         { "PWM4", NULL, "PWM4 Mux" },
 742         { "PWM5", NULL, "PWM5 Mux" },
 743         { "PWM6", NULL, "PWM6 Mux" },
 744
 745 };
 746
 747 static const struct snd_soc_dai_ops tas5086_dai_ops = {
 748         .hw_params      = tas5086_hw_params,
 749         .set_sysclk     = tas5086_set_dai_sysclk,
 750         .set_fmt        = tas5086_set_dai_fmt,
 751         .mute_stream    = tas5086_mute_stream,
 752 };
 753
 754 static struct snd_soc_dai_driver tas5086_dai = {
 755         .name = "tas5086-hifi",
 756         .playback = {
 757                 .stream_name    = "Playback",
 758                 .channels_min   = 2,
 759                 .channels_max   = 6,
 760                 .rates          = TAS5086_PCM_RATES,
 761                 .formats        = TAS5086_PCM_FORMATS,
 762         },
 763         .ops = &tas5086_dai_ops,
 764 };
 765
 766 #ifdef CONFIG_PM
 767 static int tas5086_soc_suspend(struct snd_soc_component *component)
 768 {
 769         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 770         int ret;
 771
 772         /* Shut down all channels */
 773         ret = regmap_write(priv->regmap, TAS5086_SYS_CONTROL_2, 0x60);
 774         if (ret < 0)
 775                 return ret;
 776
 777         regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies);
 778
 779         return 0;
 780 }
 781
 782 static int tas5086_soc_resume(struct snd_soc_component *component)
 783 {
 784         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 785         int ret;
 786
 787         ret = regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies);
 788         if (ret < 0)
 789                 return ret;
 790
 791         tas5086_reset(priv);
 792         regcache_mark_dirty(priv->regmap);
 793
 794         ret = tas5086_init(component->dev, priv);
 795         if (ret < 0)
 796                 return ret;
 797
 798         ret = regcache_sync(priv->regmap);
 799         if (ret < 0)
 800                 return ret;
 801
 802         return 0;
 803 }
 804 #else
 805 #define tas5086_soc_suspend     NULL
 806 #define tas5086_soc_resume      NULL
 807 #endif /* CONFIG_PM */
 808
 809 #ifdef CONFIG_OF
 810 static const struct of_device_id tas5086_dt_ids[] = {
 811         { .compatible = "ti,tas5086", },
 812         { }
 813 };
 814 MODULE_DEVICE_TABLE(of, tas5086_dt_ids);
 815 #endif
 816
 817 static int tas5086_probe(struct snd_soc_component *component)
 818 {
 819         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 820         int i, ret;
 821
 822         ret = regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies);
 823         if (ret < 0) {
 824                 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
 825                 return ret;
 826         }
 827
 828         priv->pwm_start_mid_z = 0;
 829         priv->charge_period = 1300000; /* hardware default is 1300 ms */
 830
 831         if (of_match_device(of_match_ptr(tas5086_dt_ids), component->dev)) {
 832                 struct device_node *of_node = component->dev->of_node;
 833
 834                 of_property_read_u32(of_node, "ti,charge-period",
 835                                      &priv->charge_period);
 836
 837                 for (i = 0; i < 6; i++) {
 838                         char name[25];
 839
 840                         snprintf(name, sizeof(name),
 841                                  "ti,mid-z-channel-%d", i + 1);
 842
 843                         if (of_get_property(of_node, name, NULL) != NULL)
 844                                 priv->pwm_start_mid_z |= 1 << i;
 845                 }
 846         }
 847
 848         tas5086_reset(priv);
 849         ret = tas5086_init(component->dev, priv);
 850         if (ret < 0)
 851                 goto exit_disable_regulators;
 852
 853         /* set master volume to 0 dB */
 854         ret = regmap_write(priv->regmap, TAS5086_MASTER_VOL, 0x30);
 855         if (ret < 0)
 856                 goto exit_disable_regulators;
 857
 858         return 0;
 859
 860 exit_disable_regulators:
 861         regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies);
 862
 863         return ret;
 864 }
 865
 866 static void tas5086_remove(struct snd_soc_component *component)
 867 {
 868         struct tas5086_private *priv = snd_soc_component_get_drvdata(component);
 869
 870         if (gpio_is_valid(priv->gpio_nreset))
 871                 /* Set codec to the reset state */
 872                 gpio_set_value(priv->gpio_nreset, 0);
 873
 874         regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies);
 875 };
 876
 877 static const struct snd_soc_component_driver soc_component_dev_tas5086 = {
 878         .probe                  = tas5086_probe,
 879         .remove                 = tas5086_remove,
 880         .suspend                = tas5086_soc_suspend,
 881         .resume                 = tas5086_soc_resume,
 882         .controls               = tas5086_controls,
 883         .num_controls           = ARRAY_SIZE(tas5086_controls),
 884         .dapm_widgets           = tas5086_dapm_widgets,
 885         .num_dapm_widgets       = ARRAY_SIZE(tas5086_dapm_widgets),
 886         .dapm_routes            = tas5086_dapm_routes,
 887         .num_dapm_routes        = ARRAY_SIZE(tas5086_dapm_routes),
 888         .idle_bias_on           = 1,
 889         .use_pmdown_time        = 1,
 890         .endianness             = 1,
 891         .non_legacy_dai_naming  = 1,
 892 };
 893
 894 static const struct i2c_device_id tas5086_i2c_id[] = {
 895         { "tas5086", 0 },
 896         { }
 897 };
 898 MODULE_DEVICE_TABLE(i2c, tas5086_i2c_id);
 899
 900 static const struct regmap_config tas5086_regmap = {
 901         .reg_bits               = 8,
 902         .val_bits               = 32,
 903         .max_register           = TAS5086_MAX_REGISTER,
 904         .reg_defaults           = tas5086_reg_defaults,
 905         .num_reg_defaults       = ARRAY_SIZE(tas5086_reg_defaults),
 906         .cache_type             = REGCACHE_RBTREE,
 907         .volatile_reg           = tas5086_volatile_reg,
 908         .writeable_reg          = tas5086_writeable_reg,
 909         .readable_reg           = tas5086_accessible_reg,
 910         .reg_read               = tas5086_reg_read,
 911         .reg_write              = tas5086_reg_write,
 912 };
 913
 914 static int tas5086_i2c_probe(struct i2c_client *i2c,
 915                              const struct i2c_device_id *id)
 916 {
 917         struct tas5086_private *priv;
 918         struct device *dev = &i2c->dev;
 919         int gpio_nreset = -EINVAL;
 920         int i, ret;
 921
 922         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 923         if (!priv)
 924                 return -ENOMEM;
 925
 926         for (i = 0; i < ARRAY_SIZE(supply_names); i++)
 927                 priv->supplies[i].supply = supply_names[i];
 928
 929         ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(priv->supplies),
 930                                       priv->supplies);
 931         if (ret < 0) {
 932                 dev_err(dev, "Failed to get regulators: %d\n", ret);
 933                 return ret;
 934         }
 935
 936         priv->regmap = devm_regmap_init(dev, NULL, i2c, &tas5086_regmap);
 937         if (IS_ERR(priv->regmap)) {
 938                 ret = PTR_ERR(priv->regmap);
 939                 dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
 940                 return ret;
 941         }
 942
 943         i2c_set_clientdata(i2c, priv);
 944
 945         if (of_match_device(of_match_ptr(tas5086_dt_ids), dev)) {
 946                 struct device_node *of_node = dev->of_node;
 947                 gpio_nreset = of_get_named_gpio(of_node, "reset-gpio", 0);
 948         }
 949
 950         if (gpio_is_valid(gpio_nreset))
 951                 if (devm_gpio_request(dev, gpio_nreset, "TAS5086 Reset"))
 952                         gpio_nreset = -EINVAL;
 953
 954         priv->gpio_nreset = gpio_nreset;
 955
 956         ret = regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies);
 957         if (ret < 0) {
 958                 dev_err(dev, "Failed to enable regulators: %d\n", ret);
 959                 return ret;
 960         }
 961
 962         tas5086_reset(priv);
 963
 964         /* The TAS5086 always returns 0x03 in its TAS5086_DEV_ID register */
 965         ret = regmap_read(priv->regmap, TAS5086_DEV_ID, &i);
 966         if (ret == 0 && i != 0x3) {
 967                 dev_err(dev,
 968                         "Failed to identify TAS5086 codec (got %02x)\n", i);
 969                 ret = -ENODEV;
 970         }
 971
 972         /*
 973          * The chip has been identified, so we can turn off the power
 974          * again until the dai link is set up.
 975          */
 976         regulator_bulk_disable(ARRAY_SIZE(priv->supplies), priv->supplies);
 977
 978         if (ret == 0)
 979                 ret = devm_snd_soc_register_component(&i2c->dev,
 980                                              &soc_component_dev_tas5086,
 981                                              &tas5086_dai, 1);
 982
 983         return ret;
 984 }
 985
 986 static int tas5086_i2c_remove(struct i2c_client *i2c)
 987 {
 988         return 0;
 989 }
 990
 991 static struct i2c_driver tas5086_i2c_driver = {
 992         .driver = {
 993                 .name   = "tas5086",
 994                 .of_match_table = of_match_ptr(tas5086_dt_ids),
 995         },
 996         .id_table       = tas5086_i2c_id,
 997         .probe          = tas5086_i2c_probe,
 998         .remove         = tas5086_i2c_remove,
 999 };
1000
1001 module_i2c_driver(tas5086_i2c_driver);
1002
1003 MODULE_AUTHOR("Daniel Mack <zonque@gmail.com>");
1004 MODULE_DESCRIPTION("Texas Instruments TAS5086 ALSA SoC Codec Driver");
1005 MODULE_LICENSE("GPL");