sound/soc/codecs/wm8750.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * wm8750.c -- WM8750 ALSA SoC audio driver
   4  *
   5  * Copyright 2005 Openedhand Ltd.
   6  *
   7  * Author: Richard Purdie <richard@openedhand.com>
   8  *
   9  * Based on WM8753.c
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/regmap.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/slab.h>
  21 #include <linux/of_device.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include <sound/initval.h>
  27
  28 #include "wm8750.h"
  29
  30 /*
  31  * wm8750 register cache
  32  * We can't read the WM8750 register space when we
  33  * are using 2 wire for device control, so we cache them instead.
  34  */
  35 static const struct reg_default wm8750_reg_defaults[] = {
  36         {  0, 0x0097 },
  37         {  1, 0x0097 },
  38         {  2, 0x0079 },
  39         {  3, 0x0079 },
  40         {  4, 0x0000 },
  41         {  5, 0x0008 },
  42         {  6, 0x0000 },
  43         {  7, 0x000a },
  44         {  8, 0x0000 },
  45         {  9, 0x0000 },
  46         { 10, 0x00ff },
  47         { 11, 0x00ff },
  48         { 12, 0x000f },
  49         { 13, 0x000f },
  50         { 14, 0x0000 },
  51         { 15, 0x0000 },
  52         { 16, 0x0000 },
  53         { 17, 0x007b },
  54         { 18, 0x0000 },
  55         { 19, 0x0032 },
  56         { 20, 0x0000 },
  57         { 21, 0x00c3 },
  58         { 22, 0x00c3 },
  59         { 23, 0x00c0 },
  60         { 24, 0x0000 },
  61         { 25, 0x0000 },
  62         { 26, 0x0000 },
  63         { 27, 0x0000 },
  64         { 28, 0x0000 },
  65         { 29, 0x0000 },
  66         { 30, 0x0000 },
  67         { 31, 0x0000 },
  68         { 32, 0x0000 },
  69         { 33, 0x0000 },
  70         { 34, 0x0050 },
  71         { 35, 0x0050 },
  72         { 36, 0x0050 },
  73         { 37, 0x0050 },
  74         { 38, 0x0050 },
  75         { 39, 0x0050 },
  76         { 40, 0x0079 },
  77         { 41, 0x0079 },
  78         { 42, 0x0079 },
  79 };
  80
  81 /* codec private data */
  82 struct wm8750_priv {
  83         unsigned int sysclk;
  84 };
  85
  86 #define wm8750_reset(c) snd_soc_component_write(c, WM8750_RESET, 0)
  87
  88 /*
  89  * WM8750 Controls
  90  */
  91 static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
  92 static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  93 static const char *wm8750_treble[] = {"8kHz", "4kHz"};
  94 static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
  95 static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
  96 static const char *wm8750_3d_func[] = {"Capture", "Playback"};
  97 static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
  98 static const char *wm8750_ng_type[] = {"Constant PGA Gain",
  99         "Mute ADC Output"};
 100 static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
 101         "Differential"};
 102 static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
 103         "Differential"};
 104 static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
 105         "ROUT1"};
 106 static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
 107 static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
 108         "L + R Invert"};
 109 static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
 110 static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
 111         "Mono (Right)", "Digital Mono"};
 112
 113 static const struct soc_enum wm8750_enum[] = {
 114 SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
 115 SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
 116 SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
 117 SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
 118 SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
 119 SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
 120 SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
 121 SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
 122 SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
 123 SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
 124 SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
 125 SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
 126 SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
 127 SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
 128 SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
 129 SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
 130 SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
 131
 132 };
 133
 134 static const struct snd_kcontrol_new wm8750_snd_controls[] = {
 135
 136 SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
 137 SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
 138 SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
 139
 140 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
 141         WM8750_ROUT1V, 7, 1, 0),
 142 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
 143         WM8750_ROUT2V, 7, 1, 0),
 144
 145 SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
 146
 147 SOC_ENUM("Capture Polarity", wm8750_enum[14]),
 148 SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
 149 SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
 150
 151 SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
 152
 153 SOC_ENUM("Bass Boost", wm8750_enum[0]),
 154 SOC_ENUM("Bass Filter", wm8750_enum[1]),
 155 SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
 156
 157 SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
 158 SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
 159
 160 SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
 161 SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
 162 SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
 163 SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
 164 SOC_ENUM("3D Mode", wm8750_enum[5]),
 165
 166 SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
 167 SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
 168 SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
 169 SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
 170 SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
 171 SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
 172 SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
 173 SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
 174 SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
 175 SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
 176
 177 SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
 178 SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
 179
 180 SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
 181 SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
 182
 183 SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
 184
 185 /* Unimplemented */
 186 /* ADCDAC Bit 0 - ADCHPD */
 187 /* ADCDAC Bit 4 - HPOR */
 188 /* ADCTL1 Bit 2,3 - DATSEL */
 189 /* ADCTL1 Bit 4,5 - DMONOMIX */
 190 /* ADCTL1 Bit 6,7 - VSEL */
 191 /* ADCTL2 Bit 2 - LRCM */
 192 /* ADCTL2 Bit 3 - TRI */
 193 /* ADCTL3 Bit 5 - HPFLREN */
 194 /* ADCTL3 Bit 6 - VROI */
 195 /* ADCTL3 Bit 7,8 - ADCLRM */
 196 /* ADCIN Bit 4 - LDCM */
 197 /* ADCIN Bit 5 - RDCM */
 198
 199 SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
 200
 201 SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
 202         WM8750_LOUTM2, 4, 7, 1),
 203 SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
 204         WM8750_ROUTM2, 4, 7, 1),
 205 SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
 206         WM8750_MOUTM2, 4, 7, 1),
 207
 208 SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
 209
 210 SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
 211         0, 127, 0),
 212 SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
 213         0, 127, 0),
 214
 215 SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
 216
 217 };
 218
 219 /*
 220  * DAPM Controls
 221  */
 222
 223 /* Left Mixer */
 224 static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
 225 SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
 226 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
 227 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
 228 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
 229 };
 230
 231 /* Right Mixer */
 232 static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
 233 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
 234 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
 235 SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
 236 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
 237 };
 238
 239 /* Mono Mixer */
 240 static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
 241 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
 242 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
 243 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
 244 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
 245 };
 246
 247 /* Left Line Mux */
 248 static const struct snd_kcontrol_new wm8750_left_line_controls =
 249 SOC_DAPM_ENUM("Route", wm8750_enum[8]);
 250
 251 /* Right Line Mux */
 252 static const struct snd_kcontrol_new wm8750_right_line_controls =
 253 SOC_DAPM_ENUM("Route", wm8750_enum[9]);
 254
 255 /* Left PGA Mux */
 256 static const struct snd_kcontrol_new wm8750_left_pga_controls =
 257 SOC_DAPM_ENUM("Route", wm8750_enum[10]);
 258
 259 /* Right PGA Mux */
 260 static const struct snd_kcontrol_new wm8750_right_pga_controls =
 261 SOC_DAPM_ENUM("Route", wm8750_enum[11]);
 262
 263 /* Out 3 Mux */
 264 static const struct snd_kcontrol_new wm8750_out3_controls =
 265 SOC_DAPM_ENUM("Route", wm8750_enum[12]);
 266
 267 /* Differential Mux */
 268 static const struct snd_kcontrol_new wm8750_diffmux_controls =
 269 SOC_DAPM_ENUM("Route", wm8750_enum[13]);
 270
 271 /* Mono ADC Mux */
 272 static const struct snd_kcontrol_new wm8750_monomux_controls =
 273 SOC_DAPM_ENUM("Route", wm8750_enum[16]);
 274
 275 static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
 276         SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
 277                 &wm8750_left_mixer_controls[0],
 278                 ARRAY_SIZE(wm8750_left_mixer_controls)),
 279         SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
 280                 &wm8750_right_mixer_controls[0],
 281                 ARRAY_SIZE(wm8750_right_mixer_controls)),
 282         SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
 283                 &wm8750_mono_mixer_controls[0],
 284                 ARRAY_SIZE(wm8750_mono_mixer_controls)),
 285
 286         SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
 287         SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
 288         SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
 289         SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
 290         SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
 291         SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
 292
 293         SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
 294         SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
 295         SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
 296
 297         SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
 298                 &wm8750_left_pga_controls),
 299         SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
 300                 &wm8750_right_pga_controls),
 301         SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
 302                 &wm8750_left_line_controls),
 303         SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
 304                 &wm8750_right_line_controls),
 305
 306         SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
 307         SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
 308         SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
 309
 310         SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
 311                 &wm8750_diffmux_controls),
 312         SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
 313                 &wm8750_monomux_controls),
 314         SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
 315                 &wm8750_monomux_controls),
 316
 317         SND_SOC_DAPM_OUTPUT("LOUT1"),
 318         SND_SOC_DAPM_OUTPUT("ROUT1"),
 319         SND_SOC_DAPM_OUTPUT("LOUT2"),
 320         SND_SOC_DAPM_OUTPUT("ROUT2"),
 321         SND_SOC_DAPM_OUTPUT("MONO1"),
 322         SND_SOC_DAPM_OUTPUT("OUT3"),
 323         SND_SOC_DAPM_VMID("VREF"),
 324
 325         SND_SOC_DAPM_INPUT("LINPUT1"),
 326         SND_SOC_DAPM_INPUT("LINPUT2"),
 327         SND_SOC_DAPM_INPUT("LINPUT3"),
 328         SND_SOC_DAPM_INPUT("RINPUT1"),
 329         SND_SOC_DAPM_INPUT("RINPUT2"),
 330         SND_SOC_DAPM_INPUT("RINPUT3"),
 331 };
 332
 333 static const struct snd_soc_dapm_route wm8750_dapm_routes[] = {
 334         /* left mixer */
 335         {"Left Mixer", "Playback Switch", "Left DAC"},
 336         {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
 337         {"Left Mixer", "Right Playback Switch", "Right DAC"},
 338         {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
 339
 340         /* right mixer */
 341         {"Right Mixer", "Left Playback Switch", "Left DAC"},
 342         {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
 343         {"Right Mixer", "Playback Switch", "Right DAC"},
 344         {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
 345
 346         /* left out 1 */
 347         {"Left Out 1", NULL, "Left Mixer"},
 348         {"LOUT1", NULL, "Left Out 1"},
 349
 350         /* left out 2 */
 351         {"Left Out 2", NULL, "Left Mixer"},
 352         {"LOUT2", NULL, "Left Out 2"},
 353
 354         /* right out 1 */
 355         {"Right Out 1", NULL, "Right Mixer"},
 356         {"ROUT1", NULL, "Right Out 1"},
 357
 358         /* right out 2 */
 359         {"Right Out 2", NULL, "Right Mixer"},
 360         {"ROUT2", NULL, "Right Out 2"},
 361
 362         /* mono mixer */
 363         {"Mono Mixer", "Left Playback Switch", "Left DAC"},
 364         {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
 365         {"Mono Mixer", "Right Playback Switch", "Right DAC"},
 366         {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
 367
 368         /* mono out */
 369         {"Mono Out 1", NULL, "Mono Mixer"},
 370         {"MONO1", NULL, "Mono Out 1"},
 371
 372         /* out 3 */
 373         {"Out3 Mux", "VREF", "VREF"},
 374         {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
 375         {"Out3 Mux", "ROUT1", "Right Mixer"},
 376         {"Out3 Mux", "MonoOut", "MONO1"},
 377         {"Out 3", NULL, "Out3 Mux"},
 378         {"OUT3", NULL, "Out 3"},
 379
 380         /* Left Line Mux */
 381         {"Left Line Mux", "Line 1", "LINPUT1"},
 382         {"Left Line Mux", "Line 2", "LINPUT2"},
 383         {"Left Line Mux", "Line 3", "LINPUT3"},
 384         {"Left Line Mux", "PGA", "Left PGA Mux"},
 385         {"Left Line Mux", "Differential", "Differential Mux"},
 386
 387         /* Right Line Mux */
 388         {"Right Line Mux", "Line 1", "RINPUT1"},
 389         {"Right Line Mux", "Line 2", "RINPUT2"},
 390         {"Right Line Mux", "Line 3", "RINPUT3"},
 391         {"Right Line Mux", "PGA", "Right PGA Mux"},
 392         {"Right Line Mux", "Differential", "Differential Mux"},
 393
 394         /* Left PGA Mux */
 395         {"Left PGA Mux", "Line 1", "LINPUT1"},
 396         {"Left PGA Mux", "Line 2", "LINPUT2"},
 397         {"Left PGA Mux", "Line 3", "LINPUT3"},
 398         {"Left PGA Mux", "Differential", "Differential Mux"},
 399
 400         /* Right PGA Mux */
 401         {"Right PGA Mux", "Line 1", "RINPUT1"},
 402         {"Right PGA Mux", "Line 2", "RINPUT2"},
 403         {"Right PGA Mux", "Line 3", "RINPUT3"},
 404         {"Right PGA Mux", "Differential", "Differential Mux"},
 405
 406         /* Differential Mux */
 407         {"Differential Mux", "Line 1", "LINPUT1"},
 408         {"Differential Mux", "Line 1", "RINPUT1"},
 409         {"Differential Mux", "Line 2", "LINPUT2"},
 410         {"Differential Mux", "Line 2", "RINPUT2"},
 411
 412         /* Left ADC Mux */
 413         {"Left ADC Mux", "Stereo", "Left PGA Mux"},
 414         {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
 415         {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
 416
 417         /* Right ADC Mux */
 418         {"Right ADC Mux", "Stereo", "Right PGA Mux"},
 419         {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
 420         {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
 421
 422         /* ADC */
 423         {"Left ADC", NULL, "Left ADC Mux"},
 424         {"Right ADC", NULL, "Right ADC Mux"},
 425 };
 426
 427 struct _coeff_div {
 428         u32 mclk;
 429         u32 rate;
 430         u16 fs;
 431         u8 sr:5;
 432         u8 usb:1;
 433 };
 434
 435 /* codec hifi mclk clock divider coefficients */
 436 static const struct _coeff_div coeff_div[] = {
 437         /* 8k */
 438         {12288000, 8000, 1536, 0x6, 0x0},
 439         {11289600, 8000, 1408, 0x16, 0x0},
 440         {18432000, 8000, 2304, 0x7, 0x0},
 441         {16934400, 8000, 2112, 0x17, 0x0},
 442         {12000000, 8000, 1500, 0x6, 0x1},
 443
 444         /* 11.025k */
 445         {11289600, 11025, 1024, 0x18, 0x0},
 446         {16934400, 11025, 1536, 0x19, 0x0},
 447         {12000000, 11025, 1088, 0x19, 0x1},
 448
 449         /* 16k */
 450         {12288000, 16000, 768, 0xa, 0x0},
 451         {18432000, 16000, 1152, 0xb, 0x0},
 452         {12000000, 16000, 750, 0xa, 0x1},
 453
 454         /* 22.05k */
 455         {11289600, 22050, 512, 0x1a, 0x0},
 456         {16934400, 22050, 768, 0x1b, 0x0},
 457         {12000000, 22050, 544, 0x1b, 0x1},
 458
 459         /* 32k */
 460         {12288000, 32000, 384, 0xc, 0x0},
 461         {18432000, 32000, 576, 0xd, 0x0},
 462         {12000000, 32000, 375, 0xa, 0x1},
 463
 464         /* 44.1k */
 465         {11289600, 44100, 256, 0x10, 0x0},
 466         {16934400, 44100, 384, 0x11, 0x0},
 467         {12000000, 44100, 272, 0x11, 0x1},
 468
 469         /* 48k */
 470         {12288000, 48000, 256, 0x0, 0x0},
 471         {18432000, 48000, 384, 0x1, 0x0},
 472         {12000000, 48000, 250, 0x0, 0x1},
 473
 474         /* 88.2k */
 475         {11289600, 88200, 128, 0x1e, 0x0},
 476         {16934400, 88200, 192, 0x1f, 0x0},
 477         {12000000, 88200, 136, 0x1f, 0x1},
 478
 479         /* 96k */
 480         {12288000, 96000, 128, 0xe, 0x0},
 481         {18432000, 96000, 192, 0xf, 0x0},
 482         {12000000, 96000, 125, 0xe, 0x1},
 483 };
 484
 485 static inline int get_coeff(int mclk, int rate)
 486 {
 487         int i;
 488
 489         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
 490                 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
 491                         return i;
 492         }
 493
 494         printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
 495                 mclk, rate);
 496         return -EINVAL;
 497 }
 498
 499 static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 500                 int clk_id, unsigned int freq, int dir)
 501 {
 502         struct snd_soc_component *component = codec_dai->component;
 503         struct wm8750_priv *wm8750 = snd_soc_component_get_drvdata(component);
 504
 505         switch (freq) {
 506         case 11289600:
 507         case 12000000:
 508         case 12288000:
 509         case 16934400:
 510         case 18432000:
 511                 wm8750->sysclk = freq;
 512                 return 0;
 513         }
 514         return -EINVAL;
 515 }
 516
 517 static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
 518                 unsigned int fmt)
 519 {
 520         struct snd_soc_component *component = codec_dai->component;
 521         u16 iface = 0;
 522
 523         /* set master/slave audio interface */
 524         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 525         case SND_SOC_DAIFMT_CBM_CFM:
 526                 iface = 0x0040;
 527                 break;
 528         case SND_SOC_DAIFMT_CBS_CFS:
 529                 break;
 530         default:
 531                 return -EINVAL;
 532         }
 533
 534         /* interface format */
 535         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 536         case SND_SOC_DAIFMT_I2S:
 537                 iface |= 0x0002;
 538                 break;
 539         case SND_SOC_DAIFMT_RIGHT_J:
 540                 break;
 541         case SND_SOC_DAIFMT_LEFT_J:
 542                 iface |= 0x0001;
 543                 break;
 544         case SND_SOC_DAIFMT_DSP_A:
 545                 iface |= 0x0003;
 546                 break;
 547         case SND_SOC_DAIFMT_DSP_B:
 548                 iface |= 0x0013;
 549                 break;
 550         default:
 551                 return -EINVAL;
 552         }
 553
 554         /* clock inversion */
 555         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 556         case SND_SOC_DAIFMT_NB_NF:
 557                 break;
 558         case SND_SOC_DAIFMT_IB_IF:
 559                 iface |= 0x0090;
 560                 break;
 561         case SND_SOC_DAIFMT_IB_NF:
 562                 iface |= 0x0080;
 563                 break;
 564         case SND_SOC_DAIFMT_NB_IF:
 565                 iface |= 0x0010;
 566                 break;
 567         default:
 568                 return -EINVAL;
 569         }
 570
 571         snd_soc_component_write(component, WM8750_IFACE, iface);
 572         return 0;
 573 }
 574
 575 static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
 576                                 struct snd_pcm_hw_params *params,
 577                                 struct snd_soc_dai *dai)
 578 {
 579         struct snd_soc_component *component = dai->component;
 580         struct wm8750_priv *wm8750 = snd_soc_component_get_drvdata(component);
 581         u16 iface = snd_soc_component_read32(component, WM8750_IFACE) & 0x1f3;
 582         u16 srate = snd_soc_component_read32(component, WM8750_SRATE) & 0x1c0;
 583         int coeff = get_coeff(wm8750->sysclk, params_rate(params));
 584
 585         /* bit size */
 586         switch (params_width(params)) {
 587         case 16:
 588                 break;
 589         case 20:
 590                 iface |= 0x0004;
 591                 break;
 592         case 24:
 593                 iface |= 0x0008;
 594                 break;
 595         case 32:
 596                 iface |= 0x000c;
 597                 break;
 598         }
 599
 600         /* set iface & srate */
 601         snd_soc_component_write(component, WM8750_IFACE, iface);
 602         if (coeff >= 0)
 603                 snd_soc_component_write(component, WM8750_SRATE, srate |
 604                         (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
 605
 606         return 0;
 607 }
 608
 609 static int wm8750_mute(struct snd_soc_dai *dai, int mute)
 610 {
 611         struct snd_soc_component *component = dai->component;
 612         u16 mute_reg = snd_soc_component_read32(component, WM8750_ADCDAC) & 0xfff7;
 613
 614         if (mute)
 615                 snd_soc_component_write(component, WM8750_ADCDAC, mute_reg | 0x8);
 616         else
 617                 snd_soc_component_write(component, WM8750_ADCDAC, mute_reg);
 618         return 0;
 619 }
 620
 621 static int wm8750_set_bias_level(struct snd_soc_component *component,
 622                                  enum snd_soc_bias_level level)
 623 {
 624         u16 pwr_reg = snd_soc_component_read32(component, WM8750_PWR1) & 0xfe3e;
 625
 626         switch (level) {
 627         case SND_SOC_BIAS_ON:
 628                 /* set vmid to 50k and unmute dac */
 629                 snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x00c0);
 630                 break;
 631         case SND_SOC_BIAS_PREPARE:
 632                 break;
 633         case SND_SOC_BIAS_STANDBY:
 634                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
 635                         snd_soc_component_cache_sync(component);
 636
 637                         /* Set VMID to 5k */
 638                         snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x01c1);
 639
 640                         /* ...and ramp */
 641                         msleep(1000);
 642                 }
 643
 644                 /* mute dac and set vmid to 500k, enable VREF */
 645                 snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x0141);
 646                 break;
 647         case SND_SOC_BIAS_OFF:
 648                 snd_soc_component_write(component, WM8750_PWR1, 0x0001);
 649                 break;
 650         }
 651         return 0;
 652 }
 653
 654 #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
 655         SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
 656         SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
 657
 658 #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 659         SNDRV_PCM_FMTBIT_S24_LE)
 660
 661 static const struct snd_soc_dai_ops wm8750_dai_ops = {
 662         .hw_params      = wm8750_pcm_hw_params,
 663         .digital_mute   = wm8750_mute,
 664         .set_fmt        = wm8750_set_dai_fmt,
 665         .set_sysclk     = wm8750_set_dai_sysclk,
 666 };
 667
 668 static struct snd_soc_dai_driver wm8750_dai = {
 669         .name = "wm8750-hifi",
 670         .playback = {
 671                 .stream_name = "Playback",
 672                 .channels_min = 1,
 673                 .channels_max = 2,
 674                 .rates = WM8750_RATES,
 675                 .formats = WM8750_FORMATS,},
 676         .capture = {
 677                 .stream_name = "Capture",
 678                 .channels_min = 1,
 679                 .channels_max = 2,
 680                 .rates = WM8750_RATES,
 681                 .formats = WM8750_FORMATS,},
 682         .ops = &wm8750_dai_ops,
 683 };
 684
 685 static int wm8750_probe(struct snd_soc_component *component)
 686 {
 687         int ret;
 688
 689         ret = wm8750_reset(component);
 690         if (ret < 0) {
 691                 printk(KERN_ERR "wm8750: failed to reset: %d\n", ret);
 692                 return ret;
 693         }
 694
 695         /* set the update bits */
 696         snd_soc_component_update_bits(component, WM8750_LDAC, 0x0100, 0x0100);
 697         snd_soc_component_update_bits(component, WM8750_RDAC, 0x0100, 0x0100);
 698         snd_soc_component_update_bits(component, WM8750_LOUT1V, 0x0100, 0x0100);
 699         snd_soc_component_update_bits(component, WM8750_ROUT1V, 0x0100, 0x0100);
 700         snd_soc_component_update_bits(component, WM8750_LOUT2V, 0x0100, 0x0100);
 701         snd_soc_component_update_bits(component, WM8750_ROUT2V, 0x0100, 0x0100);
 702         snd_soc_component_update_bits(component, WM8750_LINVOL, 0x0100, 0x0100);
 703         snd_soc_component_update_bits(component, WM8750_RINVOL, 0x0100, 0x0100);
 704
 705         return ret;
 706 }
 707
 708 static const struct snd_soc_component_driver soc_component_dev_wm8750 = {
 709         .probe                  = wm8750_probe,
 710         .set_bias_level         = wm8750_set_bias_level,
 711         .controls               = wm8750_snd_controls,
 712         .num_controls           = ARRAY_SIZE(wm8750_snd_controls),
 713         .dapm_widgets           = wm8750_dapm_widgets,
 714         .num_dapm_widgets       = ARRAY_SIZE(wm8750_dapm_widgets),
 715         .dapm_routes            = wm8750_dapm_routes,
 716         .num_dapm_routes        = ARRAY_SIZE(wm8750_dapm_routes),
 717         .suspend_bias_off       = 1,
 718         .idle_bias_on           = 1,
 719         .use_pmdown_time        = 1,
 720         .endianness             = 1,
 721         .non_legacy_dai_naming  = 1,
 722 };
 723
 724 static const struct of_device_id wm8750_of_match[] = {
 725         { .compatible = "wlf,wm8750", },
 726         { .compatible = "wlf,wm8987", },
 727         { }
 728 };
 729 MODULE_DEVICE_TABLE(of, wm8750_of_match);
 730
 731 static const struct regmap_config wm8750_regmap = {
 732         .reg_bits = 7,
 733         .val_bits = 9,
 734         .max_register = WM8750_MOUTV,
 735
 736         .reg_defaults = wm8750_reg_defaults,
 737         .num_reg_defaults = ARRAY_SIZE(wm8750_reg_defaults),
 738         .cache_type = REGCACHE_RBTREE,
 739 };
 740
 741 #if defined(CONFIG_SPI_MASTER)
 742 static int wm8750_spi_probe(struct spi_device *spi)
 743 {
 744         struct wm8750_priv *wm8750;
 745         struct regmap *regmap;
 746         int ret;
 747
 748         wm8750 = devm_kzalloc(&spi->dev, sizeof(struct wm8750_priv),
 749                               GFP_KERNEL);
 750         if (wm8750 == NULL)
 751                 return -ENOMEM;
 752
 753         regmap = devm_regmap_init_spi(spi, &wm8750_regmap);
 754         if (IS_ERR(regmap))
 755                 return PTR_ERR(regmap);
 756
 757         spi_set_drvdata(spi, wm8750);
 758
 759         ret = devm_snd_soc_register_component(&spi->dev,
 760                         &soc_component_dev_wm8750, &wm8750_dai, 1);
 761         return ret;
 762 }
 763
 764 static const struct spi_device_id wm8750_spi_ids[] = {
 765         { "wm8750", 0 },
 766         { "wm8987", 0 },
 767         { },
 768 };
 769 MODULE_DEVICE_TABLE(spi, wm8750_spi_ids);
 770
 771 static struct spi_driver wm8750_spi_driver = {
 772         .driver = {
 773                 .name   = "wm8750",
 774                 .of_match_table = wm8750_of_match,
 775         },
 776         .id_table       = wm8750_spi_ids,
 777         .probe          = wm8750_spi_probe,
 778 };
 779 #endif /* CONFIG_SPI_MASTER */
 780
 781 #if IS_ENABLED(CONFIG_I2C)
 782 static int wm8750_i2c_probe(struct i2c_client *i2c,
 783                             const struct i2c_device_id *id)
 784 {
 785         struct wm8750_priv *wm8750;
 786         struct regmap *regmap;
 787         int ret;
 788
 789         wm8750 = devm_kzalloc(&i2c->dev, sizeof(struct wm8750_priv),
 790                               GFP_KERNEL);
 791         if (wm8750 == NULL)
 792                 return -ENOMEM;
 793
 794         i2c_set_clientdata(i2c, wm8750);
 795
 796         regmap = devm_regmap_init_i2c(i2c, &wm8750_regmap);
 797         if (IS_ERR(regmap))
 798                 return PTR_ERR(regmap);
 799
 800         ret = devm_snd_soc_register_component(&i2c->dev,
 801                         &soc_component_dev_wm8750, &wm8750_dai, 1);
 802         return ret;
 803 }
 804
 805 static const struct i2c_device_id wm8750_i2c_id[] = {
 806         { "wm8750", 0 },
 807         { "wm8987", 0 },
 808         { }
 809 };
 810 MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
 811
 812 static struct i2c_driver wm8750_i2c_driver = {
 813         .driver = {
 814                 .name = "wm8750",
 815                 .of_match_table = wm8750_of_match,
 816         },
 817         .probe =    wm8750_i2c_probe,
 818         .id_table = wm8750_i2c_id,
 819 };
 820 #endif
 821
 822 static int __init wm8750_modinit(void)
 823 {
 824         int ret = 0;
 825 #if IS_ENABLED(CONFIG_I2C)
 826         ret = i2c_add_driver(&wm8750_i2c_driver);
 827         if (ret != 0) {
 828                 printk(KERN_ERR "Failed to register wm8750 I2C driver: %d\n",
 829                        ret);
 830         }
 831 #endif
 832 #if defined(CONFIG_SPI_MASTER)
 833         ret = spi_register_driver(&wm8750_spi_driver);
 834         if (ret != 0) {
 835                 printk(KERN_ERR "Failed to register wm8750 SPI driver: %d\n",
 836                        ret);
 837         }
 838 #endif
 839         return ret;
 840 }
 841 module_init(wm8750_modinit);
 842
 843 static void __exit wm8750_exit(void)
 844 {
 845 #if IS_ENABLED(CONFIG_I2C)
 846         i2c_del_driver(&wm8750_i2c_driver);
 847 #endif
 848 #if defined(CONFIG_SPI_MASTER)
 849         spi_unregister_driver(&wm8750_spi_driver);
 850 #endif
 851 }
 852 module_exit(wm8750_exit);
 853
 854 MODULE_DESCRIPTION("ASoC WM8750 driver");
 855 MODULE_AUTHOR("Liam Girdwood");
 856 MODULE_LICENSE("GPL");