1 // SPDX-License-Identifier: GPL-2.0-only
3 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
6 * Copyright (C) 2015 Intel Corp
7 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
8 * Jeeja KP <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 #include <linux/slab.h>
13 #include <linux/pci.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <uapi/sound/skl-tplg-interface.h>
17 #include "skl-sst-dsp.h"
18 #include "cnl-sst-dsp.h"
19 #include "skl-sst-ipc.h"
21 #include "../common/sst-dsp.h"
22 #include "../common/sst-dsp-priv.h"
23 #include "skl-topology.h"
25 static int skl_alloc_dma_buf(struct device
*dev
,
26 struct snd_dma_buffer
*dmab
, size_t size
)
28 return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, dev
, size
, dmab
);
31 static int skl_free_dma_buf(struct device
*dev
, struct snd_dma_buffer
*dmab
)
33 snd_dma_free_pages(dmab
);
37 #define SKL_ASTATE_PARAM_ID 4
39 void skl_dsp_set_astate_cfg(struct skl_dev
*skl
, u32 cnt
, void *data
)
41 struct skl_ipc_large_config_msg msg
= {0};
43 msg
.large_param_id
= SKL_ASTATE_PARAM_ID
;
44 msg
.param_data_size
= (cnt
* sizeof(struct skl_astate_param
) +
47 skl_ipc_set_large_config(&skl
->ipc
, &msg
, data
);
50 static int skl_dsp_setup_spib(struct device
*dev
, unsigned int size
,
51 int stream_tag
, int enable
)
53 struct hdac_bus
*bus
= dev_get_drvdata(dev
);
54 struct hdac_stream
*stream
= snd_hdac_get_stream(bus
,
55 SNDRV_PCM_STREAM_PLAYBACK
, stream_tag
);
56 struct hdac_ext_stream
*estream
;
61 estream
= stream_to_hdac_ext_stream(stream
);
62 /* enable/disable SPIB for this hdac stream */
63 snd_hdac_ext_stream_spbcap_enable(bus
, enable
, stream
->index
);
65 /* set the spib value */
66 snd_hdac_ext_stream_set_spib(bus
, estream
, size
);
71 static int skl_dsp_prepare(struct device
*dev
, unsigned int format
,
72 unsigned int size
, struct snd_dma_buffer
*dmab
)
74 struct hdac_bus
*bus
= dev_get_drvdata(dev
);
75 struct hdac_ext_stream
*estream
;
76 struct hdac_stream
*stream
;
77 struct snd_pcm_substream substream
;
83 memset(&substream
, 0, sizeof(substream
));
84 substream
.stream
= SNDRV_PCM_STREAM_PLAYBACK
;
86 estream
= snd_hdac_ext_stream_assign(bus
, &substream
,
87 HDAC_EXT_STREAM_TYPE_HOST
);
91 stream
= hdac_stream(estream
);
93 /* assign decouple host dma channel */
94 ret
= snd_hdac_dsp_prepare(stream
, format
, size
, dmab
);
98 skl_dsp_setup_spib(dev
, size
, stream
->stream_tag
, true);
100 return stream
->stream_tag
;
103 static int skl_dsp_trigger(struct device
*dev
, bool start
, int stream_tag
)
105 struct hdac_bus
*bus
= dev_get_drvdata(dev
);
106 struct hdac_stream
*stream
;
111 stream
= snd_hdac_get_stream(bus
,
112 SNDRV_PCM_STREAM_PLAYBACK
, stream_tag
);
116 snd_hdac_dsp_trigger(stream
, start
);
121 static int skl_dsp_cleanup(struct device
*dev
,
122 struct snd_dma_buffer
*dmab
, int stream_tag
)
124 struct hdac_bus
*bus
= dev_get_drvdata(dev
);
125 struct hdac_stream
*stream
;
126 struct hdac_ext_stream
*estream
;
131 stream
= snd_hdac_get_stream(bus
,
132 SNDRV_PCM_STREAM_PLAYBACK
, stream_tag
);
136 estream
= stream_to_hdac_ext_stream(stream
);
137 skl_dsp_setup_spib(dev
, 0, stream_tag
, false);
138 snd_hdac_ext_stream_release(estream
, HDAC_EXT_STREAM_TYPE_HOST
);
140 snd_hdac_dsp_cleanup(stream
, dmab
);
145 static struct skl_dsp_loader_ops
skl_get_loader_ops(void)
147 struct skl_dsp_loader_ops loader_ops
;
149 memset(&loader_ops
, 0, sizeof(struct skl_dsp_loader_ops
));
151 loader_ops
.alloc_dma_buf
= skl_alloc_dma_buf
;
152 loader_ops
.free_dma_buf
= skl_free_dma_buf
;
157 static struct skl_dsp_loader_ops
bxt_get_loader_ops(void)
159 struct skl_dsp_loader_ops loader_ops
;
161 memset(&loader_ops
, 0, sizeof(loader_ops
));
163 loader_ops
.alloc_dma_buf
= skl_alloc_dma_buf
;
164 loader_ops
.free_dma_buf
= skl_free_dma_buf
;
165 loader_ops
.prepare
= skl_dsp_prepare
;
166 loader_ops
.trigger
= skl_dsp_trigger
;
167 loader_ops
.cleanup
= skl_dsp_cleanup
;
172 static const struct skl_dsp_ops dsp_ops
[] = {
176 .loader_ops
= skl_get_loader_ops
,
177 .init
= skl_sst_dsp_init
,
178 .init_fw
= skl_sst_init_fw
,
179 .cleanup
= skl_sst_dsp_cleanup
184 .loader_ops
= skl_get_loader_ops
,
185 .init
= skl_sst_dsp_init
,
186 .init_fw
= skl_sst_init_fw
,
187 .cleanup
= skl_sst_dsp_cleanup
192 .loader_ops
= bxt_get_loader_ops
,
193 .init
= bxt_sst_dsp_init
,
194 .init_fw
= bxt_sst_init_fw
,
195 .cleanup
= bxt_sst_dsp_cleanup
200 .loader_ops
= bxt_get_loader_ops
,
201 .init
= bxt_sst_dsp_init
,
202 .init_fw
= bxt_sst_init_fw
,
203 .cleanup
= bxt_sst_dsp_cleanup
208 .loader_ops
= bxt_get_loader_ops
,
209 .init
= cnl_sst_dsp_init
,
210 .init_fw
= cnl_sst_init_fw
,
211 .cleanup
= cnl_sst_dsp_cleanup
216 .loader_ops
= bxt_get_loader_ops
,
217 .init
= cnl_sst_dsp_init
,
218 .init_fw
= cnl_sst_init_fw
,
219 .cleanup
= cnl_sst_dsp_cleanup
224 .loader_ops
= bxt_get_loader_ops
,
225 .init
= cnl_sst_dsp_init
,
226 .init_fw
= cnl_sst_init_fw
,
227 .cleanup
= cnl_sst_dsp_cleanup
232 .loader_ops
= bxt_get_loader_ops
,
233 .init
= cnl_sst_dsp_init
,
234 .init_fw
= cnl_sst_init_fw
,
235 .cleanup
= cnl_sst_dsp_cleanup
239 const struct skl_dsp_ops
*skl_get_dsp_ops(int pci_id
)
243 for (i
= 0; i
< ARRAY_SIZE(dsp_ops
); i
++) {
244 if (dsp_ops
[i
].id
== pci_id
)
251 int skl_init_dsp(struct skl_dev
*skl
)
253 void __iomem
*mmio_base
;
254 struct hdac_bus
*bus
= skl_to_bus(skl
);
255 struct skl_dsp_loader_ops loader_ops
;
257 const struct skl_dsp_ops
*ops
;
258 struct skl_dsp_cores
*cores
;
261 /* enable ppcap interrupt */
262 snd_hdac_ext_bus_ppcap_enable(bus
, true);
263 snd_hdac_ext_bus_ppcap_int_enable(bus
, true);
265 /* read the BAR of the ADSP MMIO */
266 mmio_base
= pci_ioremap_bar(skl
->pci
, 4);
267 if (mmio_base
== NULL
) {
268 dev_err(bus
->dev
, "ioremap error\n");
272 ops
= skl_get_dsp_ops(skl
->pci
->device
);
278 loader_ops
= ops
->loader_ops();
279 ret
= ops
->init(bus
->dev
, mmio_base
, irq
,
280 skl
->fw_name
, loader_ops
,
288 cores
->count
= ops
->num_cores
;
290 cores
->state
= kcalloc(cores
->count
, sizeof(*cores
->state
), GFP_KERNEL
);
296 cores
->usage_count
= kcalloc(cores
->count
, sizeof(*cores
->usage_count
),
298 if (!cores
->usage_count
) {
300 goto free_core_state
;
303 dev_dbg(bus
->dev
, "dsp registration status=%d\n", ret
);
316 int skl_free_dsp(struct skl_dev
*skl
)
318 struct hdac_bus
*bus
= skl_to_bus(skl
);
320 /* disable ppcap interrupt */
321 snd_hdac_ext_bus_ppcap_int_enable(bus
, false);
323 skl
->dsp_ops
->cleanup(bus
->dev
, skl
);
325 kfree(skl
->cores
.state
);
326 kfree(skl
->cores
.usage_count
);
328 if (skl
->dsp
->addr
.lpe
)
329 iounmap(skl
->dsp
->addr
.lpe
);
335 * In the case of "suspend_active" i.e, the Audio IP being active
336 * during system suspend, immediately excecute any pending D0i3 work
337 * before suspending. This is needed for the IP to work in low power
338 * mode during system suspend. In the case of normal suspend, cancel
339 * any pending D0i3 work.
341 int skl_suspend_late_dsp(struct skl_dev
*skl
)
343 struct delayed_work
*dwork
;
348 dwork
= &skl
->d0i3
.work
;
350 if (dwork
->work
.func
) {
351 if (skl
->supend_active
)
352 flush_delayed_work(dwork
);
354 cancel_delayed_work_sync(dwork
);
360 int skl_suspend_dsp(struct skl_dev
*skl
)
362 struct hdac_bus
*bus
= skl_to_bus(skl
);
365 /* if ppcap is not supported return 0 */
369 ret
= skl_dsp_sleep(skl
->dsp
);
373 /* disable ppcap interrupt */
374 snd_hdac_ext_bus_ppcap_int_enable(bus
, false);
375 snd_hdac_ext_bus_ppcap_enable(bus
, false);
380 int skl_resume_dsp(struct skl_dev
*skl
)
382 struct hdac_bus
*bus
= skl_to_bus(skl
);
385 /* if ppcap is not supported return 0 */
389 /* enable ppcap interrupt */
390 snd_hdac_ext_bus_ppcap_enable(bus
, true);
391 snd_hdac_ext_bus_ppcap_int_enable(bus
, true);
393 /* check if DSP 1st boot is done */
394 if (skl
->is_first_boot
)
398 * Disable dynamic clock and power gating during firmware
399 * and library download
401 skl
->enable_miscbdcge(skl
->dev
, false);
402 skl
->clock_power_gating(skl
->dev
, false);
404 ret
= skl_dsp_wake(skl
->dsp
);
405 skl
->enable_miscbdcge(skl
->dev
, true);
406 skl
->clock_power_gating(skl
->dev
, true);
410 if (skl
->cfg
.astate_cfg
!= NULL
) {
411 skl_dsp_set_astate_cfg(skl
, skl
->cfg
.astate_cfg
->count
,
412 skl
->cfg
.astate_cfg
);
417 enum skl_bitdepth
skl_get_bit_depth(int params
)
421 return SKL_DEPTH_8BIT
;
424 return SKL_DEPTH_16BIT
;
427 return SKL_DEPTH_24BIT
;
430 return SKL_DEPTH_32BIT
;
433 return SKL_DEPTH_INVALID
;
439 * Each module in DSP expects a base module configuration, which consists of
440 * PCM format information, which we calculate in driver and resource values
441 * which are read from widget information passed through topology binary
442 * This is send when we create a module with INIT_INSTANCE IPC msg
444 static void skl_set_base_module_format(struct skl_dev
*skl
,
445 struct skl_module_cfg
*mconfig
,
446 struct skl_base_cfg
*base_cfg
)
448 struct skl_module
*module
= mconfig
->module
;
449 struct skl_module_res
*res
= &module
->resources
[mconfig
->res_idx
];
450 struct skl_module_iface
*fmt
= &module
->formats
[mconfig
->fmt_idx
];
451 struct skl_module_fmt
*format
= &fmt
->inputs
[0].fmt
;
453 base_cfg
->audio_fmt
.number_of_channels
= format
->channels
;
455 base_cfg
->audio_fmt
.s_freq
= format
->s_freq
;
456 base_cfg
->audio_fmt
.bit_depth
= format
->bit_depth
;
457 base_cfg
->audio_fmt
.valid_bit_depth
= format
->valid_bit_depth
;
458 base_cfg
->audio_fmt
.ch_cfg
= format
->ch_cfg
;
459 base_cfg
->audio_fmt
.sample_type
= format
->sample_type
;
461 dev_dbg(skl
->dev
, "bit_depth=%x valid_bd=%x ch_config=%x\n",
462 format
->bit_depth
, format
->valid_bit_depth
,
465 base_cfg
->audio_fmt
.channel_map
= format
->ch_map
;
467 base_cfg
->audio_fmt
.interleaving
= format
->interleaving_style
;
469 base_cfg
->cpc
= res
->cpc
;
470 base_cfg
->ibs
= res
->ibs
;
471 base_cfg
->obs
= res
->obs
;
472 base_cfg
->is_pages
= res
->is_pages
;
476 * Copies copier capabilities into copier module and updates copier module
479 static void skl_copy_copier_caps(struct skl_module_cfg
*mconfig
,
480 struct skl_cpr_cfg
*cpr_mconfig
)
482 if (mconfig
->formats_config
.caps_size
== 0)
485 memcpy(cpr_mconfig
->gtw_cfg
.config_data
,
486 mconfig
->formats_config
.caps
,
487 mconfig
->formats_config
.caps_size
);
489 cpr_mconfig
->gtw_cfg
.config_length
=
490 (mconfig
->formats_config
.caps_size
) / 4;
493 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
495 * Calculate the gatewat settings required for copier module, type of
496 * gateway and index of gateway to use
498 static u32
skl_get_node_id(struct skl_dev
*skl
,
499 struct skl_module_cfg
*mconfig
)
501 union skl_connector_node_id node_id
= {0};
502 union skl_ssp_dma_node ssp_node
= {0};
503 struct skl_pipe_params
*params
= mconfig
->pipe
->p_params
;
505 switch (mconfig
->dev_type
) {
507 node_id
.node
.dma_type
=
508 (SKL_CONN_SOURCE
== mconfig
->hw_conn_type
) ?
509 SKL_DMA_I2S_LINK_OUTPUT_CLASS
:
510 SKL_DMA_I2S_LINK_INPUT_CLASS
;
511 node_id
.node
.vindex
= params
->host_dma_id
+
512 (mconfig
->vbus_id
<< 3);
516 node_id
.node
.dma_type
=
517 (SKL_CONN_SOURCE
== mconfig
->hw_conn_type
) ?
518 SKL_DMA_I2S_LINK_OUTPUT_CLASS
:
519 SKL_DMA_I2S_LINK_INPUT_CLASS
;
520 ssp_node
.dma_node
.time_slot_index
= mconfig
->time_slot
;
521 ssp_node
.dma_node
.i2s_instance
= mconfig
->vbus_id
;
522 node_id
.node
.vindex
= ssp_node
.val
;
525 case SKL_DEVICE_DMIC
:
526 node_id
.node
.dma_type
= SKL_DMA_DMIC_LINK_INPUT_CLASS
;
527 node_id
.node
.vindex
= mconfig
->vbus_id
+
528 (mconfig
->time_slot
);
531 case SKL_DEVICE_HDALINK
:
532 node_id
.node
.dma_type
=
533 (SKL_CONN_SOURCE
== mconfig
->hw_conn_type
) ?
534 SKL_DMA_HDA_LINK_OUTPUT_CLASS
:
535 SKL_DMA_HDA_LINK_INPUT_CLASS
;
536 node_id
.node
.vindex
= params
->link_dma_id
;
539 case SKL_DEVICE_HDAHOST
:
540 node_id
.node
.dma_type
=
541 (SKL_CONN_SOURCE
== mconfig
->hw_conn_type
) ?
542 SKL_DMA_HDA_HOST_OUTPUT_CLASS
:
543 SKL_DMA_HDA_HOST_INPUT_CLASS
;
544 node_id
.node
.vindex
= params
->host_dma_id
;
548 node_id
.val
= 0xFFFFFFFF;
555 static void skl_setup_cpr_gateway_cfg(struct skl_dev
*skl
,
556 struct skl_module_cfg
*mconfig
,
557 struct skl_cpr_cfg
*cpr_mconfig
)
560 struct skl_module_res
*res
;
561 int res_idx
= mconfig
->res_idx
;
563 cpr_mconfig
->gtw_cfg
.node_id
= skl_get_node_id(skl
, mconfig
);
565 if (cpr_mconfig
->gtw_cfg
.node_id
== SKL_NON_GATEWAY_CPR_NODE_ID
) {
566 cpr_mconfig
->cpr_feature_mask
= 0;
570 if (skl
->nr_modules
) {
571 res
= &mconfig
->module
->resources
[mconfig
->res_idx
];
572 cpr_mconfig
->gtw_cfg
.dma_buffer_size
= res
->dma_buffer_size
;
573 goto skip_buf_size_calc
;
575 res
= &mconfig
->module
->resources
[res_idx
];
578 switch (mconfig
->hw_conn_type
) {
579 case SKL_CONN_SOURCE
:
580 if (mconfig
->dev_type
== SKL_DEVICE_HDAHOST
)
581 dma_io_buf
= res
->ibs
;
583 dma_io_buf
= res
->obs
;
587 if (mconfig
->dev_type
== SKL_DEVICE_HDAHOST
)
588 dma_io_buf
= res
->obs
;
590 dma_io_buf
= res
->ibs
;
594 dev_warn(skl
->dev
, "wrong connection type: %d\n",
595 mconfig
->hw_conn_type
);
599 cpr_mconfig
->gtw_cfg
.dma_buffer_size
=
600 mconfig
->dma_buffer_size
* dma_io_buf
;
602 /* fallback to 2ms default value */
603 if (!cpr_mconfig
->gtw_cfg
.dma_buffer_size
) {
604 if (mconfig
->hw_conn_type
== SKL_CONN_SOURCE
)
605 cpr_mconfig
->gtw_cfg
.dma_buffer_size
= 2 * res
->obs
;
607 cpr_mconfig
->gtw_cfg
.dma_buffer_size
= 2 * res
->ibs
;
611 cpr_mconfig
->cpr_feature_mask
= 0;
612 cpr_mconfig
->gtw_cfg
.config_length
= 0;
614 skl_copy_copier_caps(mconfig
, cpr_mconfig
);
617 #define DMA_CONTROL_ID 5
618 #define DMA_I2S_BLOB_SIZE 21
620 int skl_dsp_set_dma_control(struct skl_dev
*skl
, u32
*caps
,
621 u32 caps_size
, u32 node_id
)
623 struct skl_dma_control
*dma_ctrl
;
624 struct skl_ipc_large_config_msg msg
= {0};
629 * if blob size zero, then return
634 msg
.large_param_id
= DMA_CONTROL_ID
;
635 msg
.param_data_size
= sizeof(struct skl_dma_control
) + caps_size
;
637 dma_ctrl
= kzalloc(msg
.param_data_size
, GFP_KERNEL
);
638 if (dma_ctrl
== NULL
)
641 dma_ctrl
->node_id
= node_id
;
644 * NHLT blob may contain additional configs along with i2s blob.
645 * firmware expects only the i2s blob size as the config_length.
646 * So fix to i2s blob size.
649 dma_ctrl
->config_length
= DMA_I2S_BLOB_SIZE
;
651 memcpy(dma_ctrl
->config_data
, caps
, caps_size
);
653 err
= skl_ipc_set_large_config(&skl
->ipc
, &msg
, (u32
*)dma_ctrl
);
658 EXPORT_SYMBOL_GPL(skl_dsp_set_dma_control
);
660 static void skl_setup_out_format(struct skl_dev
*skl
,
661 struct skl_module_cfg
*mconfig
,
662 struct skl_audio_data_format
*out_fmt
)
664 struct skl_module
*module
= mconfig
->module
;
665 struct skl_module_iface
*fmt
= &module
->formats
[mconfig
->fmt_idx
];
666 struct skl_module_fmt
*format
= &fmt
->outputs
[0].fmt
;
668 out_fmt
->number_of_channels
= (u8
)format
->channels
;
669 out_fmt
->s_freq
= format
->s_freq
;
670 out_fmt
->bit_depth
= format
->bit_depth
;
671 out_fmt
->valid_bit_depth
= format
->valid_bit_depth
;
672 out_fmt
->ch_cfg
= format
->ch_cfg
;
674 out_fmt
->channel_map
= format
->ch_map
;
675 out_fmt
->interleaving
= format
->interleaving_style
;
676 out_fmt
->sample_type
= format
->sample_type
;
678 dev_dbg(skl
->dev
, "copier out format chan=%d fre=%d bitdepth=%d\n",
679 out_fmt
->number_of_channels
, format
->s_freq
, format
->bit_depth
);
683 * DSP needs SRC module for frequency conversion, SRC takes base module
684 * configuration and the target frequency as extra parameter passed as src
687 static void skl_set_src_format(struct skl_dev
*skl
,
688 struct skl_module_cfg
*mconfig
,
689 struct skl_src_module_cfg
*src_mconfig
)
691 struct skl_module
*module
= mconfig
->module
;
692 struct skl_module_iface
*iface
= &module
->formats
[mconfig
->fmt_idx
];
693 struct skl_module_fmt
*fmt
= &iface
->outputs
[0].fmt
;
695 skl_set_base_module_format(skl
, mconfig
,
696 (struct skl_base_cfg
*)src_mconfig
);
698 src_mconfig
->src_cfg
= fmt
->s_freq
;
702 * DSP needs updown module to do channel conversion. updown module take base
703 * module configuration and channel configuration
704 * It also take coefficients and now we have defaults applied here
706 static void skl_set_updown_mixer_format(struct skl_dev
*skl
,
707 struct skl_module_cfg
*mconfig
,
708 struct skl_up_down_mixer_cfg
*mixer_mconfig
)
710 struct skl_module
*module
= mconfig
->module
;
711 struct skl_module_iface
*iface
= &module
->formats
[mconfig
->fmt_idx
];
712 struct skl_module_fmt
*fmt
= &iface
->outputs
[0].fmt
;
714 skl_set_base_module_format(skl
, mconfig
,
715 (struct skl_base_cfg
*)mixer_mconfig
);
716 mixer_mconfig
->out_ch_cfg
= fmt
->ch_cfg
;
717 mixer_mconfig
->ch_map
= fmt
->ch_map
;
721 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
722 * dma) or link (hda link, SSP, PDM)
723 * Here we calculate the copier module parameters, like PCM format, output
724 * format, gateway settings
725 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
727 static void skl_set_copier_format(struct skl_dev
*skl
,
728 struct skl_module_cfg
*mconfig
,
729 struct skl_cpr_cfg
*cpr_mconfig
)
731 struct skl_audio_data_format
*out_fmt
= &cpr_mconfig
->out_fmt
;
732 struct skl_base_cfg
*base_cfg
= (struct skl_base_cfg
*)cpr_mconfig
;
734 skl_set_base_module_format(skl
, mconfig
, base_cfg
);
736 skl_setup_out_format(skl
, mconfig
, out_fmt
);
737 skl_setup_cpr_gateway_cfg(skl
, mconfig
, cpr_mconfig
);
741 * Algo module are DSP pre processing modules. Algo module take base module
742 * configuration and params
745 static void skl_set_algo_format(struct skl_dev
*skl
,
746 struct skl_module_cfg
*mconfig
,
747 struct skl_algo_cfg
*algo_mcfg
)
749 struct skl_base_cfg
*base_cfg
= (struct skl_base_cfg
*)algo_mcfg
;
751 skl_set_base_module_format(skl
, mconfig
, base_cfg
);
753 if (mconfig
->formats_config
.caps_size
== 0)
756 memcpy(algo_mcfg
->params
,
757 mconfig
->formats_config
.caps
,
758 mconfig
->formats_config
.caps_size
);
763 * Mic select module allows selecting one or many input channels, thus
766 * Mic select module take base module configuration and out-format
769 static void skl_set_base_outfmt_format(struct skl_dev
*skl
,
770 struct skl_module_cfg
*mconfig
,
771 struct skl_base_outfmt_cfg
*base_outfmt_mcfg
)
773 struct skl_audio_data_format
*out_fmt
= &base_outfmt_mcfg
->out_fmt
;
774 struct skl_base_cfg
*base_cfg
=
775 (struct skl_base_cfg
*)base_outfmt_mcfg
;
777 skl_set_base_module_format(skl
, mconfig
, base_cfg
);
778 skl_setup_out_format(skl
, mconfig
, out_fmt
);
781 static u16
skl_get_module_param_size(struct skl_dev
*skl
,
782 struct skl_module_cfg
*mconfig
)
786 switch (mconfig
->m_type
) {
787 case SKL_MODULE_TYPE_COPIER
:
788 param_size
= sizeof(struct skl_cpr_cfg
);
789 param_size
+= mconfig
->formats_config
.caps_size
;
792 case SKL_MODULE_TYPE_SRCINT
:
793 return sizeof(struct skl_src_module_cfg
);
795 case SKL_MODULE_TYPE_UPDWMIX
:
796 return sizeof(struct skl_up_down_mixer_cfg
);
798 case SKL_MODULE_TYPE_ALGO
:
799 param_size
= sizeof(struct skl_base_cfg
);
800 param_size
+= mconfig
->formats_config
.caps_size
;
803 case SKL_MODULE_TYPE_BASE_OUTFMT
:
804 case SKL_MODULE_TYPE_MIC_SELECT
:
805 case SKL_MODULE_TYPE_KPB
:
806 return sizeof(struct skl_base_outfmt_cfg
);
810 * return only base cfg when no specific module type is
813 return sizeof(struct skl_base_cfg
);
820 * DSP firmware supports various modules like copier, SRC, updown etc.
821 * These modules required various parameters to be calculated and sent for
822 * the module initialization to DSP. By default a generic module needs only
823 * base module format configuration
826 static int skl_set_module_format(struct skl_dev
*skl
,
827 struct skl_module_cfg
*module_config
,
828 u16
*module_config_size
,
833 param_size
= skl_get_module_param_size(skl
, module_config
);
835 *param_data
= kzalloc(param_size
, GFP_KERNEL
);
836 if (NULL
== *param_data
)
839 *module_config_size
= param_size
;
841 switch (module_config
->m_type
) {
842 case SKL_MODULE_TYPE_COPIER
:
843 skl_set_copier_format(skl
, module_config
, *param_data
);
846 case SKL_MODULE_TYPE_SRCINT
:
847 skl_set_src_format(skl
, module_config
, *param_data
);
850 case SKL_MODULE_TYPE_UPDWMIX
:
851 skl_set_updown_mixer_format(skl
, module_config
, *param_data
);
854 case SKL_MODULE_TYPE_ALGO
:
855 skl_set_algo_format(skl
, module_config
, *param_data
);
858 case SKL_MODULE_TYPE_BASE_OUTFMT
:
859 case SKL_MODULE_TYPE_MIC_SELECT
:
860 case SKL_MODULE_TYPE_KPB
:
861 skl_set_base_outfmt_format(skl
, module_config
, *param_data
);
865 skl_set_base_module_format(skl
, module_config
, *param_data
);
870 dev_dbg(skl
->dev
, "Module type=%d id=%d config size: %d bytes\n",
871 module_config
->m_type
, module_config
->id
.module_id
,
873 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET
, 8, 4,
874 *param_data
, param_size
, false);
878 static int skl_get_queue_index(struct skl_module_pin
*mpin
,
879 struct skl_module_inst_id id
, int max
)
883 for (i
= 0; i
< max
; i
++) {
884 if (mpin
[i
].id
.module_id
== id
.module_id
&&
885 mpin
[i
].id
.instance_id
== id
.instance_id
)
893 * Allocates queue for each module.
894 * if dynamic, the pin_index is allocated 0 to max_pin.
895 * In static, the pin_index is fixed based on module_id and instance id
897 static int skl_alloc_queue(struct skl_module_pin
*mpin
,
898 struct skl_module_cfg
*tgt_cfg
, int max
)
901 struct skl_module_inst_id id
= tgt_cfg
->id
;
903 * if pin in dynamic, find first free pin
904 * otherwise find match module and instance id pin as topology will
905 * ensure a unique pin is assigned to this so no need to
908 for (i
= 0; i
< max
; i
++) {
909 if (mpin
[i
].is_dynamic
) {
910 if (!mpin
[i
].in_use
&&
911 mpin
[i
].pin_state
== SKL_PIN_UNBIND
) {
913 mpin
[i
].in_use
= true;
914 mpin
[i
].id
.module_id
= id
.module_id
;
915 mpin
[i
].id
.instance_id
= id
.instance_id
;
916 mpin
[i
].id
.pvt_id
= id
.pvt_id
;
917 mpin
[i
].tgt_mcfg
= tgt_cfg
;
921 if (mpin
[i
].id
.module_id
== id
.module_id
&&
922 mpin
[i
].id
.instance_id
== id
.instance_id
&&
923 mpin
[i
].pin_state
== SKL_PIN_UNBIND
) {
925 mpin
[i
].tgt_mcfg
= tgt_cfg
;
934 static void skl_free_queue(struct skl_module_pin
*mpin
, int q_index
)
936 if (mpin
[q_index
].is_dynamic
) {
937 mpin
[q_index
].in_use
= false;
938 mpin
[q_index
].id
.module_id
= 0;
939 mpin
[q_index
].id
.instance_id
= 0;
940 mpin
[q_index
].id
.pvt_id
= 0;
942 mpin
[q_index
].pin_state
= SKL_PIN_UNBIND
;
943 mpin
[q_index
].tgt_mcfg
= NULL
;
946 /* Module state will be set to unint, if all the out pin state is UNBIND */
948 static void skl_clear_module_state(struct skl_module_pin
*mpin
, int max
,
949 struct skl_module_cfg
*mcfg
)
954 for (i
= 0; i
< max
; i
++) {
955 if (mpin
[i
].pin_state
== SKL_PIN_UNBIND
)
962 mcfg
->m_state
= SKL_MODULE_INIT_DONE
;
967 * A module needs to be instanataited in DSP. A mdoule is present in a
968 * collection of module referred as a PIPE.
969 * We first calculate the module format, based on module type and then
970 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
972 int skl_init_module(struct skl_dev
*skl
,
973 struct skl_module_cfg
*mconfig
)
975 u16 module_config_size
= 0;
976 void *param_data
= NULL
;
978 struct skl_ipc_init_instance_msg msg
;
980 dev_dbg(skl
->dev
, "%s: module_id = %d instance=%d\n", __func__
,
981 mconfig
->id
.module_id
, mconfig
->id
.pvt_id
);
983 if (mconfig
->pipe
->state
!= SKL_PIPE_CREATED
) {
984 dev_err(skl
->dev
, "Pipe not created state= %d pipe_id= %d\n",
985 mconfig
->pipe
->state
, mconfig
->pipe
->ppl_id
);
989 ret
= skl_set_module_format(skl
, mconfig
,
990 &module_config_size
, ¶m_data
);
992 dev_err(skl
->dev
, "Failed to set module format ret=%d\n", ret
);
996 msg
.module_id
= mconfig
->id
.module_id
;
997 msg
.instance_id
= mconfig
->id
.pvt_id
;
998 msg
.ppl_instance_id
= mconfig
->pipe
->ppl_id
;
999 msg
.param_data_size
= module_config_size
;
1000 msg
.core_id
= mconfig
->core_id
;
1001 msg
.domain
= mconfig
->domain
;
1003 ret
= skl_ipc_init_instance(&skl
->ipc
, &msg
, param_data
);
1005 dev_err(skl
->dev
, "Failed to init instance ret=%d\n", ret
);
1009 mconfig
->m_state
= SKL_MODULE_INIT_DONE
;
1014 static void skl_dump_bind_info(struct skl_dev
*skl
, struct skl_module_cfg
1015 *src_module
, struct skl_module_cfg
*dst_module
)
1017 dev_dbg(skl
->dev
, "%s: src module_id = %d src_instance=%d\n",
1018 __func__
, src_module
->id
.module_id
, src_module
->id
.pvt_id
);
1019 dev_dbg(skl
->dev
, "%s: dst_module=%d dst_instance=%d\n", __func__
,
1020 dst_module
->id
.module_id
, dst_module
->id
.pvt_id
);
1022 dev_dbg(skl
->dev
, "src_module state = %d dst module state = %d\n",
1023 src_module
->m_state
, dst_module
->m_state
);
1027 * On module freeup, we need to unbind the module with modules
1028 * it is already bind.
1029 * Find the pin allocated and unbind then using bind_unbind IPC
1031 int skl_unbind_modules(struct skl_dev
*skl
,
1032 struct skl_module_cfg
*src_mcfg
,
1033 struct skl_module_cfg
*dst_mcfg
)
1036 struct skl_ipc_bind_unbind_msg msg
;
1037 struct skl_module_inst_id src_id
= src_mcfg
->id
;
1038 struct skl_module_inst_id dst_id
= dst_mcfg
->id
;
1039 int in_max
= dst_mcfg
->module
->max_input_pins
;
1040 int out_max
= src_mcfg
->module
->max_output_pins
;
1041 int src_index
, dst_index
, src_pin_state
, dst_pin_state
;
1043 skl_dump_bind_info(skl
, src_mcfg
, dst_mcfg
);
1045 /* get src queue index */
1046 src_index
= skl_get_queue_index(src_mcfg
->m_out_pin
, dst_id
, out_max
);
1050 msg
.src_queue
= src_index
;
1052 /* get dst queue index */
1053 dst_index
= skl_get_queue_index(dst_mcfg
->m_in_pin
, src_id
, in_max
);
1057 msg
.dst_queue
= dst_index
;
1059 src_pin_state
= src_mcfg
->m_out_pin
[src_index
].pin_state
;
1060 dst_pin_state
= dst_mcfg
->m_in_pin
[dst_index
].pin_state
;
1062 if (src_pin_state
!= SKL_PIN_BIND_DONE
||
1063 dst_pin_state
!= SKL_PIN_BIND_DONE
)
1066 msg
.module_id
= src_mcfg
->id
.module_id
;
1067 msg
.instance_id
= src_mcfg
->id
.pvt_id
;
1068 msg
.dst_module_id
= dst_mcfg
->id
.module_id
;
1069 msg
.dst_instance_id
= dst_mcfg
->id
.pvt_id
;
1072 ret
= skl_ipc_bind_unbind(&skl
->ipc
, &msg
);
1074 /* free queue only if unbind is success */
1075 skl_free_queue(src_mcfg
->m_out_pin
, src_index
);
1076 skl_free_queue(dst_mcfg
->m_in_pin
, dst_index
);
1079 * check only if src module bind state, bind is
1080 * always from src -> sink
1082 skl_clear_module_state(src_mcfg
->m_out_pin
, out_max
, src_mcfg
);
1088 static void fill_pin_params(struct skl_audio_data_format
*pin_fmt
,
1089 struct skl_module_fmt
*format
)
1091 pin_fmt
->number_of_channels
= format
->channels
;
1092 pin_fmt
->s_freq
= format
->s_freq
;
1093 pin_fmt
->bit_depth
= format
->bit_depth
;
1094 pin_fmt
->valid_bit_depth
= format
->valid_bit_depth
;
1095 pin_fmt
->ch_cfg
= format
->ch_cfg
;
1096 pin_fmt
->sample_type
= format
->sample_type
;
1097 pin_fmt
->channel_map
= format
->ch_map
;
1098 pin_fmt
->interleaving
= format
->interleaving_style
;
1101 #define CPR_SINK_FMT_PARAM_ID 2
1104 * Once a module is instantiated it need to be 'bind' with other modules in
1105 * the pipeline. For binding we need to find the module pins which are bind
1107 * This function finds the pins and then sends bund_unbind IPC message to
1108 * DSP using IPC helper
1110 int skl_bind_modules(struct skl_dev
*skl
,
1111 struct skl_module_cfg
*src_mcfg
,
1112 struct skl_module_cfg
*dst_mcfg
)
1115 struct skl_ipc_bind_unbind_msg msg
;
1116 int in_max
= dst_mcfg
->module
->max_input_pins
;
1117 int out_max
= src_mcfg
->module
->max_output_pins
;
1118 int src_index
, dst_index
;
1119 struct skl_module_fmt
*format
;
1120 struct skl_cpr_pin_fmt pin_fmt
;
1121 struct skl_module
*module
;
1122 struct skl_module_iface
*fmt
;
1124 skl_dump_bind_info(skl
, src_mcfg
, dst_mcfg
);
1126 if (src_mcfg
->m_state
< SKL_MODULE_INIT_DONE
||
1127 dst_mcfg
->m_state
< SKL_MODULE_INIT_DONE
)
1130 src_index
= skl_alloc_queue(src_mcfg
->m_out_pin
, dst_mcfg
, out_max
);
1134 msg
.src_queue
= src_index
;
1135 dst_index
= skl_alloc_queue(dst_mcfg
->m_in_pin
, src_mcfg
, in_max
);
1136 if (dst_index
< 0) {
1137 skl_free_queue(src_mcfg
->m_out_pin
, src_index
);
1142 * Copier module requires the separate large_config_set_ipc to
1143 * configure the pins other than 0
1145 if (src_mcfg
->m_type
== SKL_MODULE_TYPE_COPIER
&& src_index
> 0) {
1146 pin_fmt
.sink_id
= src_index
;
1147 module
= src_mcfg
->module
;
1148 fmt
= &module
->formats
[src_mcfg
->fmt_idx
];
1150 /* Input fmt is same as that of src module input cfg */
1151 format
= &fmt
->inputs
[0].fmt
;
1152 fill_pin_params(&(pin_fmt
.src_fmt
), format
);
1154 format
= &fmt
->outputs
[src_index
].fmt
;
1155 fill_pin_params(&(pin_fmt
.dst_fmt
), format
);
1156 ret
= skl_set_module_params(skl
, (void *)&pin_fmt
,
1157 sizeof(struct skl_cpr_pin_fmt
),
1158 CPR_SINK_FMT_PARAM_ID
, src_mcfg
);
1164 msg
.dst_queue
= dst_index
;
1166 dev_dbg(skl
->dev
, "src queue = %d dst queue =%d\n",
1167 msg
.src_queue
, msg
.dst_queue
);
1169 msg
.module_id
= src_mcfg
->id
.module_id
;
1170 msg
.instance_id
= src_mcfg
->id
.pvt_id
;
1171 msg
.dst_module_id
= dst_mcfg
->id
.module_id
;
1172 msg
.dst_instance_id
= dst_mcfg
->id
.pvt_id
;
1175 ret
= skl_ipc_bind_unbind(&skl
->ipc
, &msg
);
1178 src_mcfg
->m_state
= SKL_MODULE_BIND_DONE
;
1179 src_mcfg
->m_out_pin
[src_index
].pin_state
= SKL_PIN_BIND_DONE
;
1180 dst_mcfg
->m_in_pin
[dst_index
].pin_state
= SKL_PIN_BIND_DONE
;
1184 /* error case , if IPC fails, clear the queue index */
1185 skl_free_queue(src_mcfg
->m_out_pin
, src_index
);
1186 skl_free_queue(dst_mcfg
->m_in_pin
, dst_index
);
1191 static int skl_set_pipe_state(struct skl_dev
*skl
, struct skl_pipe
*pipe
,
1192 enum skl_ipc_pipeline_state state
)
1194 dev_dbg(skl
->dev
, "%s: pipe_state = %d\n", __func__
, state
);
1196 return skl_ipc_set_pipeline_state(&skl
->ipc
, pipe
->ppl_id
, state
);
1200 * A pipeline is a collection of modules. Before a module in instantiated a
1201 * pipeline needs to be created for it.
1202 * This function creates pipeline, by sending create pipeline IPC messages
1205 int skl_create_pipeline(struct skl_dev
*skl
, struct skl_pipe
*pipe
)
1209 dev_dbg(skl
->dev
, "%s: pipe_id = %d\n", __func__
, pipe
->ppl_id
);
1211 ret
= skl_ipc_create_pipeline(&skl
->ipc
, pipe
->memory_pages
,
1212 pipe
->pipe_priority
, pipe
->ppl_id
,
1215 dev_err(skl
->dev
, "Failed to create pipeline\n");
1219 pipe
->state
= SKL_PIPE_CREATED
;
1225 * A pipeline needs to be deleted on cleanup. If a pipeline is running,
1226 * then pause it first. Before actual deletion, pipeline should enter
1227 * reset state. Finish the procedure by sending delete pipeline IPC.
1228 * DSP will stop the DMA engines and release resources
1230 int skl_delete_pipe(struct skl_dev
*skl
, struct skl_pipe
*pipe
)
1234 dev_dbg(skl
->dev
, "%s: pipe = %d\n", __func__
, pipe
->ppl_id
);
1236 /* If pipe was not created in FW, do not try to delete it */
1237 if (pipe
->state
< SKL_PIPE_CREATED
)
1240 /* If pipe is started, do stop the pipe in FW. */
1241 if (pipe
->state
>= SKL_PIPE_STARTED
) {
1242 ret
= skl_set_pipe_state(skl
, pipe
, PPL_PAUSED
);
1244 dev_err(skl
->dev
, "Failed to stop pipeline\n");
1248 pipe
->state
= SKL_PIPE_PAUSED
;
1251 /* reset pipe state before deletion */
1252 ret
= skl_set_pipe_state(skl
, pipe
, PPL_RESET
);
1254 dev_err(skl
->dev
, "Failed to reset pipe ret=%d\n", ret
);
1258 pipe
->state
= SKL_PIPE_RESET
;
1260 ret
= skl_ipc_delete_pipeline(&skl
->ipc
, pipe
->ppl_id
);
1262 dev_err(skl
->dev
, "Failed to delete pipeline\n");
1266 pipe
->state
= SKL_PIPE_INVALID
;
1272 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1273 * For processing data the pipe need to be run by sending IPC set pipe state
1276 int skl_run_pipe(struct skl_dev
*skl
, struct skl_pipe
*pipe
)
1280 dev_dbg(skl
->dev
, "%s: pipe = %d\n", __func__
, pipe
->ppl_id
);
1282 /* If pipe was not created in FW, do not try to pause or delete */
1283 if (pipe
->state
< SKL_PIPE_CREATED
)
1286 /* Pipe has to be paused before it is started */
1287 ret
= skl_set_pipe_state(skl
, pipe
, PPL_PAUSED
);
1289 dev_err(skl
->dev
, "Failed to pause pipe\n");
1293 pipe
->state
= SKL_PIPE_PAUSED
;
1295 ret
= skl_set_pipe_state(skl
, pipe
, PPL_RUNNING
);
1297 dev_err(skl
->dev
, "Failed to start pipe\n");
1301 pipe
->state
= SKL_PIPE_STARTED
;
1307 * Stop the pipeline by sending set pipe state IPC
1308 * DSP doesnt implement stop so we always send pause message
1310 int skl_stop_pipe(struct skl_dev
*skl
, struct skl_pipe
*pipe
)
1314 dev_dbg(skl
->dev
, "In %s pipe=%d\n", __func__
, pipe
->ppl_id
);
1316 /* If pipe was not created in FW, do not try to pause or delete */
1317 if (pipe
->state
< SKL_PIPE_PAUSED
)
1320 ret
= skl_set_pipe_state(skl
, pipe
, PPL_PAUSED
);
1322 dev_dbg(skl
->dev
, "Failed to stop pipe\n");
1326 pipe
->state
= SKL_PIPE_PAUSED
;
1332 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1335 int skl_reset_pipe(struct skl_dev
*skl
, struct skl_pipe
*pipe
)
1339 /* If pipe was not created in FW, do not try to pause or delete */
1340 if (pipe
->state
< SKL_PIPE_PAUSED
)
1343 ret
= skl_set_pipe_state(skl
, pipe
, PPL_RESET
);
1345 dev_dbg(skl
->dev
, "Failed to reset pipe ret=%d\n", ret
);
1349 pipe
->state
= SKL_PIPE_RESET
;
1354 /* Algo parameter set helper function */
1355 int skl_set_module_params(struct skl_dev
*skl
, u32
*params
, int size
,
1356 u32 param_id
, struct skl_module_cfg
*mcfg
)
1358 struct skl_ipc_large_config_msg msg
;
1360 msg
.module_id
= mcfg
->id
.module_id
;
1361 msg
.instance_id
= mcfg
->id
.pvt_id
;
1362 msg
.param_data_size
= size
;
1363 msg
.large_param_id
= param_id
;
1365 return skl_ipc_set_large_config(&skl
->ipc
, &msg
, params
);
1368 int skl_get_module_params(struct skl_dev
*skl
, u32
*params
, int size
,
1369 u32 param_id
, struct skl_module_cfg
*mcfg
)
1371 struct skl_ipc_large_config_msg msg
;
1372 size_t bytes
= size
;
1374 msg
.module_id
= mcfg
->id
.module_id
;
1375 msg
.instance_id
= mcfg
->id
.pvt_id
;
1376 msg
.param_data_size
= size
;
1377 msg
.large_param_id
= param_id
;
1379 return skl_ipc_get_large_config(&skl
->ipc
, &msg
, ¶ms
, &bytes
);