treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / sound / soc / sof / sof-priv.h
blobbc2337cf1142d5e6aba8fd2d32308e8677cbd02e
1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 */
11 #ifndef __SOUND_SOC_SOF_PRIV_H
12 #define __SOUND_SOC_SOF_PRIV_H
14 #include <linux/device.h>
15 #include <sound/hdaudio.h>
16 #include <sound/sof.h>
17 #include <sound/sof/info.h>
18 #include <sound/sof/pm.h>
19 #include <sound/sof/trace.h>
20 #include <uapi/sound/sof/fw.h>
22 /* debug flags */
23 #define SOF_DBG_ENABLE_TRACE BIT(0)
24 #define SOF_DBG_REGS BIT(1)
25 #define SOF_DBG_MBOX BIT(2)
26 #define SOF_DBG_TEXT BIT(3)
27 #define SOF_DBG_PCI BIT(4)
28 #define SOF_DBG_RETAIN_CTX BIT(5) /* prevent DSP D3 on FW exception */
30 /* global debug state set by SOF_DBG_ flags */
31 extern int sof_core_debug;
33 /* max BARs mmaped devices can use */
34 #define SND_SOF_BARS 8
36 /* time in ms for runtime suspend delay */
37 #define SND_SOF_SUSPEND_DELAY_MS 2000
39 /* DMA buffer size for trace */
40 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
42 #define SOF_IPC_DSP_REPLY 0
43 #define SOF_IPC_HOST_REPLY 1
45 /* convenience constructor for DAI driver streams */
46 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
47 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
48 .rates = srates, .formats = sfmt}
50 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
51 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
53 #define ENABLE_DEBUGFS_CACHEBUF \
54 (IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \
55 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST))
57 /* DSP D0ix sub-state */
58 enum sof_d0_substate {
59 SOF_DSP_D0I0 = 0, /* DSP default D0 substate */
60 SOF_DSP_D0I3, /* DSP D0i3(low power) substate*/
63 struct snd_sof_dev;
64 struct snd_sof_ipc_msg;
65 struct snd_sof_ipc;
66 struct snd_sof_debugfs_map;
67 struct snd_soc_tplg_ops;
68 struct snd_soc_component;
69 struct snd_sof_pdata;
72 * SOF DSP HW abstraction operations.
73 * Used to abstract DSP HW architecture and any IO busses between host CPU
74 * and DSP device(s).
76 struct snd_sof_dsp_ops {
78 /* probe and remove */
79 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
80 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */
82 /* DSP core boot / reset */
83 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
84 int (*stall)(struct snd_sof_dev *sof_dev); /* optional */
85 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
86 int (*core_power_up)(struct snd_sof_dev *sof_dev,
87 unsigned int core_mask); /* optional */
88 int (*core_power_down)(struct snd_sof_dev *sof_dev,
89 unsigned int core_mask); /* optional */
92 * Register IO: only used by respective drivers themselves,
93 * TODO: consider removing these operations and calling respective
94 * implementations directly
96 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
97 u32 value); /* optional */
98 u32 (*read)(struct snd_sof_dev *sof_dev,
99 void __iomem *addr); /* optional */
100 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
101 u64 value); /* optional */
102 u64 (*read64)(struct snd_sof_dev *sof_dev,
103 void __iomem *addr); /* optional */
105 /* memcpy IO */
106 void (*block_read)(struct snd_sof_dev *sof_dev, u32 bar,
107 u32 offset, void *dest,
108 size_t size); /* mandatory */
109 void (*block_write)(struct snd_sof_dev *sof_dev, u32 bar,
110 u32 offset, void *src,
111 size_t size); /* mandatory */
113 /* doorbell */
114 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
115 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
117 /* ipc */
118 int (*send_msg)(struct snd_sof_dev *sof_dev,
119 struct snd_sof_ipc_msg *msg); /* mandatory */
121 /* FW loading */
122 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
123 int (*load_module)(struct snd_sof_dev *sof_dev,
124 struct snd_sof_mod_hdr *hdr); /* optional */
126 * FW ready checks for ABI compatibility and creates
127 * memory windows at first boot
129 int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */
131 /* connect pcm substream to a host stream */
132 int (*pcm_open)(struct snd_sof_dev *sdev,
133 struct snd_pcm_substream *substream); /* optional */
134 /* disconnect pcm substream to a host stream */
135 int (*pcm_close)(struct snd_sof_dev *sdev,
136 struct snd_pcm_substream *substream); /* optional */
138 /* host stream hw params */
139 int (*pcm_hw_params)(struct snd_sof_dev *sdev,
140 struct snd_pcm_substream *substream,
141 struct snd_pcm_hw_params *params,
142 struct sof_ipc_stream_params *ipc_params); /* optional */
144 /* host stream hw_free */
145 int (*pcm_hw_free)(struct snd_sof_dev *sdev,
146 struct snd_pcm_substream *substream); /* optional */
148 /* host stream trigger */
149 int (*pcm_trigger)(struct snd_sof_dev *sdev,
150 struct snd_pcm_substream *substream,
151 int cmd); /* optional */
153 /* host stream pointer */
154 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
155 struct snd_pcm_substream *substream); /* optional */
157 /* host read DSP stream data */
158 void (*ipc_msg_data)(struct snd_sof_dev *sdev,
159 struct snd_pcm_substream *substream,
160 void *p, size_t sz); /* mandatory */
162 /* host configure DSP HW parameters */
163 int (*ipc_pcm_params)(struct snd_sof_dev *sdev,
164 struct snd_pcm_substream *substream,
165 const struct sof_ipc_pcm_params_reply *reply); /* mandatory */
167 /* pre/post firmware run */
168 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
169 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
171 /* DSP PM */
172 int (*suspend)(struct snd_sof_dev *sof_dev); /* optional */
173 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
174 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
175 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
176 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
177 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
178 int (*set_power_state)(struct snd_sof_dev *sdev,
179 enum sof_d0_substate d0_substate); /* optional */
181 /* DSP clocking */
182 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
184 /* debug */
185 const struct snd_sof_debugfs_map *debug_map; /* optional */
186 int debug_map_count; /* optional */
187 void (*dbg_dump)(struct snd_sof_dev *sof_dev,
188 u32 flags); /* optional */
189 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
191 /* host DMA trace initialization */
192 int (*trace_init)(struct snd_sof_dev *sdev,
193 u32 *stream_tag); /* optional */
194 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
195 int (*trace_trigger)(struct snd_sof_dev *sdev,
196 int cmd); /* optional */
198 /* misc */
199 int (*get_bar_index)(struct snd_sof_dev *sdev,
200 u32 type); /* optional */
201 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
202 int (*get_window_offset)(struct snd_sof_dev *sdev,
203 u32 id);/* mandatory for common loader code */
205 /* machine driver ops */
206 int (*machine_register)(struct snd_sof_dev *sdev,
207 void *pdata); /* optional */
208 void (*machine_unregister)(struct snd_sof_dev *sdev,
209 void *pdata); /* optional */
210 void (*machine_select)(struct snd_sof_dev *sdev); /* optional */
211 void (*set_mach_params)(const struct snd_soc_acpi_mach *mach,
212 struct device *dev); /* optional */
214 /* DAI ops */
215 struct snd_soc_dai_driver *drv;
216 int num_drv;
218 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
219 u32 hw_info;
221 const struct sof_arch_ops *arch_ops;
224 /* DSP architecture specific callbacks for oops and stack dumps */
225 struct sof_arch_ops {
226 void (*dsp_oops)(struct snd_sof_dev *sdev, void *oops);
227 void (*dsp_stack)(struct snd_sof_dev *sdev, void *oops,
228 u32 *stack, u32 stack_words);
231 #define sof_arch_ops(sdev) ((sdev)->pdata->desc->ops->arch_ops)
233 /* DSP device HW descriptor mapping between bus ID and ops */
234 struct sof_ops_table {
235 const struct sof_dev_desc *desc;
236 const struct snd_sof_dsp_ops *ops;
239 enum sof_dfsentry_type {
240 SOF_DFSENTRY_TYPE_IOMEM = 0,
241 SOF_DFSENTRY_TYPE_BUF,
244 enum sof_debugfs_access_type {
245 SOF_DEBUGFS_ACCESS_ALWAYS = 0,
246 SOF_DEBUGFS_ACCESS_D0_ONLY,
249 /* FS entry for debug files that can expose DSP memories, registers */
250 struct snd_sof_dfsentry {
251 size_t size;
252 enum sof_dfsentry_type type;
254 * access_type specifies if the
255 * memory -> DSP resource (memory, register etc) is always accessible
256 * or if it is accessible only when the DSP is in D0.
258 enum sof_debugfs_access_type access_type;
259 #if ENABLE_DEBUGFS_CACHEBUF
260 char *cache_buf; /* buffer to cache the contents of debugfs memory */
261 #endif
262 struct snd_sof_dev *sdev;
263 struct list_head list; /* list in sdev dfsentry list */
264 union {
265 void __iomem *io_mem;
266 void *buf;
270 /* Debug mapping for any DSP memory or registers that can used for debug */
271 struct snd_sof_debugfs_map {
272 const char *name;
273 u32 bar;
274 u32 offset;
275 u32 size;
277 * access_type specifies if the memory is always accessible
278 * or if it is accessible only when the DSP is in D0.
280 enum sof_debugfs_access_type access_type;
283 /* mailbox descriptor, used for host <-> DSP IPC */
284 struct snd_sof_mailbox {
285 u32 offset;
286 size_t size;
289 /* IPC message descriptor for host <-> DSP IO */
290 struct snd_sof_ipc_msg {
291 /* message data */
292 u32 header;
293 void *msg_data;
294 void *reply_data;
295 size_t msg_size;
296 size_t reply_size;
297 int reply_error;
299 wait_queue_head_t waitq;
300 bool ipc_complete;
303 enum snd_sof_fw_state {
304 SOF_FW_BOOT_NOT_STARTED = 0,
305 SOF_FW_BOOT_PREPARE,
306 SOF_FW_BOOT_IN_PROGRESS,
307 SOF_FW_BOOT_FAILED,
308 SOF_FW_BOOT_READY_FAILED, /* firmware booted but fw_ready op failed */
309 SOF_FW_BOOT_COMPLETE,
313 * SOF Device Level.
315 struct snd_sof_dev {
316 struct device *dev;
317 spinlock_t ipc_lock; /* lock for IPC users */
318 spinlock_t hw_lock; /* lock for HW IO access */
321 * ASoC components. plat_drv fields are set dynamically so
322 * can't use const
324 struct snd_soc_component_driver plat_drv;
326 /* power states related */
327 enum sof_d0_substate d0_substate;
328 /* flag to track if the intended power target of suspend is S0ix */
329 bool s0_suspend;
331 /* DSP firmware boot */
332 wait_queue_head_t boot_wait;
333 enum snd_sof_fw_state fw_state;
334 u32 first_boot;
336 /* work queue in case the probe is implemented in two steps */
337 struct work_struct probe_work;
339 /* DSP HW differentiation */
340 struct snd_sof_pdata *pdata;
342 /* IPC */
343 struct snd_sof_ipc *ipc;
344 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */
345 struct snd_sof_mailbox host_box; /* Host initiated IPC */
346 struct snd_sof_mailbox stream_box; /* Stream position update */
347 struct snd_sof_ipc_msg *msg;
348 int ipc_irq;
349 u32 next_comp_id; /* monotonic - reset during S3 */
351 /* memory bases for mmaped DSPs - set by dsp_init() */
352 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */
353 int mmio_bar;
354 int mailbox_bar;
355 size_t dsp_oops_offset;
357 /* debug */
358 struct dentry *debugfs_root;
359 struct list_head dfsentry_list;
361 /* firmware loader */
362 struct snd_dma_buffer dmab;
363 struct snd_dma_buffer dmab_bdl;
364 struct sof_ipc_fw_ready fw_ready;
365 struct sof_ipc_fw_version fw_version;
366 struct sof_ipc_cc_version *cc_version;
368 /* topology */
369 struct snd_soc_tplg_ops *tplg_ops;
370 struct list_head pcm_list;
371 struct list_head kcontrol_list;
372 struct list_head widget_list;
373 struct list_head dai_list;
374 struct list_head route_list;
375 struct snd_soc_component *component;
376 u32 enabled_cores_mask; /* keep track of enabled cores */
378 /* FW configuration */
379 struct sof_ipc_dma_buffer_data *info_buffer;
380 struct sof_ipc_window *info_window;
382 /* IPC timeouts in ms */
383 int ipc_timeout;
384 int boot_timeout;
386 /* Wait queue for code loading */
387 wait_queue_head_t waitq;
388 int code_loading;
390 /* DMA for Trace */
391 struct snd_dma_buffer dmatb;
392 struct snd_dma_buffer dmatp;
393 int dma_trace_pages;
394 wait_queue_head_t trace_sleep;
395 u32 host_offset;
396 u32 dtrace_is_supported; /* set with Kconfig or module parameter */
397 u32 dtrace_is_enabled;
398 u32 dtrace_error;
399 u32 dtrace_draining;
401 bool msi_enabled;
403 void *private; /* core does not touch this */
407 * Device Level.
410 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
411 int snd_sof_device_remove(struct device *dev);
413 int snd_sof_runtime_suspend(struct device *dev);
414 int snd_sof_runtime_resume(struct device *dev);
415 int snd_sof_runtime_idle(struct device *dev);
416 int snd_sof_resume(struct device *dev);
417 int snd_sof_suspend(struct device *dev);
418 int snd_sof_prepare(struct device *dev);
419 void snd_sof_complete(struct device *dev);
420 int snd_sof_set_d0_substate(struct snd_sof_dev *sdev,
421 enum sof_d0_substate d0_substate);
423 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
425 int snd_sof_create_page_table(struct device *dev,
426 struct snd_dma_buffer *dmab,
427 unsigned char *page_table, size_t size);
430 * Firmware loading.
432 int snd_sof_load_firmware(struct snd_sof_dev *sdev);
433 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
434 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
435 int snd_sof_run_firmware(struct snd_sof_dev *sdev);
436 int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev,
437 struct snd_sof_mod_hdr *module);
438 void snd_sof_fw_unload(struct snd_sof_dev *sdev);
439 int snd_sof_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 bar, u32 offset);
442 * IPC low level APIs.
444 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
445 void snd_sof_ipc_free(struct snd_sof_dev *sdev);
446 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
447 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev);
448 int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev,
449 struct sof_ipc_pcm_params *params);
450 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox,
451 size_t dspbox_size, u32 hostbox,
452 size_t hostbox_size);
453 int snd_sof_ipc_valid(struct snd_sof_dev *sdev);
454 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
455 void *msg_data, size_t msg_bytes, void *reply_data,
456 size_t reply_bytes);
459 * Trace/debug
461 int snd_sof_init_trace(struct snd_sof_dev *sdev);
462 void snd_sof_release_trace(struct snd_sof_dev *sdev);
463 void snd_sof_free_trace(struct snd_sof_dev *sdev);
464 int snd_sof_dbg_init(struct snd_sof_dev *sdev);
465 void snd_sof_free_debug(struct snd_sof_dev *sdev);
466 int snd_sof_debugfs_io_item(struct snd_sof_dev *sdev,
467 void __iomem *base, size_t size,
468 const char *name,
469 enum sof_debugfs_access_type access_type);
470 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
471 void *base, size_t size,
472 const char *name, mode_t mode);
473 int snd_sof_trace_update_pos(struct snd_sof_dev *sdev,
474 struct sof_ipc_dma_trace_posn *posn);
475 void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev);
476 void snd_sof_get_status(struct snd_sof_dev *sdev, u32 panic_code,
477 u32 tracep_code, void *oops,
478 struct sof_ipc_panic_info *panic_info,
479 void *stack, size_t stack_words);
480 int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev);
481 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev);
484 * Platform specific ops.
486 extern struct snd_compr_ops sof_compressed_ops;
489 * DSP Architectures.
491 static inline void sof_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack,
492 u32 stack_words)
494 sof_arch_ops(sdev)->dsp_stack(sdev, oops, stack, stack_words);
497 static inline void sof_oops(struct snd_sof_dev *sdev, void *oops)
499 if (sof_arch_ops(sdev)->dsp_oops)
500 sof_arch_ops(sdev)->dsp_oops(sdev, oops);
503 extern const struct sof_arch_ops sof_xtensa_arch_ops;
506 * Utilities
508 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
509 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
510 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
511 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
512 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
513 void *message, size_t bytes);
514 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
515 void *message, size_t bytes);
516 void sof_block_write(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *src,
517 size_t size);
518 void sof_block_read(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *dest,
519 size_t size);
521 int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id);
523 void intel_ipc_msg_data(struct snd_sof_dev *sdev,
524 struct snd_pcm_substream *substream,
525 void *p, size_t sz);
526 int intel_ipc_pcm_params(struct snd_sof_dev *sdev,
527 struct snd_pcm_substream *substream,
528 const struct sof_ipc_pcm_params_reply *reply);
530 int intel_pcm_open(struct snd_sof_dev *sdev,
531 struct snd_pcm_substream *substream);
532 int intel_pcm_close(struct snd_sof_dev *sdev,
533 struct snd_pcm_substream *substream);
535 int sof_machine_check(struct snd_sof_dev *sdev);
537 #endif