2 "masking, test out of bounds 1",
4 BPF_MOV32_IMM(BPF_REG_1
, 5),
5 BPF_MOV32_IMM(BPF_REG_2
, 5 - 1),
6 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
7 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
8 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
9 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
10 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
11 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
18 "masking, test out of bounds 2",
20 BPF_MOV32_IMM(BPF_REG_1
, 1),
21 BPF_MOV32_IMM(BPF_REG_2
, 1 - 1),
22 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
23 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
24 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
25 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
26 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
27 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
34 "masking, test out of bounds 3",
36 BPF_MOV32_IMM(BPF_REG_1
, 0xffffffff),
37 BPF_MOV32_IMM(BPF_REG_2
, 0xffffffff - 1),
38 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
39 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
40 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
41 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
42 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
43 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
50 "masking, test out of bounds 4",
52 BPF_MOV32_IMM(BPF_REG_1
, 0xffffffff),
53 BPF_MOV32_IMM(BPF_REG_2
, 1 - 1),
54 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
55 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
56 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
57 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
58 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
59 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
66 "masking, test out of bounds 5",
68 BPF_MOV32_IMM(BPF_REG_1
, -1),
69 BPF_MOV32_IMM(BPF_REG_2
, 1 - 1),
70 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
71 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
72 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
73 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
74 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
75 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
82 "masking, test out of bounds 6",
84 BPF_MOV32_IMM(BPF_REG_1
, -1),
85 BPF_MOV32_IMM(BPF_REG_2
, 0xffffffff - 1),
86 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
87 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
88 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
89 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
90 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
91 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
98 "masking, test out of bounds 7",
100 BPF_MOV64_IMM(BPF_REG_1
, 5),
101 BPF_MOV32_IMM(BPF_REG_2
, 5 - 1),
102 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
103 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
104 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
105 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
106 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
107 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
114 "masking, test out of bounds 8",
116 BPF_MOV64_IMM(BPF_REG_1
, 1),
117 BPF_MOV32_IMM(BPF_REG_2
, 1 - 1),
118 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
119 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
120 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
121 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
122 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
123 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
130 "masking, test out of bounds 9",
132 BPF_MOV64_IMM(BPF_REG_1
, 0xffffffff),
133 BPF_MOV32_IMM(BPF_REG_2
, 0xffffffff - 1),
134 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
135 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
136 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
137 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
138 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
139 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
146 "masking, test out of bounds 10",
148 BPF_MOV64_IMM(BPF_REG_1
, 0xffffffff),
149 BPF_MOV32_IMM(BPF_REG_2
, 1 - 1),
150 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
151 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
152 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
153 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
154 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
155 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
162 "masking, test out of bounds 11",
164 BPF_MOV64_IMM(BPF_REG_1
, -1),
165 BPF_MOV32_IMM(BPF_REG_2
, 1 - 1),
166 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
167 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
168 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
169 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
170 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
171 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
178 "masking, test out of bounds 12",
180 BPF_MOV64_IMM(BPF_REG_1
, -1),
181 BPF_MOV32_IMM(BPF_REG_2
, 0xffffffff - 1),
182 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
183 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
184 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
185 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
186 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
187 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
194 "masking, test in bounds 1",
196 BPF_MOV32_IMM(BPF_REG_1
, 4),
197 BPF_MOV32_IMM(BPF_REG_2
, 5 - 1),
198 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
199 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
200 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
201 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
202 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
203 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
210 "masking, test in bounds 2",
212 BPF_MOV32_IMM(BPF_REG_1
, 0),
213 BPF_MOV32_IMM(BPF_REG_2
, 0xffffffff - 1),
214 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
215 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
216 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
217 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
218 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
219 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
226 "masking, test in bounds 3",
228 BPF_MOV32_IMM(BPF_REG_1
, 0xfffffffe),
229 BPF_MOV32_IMM(BPF_REG_2
, 0xffffffff - 1),
230 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
231 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
232 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
233 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
234 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
235 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
239 .retval
= 0xfffffffe,
242 "masking, test in bounds 4",
244 BPF_MOV32_IMM(BPF_REG_1
, 0xabcde),
245 BPF_MOV32_IMM(BPF_REG_2
, 0xabcdef - 1),
246 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
247 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
248 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
249 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
250 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
251 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
258 "masking, test in bounds 5",
260 BPF_MOV32_IMM(BPF_REG_1
, 0),
261 BPF_MOV32_IMM(BPF_REG_2
, 1 - 1),
262 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
263 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
264 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
265 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
266 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
267 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
274 "masking, test in bounds 6",
276 BPF_MOV32_IMM(BPF_REG_1
, 46),
277 BPF_MOV32_IMM(BPF_REG_2
, 47 - 1),
278 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_1
),
279 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_1
),
280 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
281 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
282 BPF_ALU64_REG(BPF_AND
, BPF_REG_1
, BPF_REG_2
),
283 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_1
),
290 "masking, test in bounds 7",
292 BPF_MOV64_IMM(BPF_REG_3
, -46),
293 BPF_ALU64_IMM(BPF_MUL
, BPF_REG_3
, -1),
294 BPF_MOV32_IMM(BPF_REG_2
, 47 - 1),
295 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_3
),
296 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_3
),
297 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
298 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
299 BPF_ALU64_REG(BPF_AND
, BPF_REG_3
, BPF_REG_2
),
300 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_3
),
307 "masking, test in bounds 8",
309 BPF_MOV64_IMM(BPF_REG_3
, -47),
310 BPF_ALU64_IMM(BPF_MUL
, BPF_REG_3
, -1),
311 BPF_MOV32_IMM(BPF_REG_2
, 47 - 1),
312 BPF_ALU64_REG(BPF_SUB
, BPF_REG_2
, BPF_REG_3
),
313 BPF_ALU64_REG(BPF_OR
, BPF_REG_2
, BPF_REG_3
),
314 BPF_ALU64_IMM(BPF_NEG
, BPF_REG_2
, 0),
315 BPF_ALU64_IMM(BPF_ARSH
, BPF_REG_2
, 63),
316 BPF_ALU64_REG(BPF_AND
, BPF_REG_3
, BPF_REG_2
),
317 BPF_MOV64_REG(BPF_REG_0
, BPF_REG_3
),