1 /* SPDX-License-Identifier: GPL-2.0 */
5 #define barrier() __asm__ __volatile__("" : : : "memory")
8 #define smp_mb() __sync_synchronize()
9 #define smp_mb__after_unlock_lock() __sync_synchronize()
12 * Copied from CBMC's implementation of __sync_synchronize(), which
13 * seems to be disabled by default.
15 #define smp_mb() __CPROVER_fence("WWfence", "RRfence", "RWfence", "WRfence", \
16 "WWcumul", "RRcumul", "RWcumul", "WRcumul")
17 #define smp_mb__after_unlock_lock() __CPROVER_fence("WWfence", "RRfence", "RWfence", "WRfence", \
18 "WWcumul", "RRcumul", "RWcumul", "WRcumul")
22 * Allow memory barriers to be disabled in either the read or write side
23 * of SRCU individually.
26 #ifndef NO_SYNC_SMP_MB
27 #define sync_smp_mb() smp_mb()
29 #define sync_smp_mb() do {} while (0)
32 #ifndef NO_READ_SIDE_SMP_MB
33 #define rs_smp_mb() smp_mb()
35 #define rs_smp_mb() do {} while (0)
38 #define READ_ONCE(x) (*(volatile typeof(x) *) &(x))
39 #define WRITE_ONCE(x) ((*(volatile typeof(x) *) &(x)) = (val))