2 * arch/alpha/kernel/traps.c
4 * (C) Copyright 1994 Linus Torvalds
8 * This file initializes the trap entry points
11 #include <linux/jiffies.h>
13 #include <linux/sched.h>
14 #include <linux/tty.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/kallsyms.h>
19 #include <linux/ratelimit.h>
21 #include <asm/gentrap.h>
22 #include <asm/uaccess.h>
23 #include <asm/unaligned.h>
24 #include <asm/sysinfo.h>
25 #include <asm/hwrpb.h>
26 #include <asm/mmu_context.h>
27 #include <asm/special_insns.h>
31 /* Work-around for some SRMs which mishandle opDEC faults. */
38 __asm__
__volatile__ (
39 /* Load the address of... */
41 /* A stub instruction fault handler. Just add 4 to the
47 /* Install the instruction fault handler. */
49 " call_pal %[wrent]\n"
50 /* With that in place, the fault from the round-to-minf fp
51 insn will arrive either at the "lda 4" insn (bad) or one
52 past that (good). This places the correct fixup in %0. */
54 " cvttq/svm $f31,$f31\n"
56 : [fix
] "=r" (opDEC_fix
)
57 : [rti
] "n" (PAL_rti
), [wrent
] "n" (PAL_wrent
)
58 : "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25");
61 printk("opDEC fixup enabled.\n");
65 dik_show_regs(struct pt_regs
*regs
, unsigned long *r9_15
)
67 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n",
68 regs
->pc
, regs
->r26
, regs
->ps
, print_tainted());
69 printk("pc is at %pSR\n", (void *)regs
->pc
);
70 printk("ra is at %pSR\n", (void *)regs
->r26
);
71 printk("v0 = %016lx t0 = %016lx t1 = %016lx\n",
72 regs
->r0
, regs
->r1
, regs
->r2
);
73 printk("t2 = %016lx t3 = %016lx t4 = %016lx\n",
74 regs
->r3
, regs
->r4
, regs
->r5
);
75 printk("t5 = %016lx t6 = %016lx t7 = %016lx\n",
76 regs
->r6
, regs
->r7
, regs
->r8
);
79 printk("s0 = %016lx s1 = %016lx s2 = %016lx\n",
80 r9_15
[9], r9_15
[10], r9_15
[11]);
81 printk("s3 = %016lx s4 = %016lx s5 = %016lx\n",
82 r9_15
[12], r9_15
[13], r9_15
[14]);
83 printk("s6 = %016lx\n", r9_15
[15]);
86 printk("a0 = %016lx a1 = %016lx a2 = %016lx\n",
87 regs
->r16
, regs
->r17
, regs
->r18
);
88 printk("a3 = %016lx a4 = %016lx a5 = %016lx\n",
89 regs
->r19
, regs
->r20
, regs
->r21
);
90 printk("t8 = %016lx t9 = %016lx t10= %016lx\n",
91 regs
->r22
, regs
->r23
, regs
->r24
);
92 printk("t11= %016lx pv = %016lx at = %016lx\n",
93 regs
->r25
, regs
->r27
, regs
->r28
);
94 printk("gp = %016lx sp = %p\n", regs
->gp
, regs
+1);
101 static char * ireg_name
[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
102 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6",
103 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
104 "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"};
108 dik_show_code(unsigned int *pc
)
113 for (i
= -6; i
< 2; i
++) {
115 if (__get_user(insn
, (unsigned int __user
*)pc
+ i
))
117 printk("%c%08x%c", i
? ' ' : '<', insn
, i
? ' ' : '>');
123 dik_show_trace(unsigned long *sp
)
127 while (0x1ff8 & (unsigned long) sp
) {
128 extern char _stext
[], _etext
[];
129 unsigned long tmp
= *sp
;
131 if (tmp
< (unsigned long) &_stext
)
133 if (tmp
>= (unsigned long) &_etext
)
135 printk("[<%lx>] %pSR\n", tmp
, (void *)tmp
);
144 static int kstack_depth_to_print
= 24;
146 void show_stack(struct task_struct
*task
, unsigned long *sp
)
148 unsigned long *stack
;
152 * debugging aid: "show_stack(NULL);" prints the
153 * back trace for this cpu.
156 sp
=(unsigned long*)&sp
;
159 for(i
=0; i
< kstack_depth_to_print
; i
++) {
160 if (((long) stack
& (THREAD_SIZE
-1)) == 0)
162 if (i
&& ((i
% 4) == 0))
164 printk("%016lx ", *stack
++);
171 die_if_kernel(char * str
, struct pt_regs
*regs
, long err
, unsigned long *r9_15
)
176 printk("CPU %d ", hard_smp_processor_id());
178 printk("%s(%d): %s %ld\n", current
->comm
, task_pid_nr(current
), str
, err
);
179 dik_show_regs(regs
, r9_15
);
180 add_taint(TAINT_DIE
, LOCKDEP_NOW_UNRELIABLE
);
181 dik_show_trace((unsigned long *)(regs
+1));
182 dik_show_code((unsigned int *)regs
->pc
);
184 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL
)) {
185 printk("die_if_kernel recursion detected.\n");
192 #ifndef CONFIG_MATHEMU
193 static long dummy_emul(void) { return 0; }
194 long (*alpha_fp_emul_imprecise
)(struct pt_regs
*regs
, unsigned long writemask
)
195 = (void *)dummy_emul
;
196 long (*alpha_fp_emul
) (unsigned long pc
)
197 = (void *)dummy_emul
;
199 long alpha_fp_emul_imprecise(struct pt_regs
*regs
, unsigned long writemask
);
200 long alpha_fp_emul (unsigned long pc
);
204 do_entArith(unsigned long summary
, unsigned long write_mask
,
205 struct pt_regs
*regs
)
207 long si_code
= FPE_FLTINV
;
211 /* Software-completion summary bit is set, so try to
212 emulate the instruction. If the processor supports
213 precise exceptions, we don't have to search. */
214 if (!amask(AMASK_PRECISE_TRAP
))
215 si_code
= alpha_fp_emul(regs
->pc
- 4);
217 si_code
= alpha_fp_emul_imprecise(regs
, write_mask
);
221 die_if_kernel("Arithmetic fault", regs
, 0, NULL
);
223 info
.si_signo
= SIGFPE
;
225 info
.si_code
= si_code
;
226 info
.si_addr
= (void __user
*) regs
->pc
;
227 send_sig_info(SIGFPE
, &info
, current
);
231 do_entIF(unsigned long type
, struct pt_regs
*regs
)
236 if ((regs
->ps
& ~IPL_MAX
) == 0) {
238 const unsigned int *data
239 = (const unsigned int *) regs
->pc
;
240 printk("Kernel bug at %s:%d\n",
241 (const char *)(data
[1] | (long)data
[2] << 32),
244 die_if_kernel((type
== 1 ? "Kernel Bug" : "Instruction fault"),
249 case 0: /* breakpoint */
250 info
.si_signo
= SIGTRAP
;
252 info
.si_code
= TRAP_BRKPT
;
254 info
.si_addr
= (void __user
*) regs
->pc
;
256 if (ptrace_cancel_bpt(current
)) {
257 regs
->pc
-= 4; /* make pc point to former bpt */
260 send_sig_info(SIGTRAP
, &info
, current
);
263 case 1: /* bugcheck */
264 info
.si_signo
= SIGTRAP
;
266 info
.si_code
= __SI_FAULT
;
267 info
.si_addr
= (void __user
*) regs
->pc
;
269 send_sig_info(SIGTRAP
, &info
, current
);
272 case 2: /* gentrap */
273 info
.si_addr
= (void __user
*) regs
->pc
;
274 info
.si_trapno
= regs
->r16
;
275 switch ((long) regs
->r16
) {
332 info
.si_signo
= signo
;
335 info
.si_addr
= (void __user
*) regs
->pc
;
336 send_sig_info(signo
, &info
, current
);
340 if (implver() == IMPLVER_EV4
) {
343 /* The some versions of SRM do not handle
344 the opDEC properly - they return the PC of the
345 opDEC fault, not the instruction after as the
346 Alpha architecture requires. Here we fix it up.
347 We do this by intentionally causing an opDEC
348 fault during the boot sequence and testing if
349 we get the correct PC. If not, we set a flag
350 to correct it every time through. */
351 regs
->pc
+= opDEC_fix
;
353 /* EV4 does not implement anything except normal
354 rounding. Everything else will come here as
355 an illegal instruction. Emulate them. */
356 si_code
= alpha_fp_emul(regs
->pc
- 4);
360 info
.si_signo
= SIGFPE
;
362 info
.si_code
= si_code
;
363 info
.si_addr
= (void __user
*) regs
->pc
;
364 send_sig_info(SIGFPE
, &info
, current
);
370 case 3: /* FEN fault */
371 /* Irritating users can call PAL_clrfen to disable the
372 FPU for the process. The kernel will then trap in
373 do_switch_stack and undo_switch_stack when we try
374 to save and restore the FP registers.
376 Given that GCC by default generates code that uses the
377 FP registers, PAL_clrfen is not useful except for DoS
378 attacks. So turn the bleeding FPU back on and be done
380 current_thread_info()->pcb
.flags
|= 1;
381 __reload_thread(¤t_thread_info()->pcb
);
385 default: /* unexpected instruction-fault type */
389 info
.si_signo
= SIGILL
;
391 info
.si_code
= ILL_ILLOPC
;
392 info
.si_addr
= (void __user
*) regs
->pc
;
393 send_sig_info(SIGILL
, &info
, current
);
396 /* There is an ifdef in the PALcode in MILO that enables a
397 "kernel debugging entry point" as an unprivileged call_pal.
399 We don't want to have anything to do with it, but unfortunately
400 several versions of MILO included in distributions have it enabled,
401 and if we don't put something on the entry point we'll oops. */
404 do_entDbg(struct pt_regs
*regs
)
408 die_if_kernel("Instruction fault", regs
, 0, NULL
);
410 info
.si_signo
= SIGILL
;
412 info
.si_code
= ILL_ILLOPC
;
413 info
.si_addr
= (void __user
*) regs
->pc
;
414 force_sig_info(SIGILL
, &info
, current
);
419 * entUna has a different register layout to be reasonably simple. It
420 * needs access to all the integer registers (the kernel doesn't use
421 * fp-regs), and it needs to have them in order for simpler access.
423 * Due to the non-standard register layout (and because we don't want
424 * to handle floating-point regs), user-mode unaligned accesses are
425 * handled separately by do_entUnaUser below.
427 * Oh, btw, we don't handle the "gp" register correctly, but if we fault
428 * on a gp-register unaligned load/store, something is _very_ wrong
429 * in the kernel anyway..
432 unsigned long regs
[32];
433 unsigned long ps
, pc
, gp
, a0
, a1
, a2
;
436 struct unaligned_stat
{
437 unsigned long count
, va
, pc
;
441 /* Macro for exception fixup code to access integer registers. */
442 #define una_reg(r) (_regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
446 do_entUna(void * va
, unsigned long opcode
, unsigned long reg
,
447 struct allregs
*regs
)
449 long error
, tmp1
, tmp2
, tmp3
, tmp4
;
450 unsigned long pc
= regs
->pc
- 4;
451 unsigned long *_regs
= regs
->regs
;
452 const struct exception_table_entry
*fixup
;
454 unaligned
[0].count
++;
455 unaligned
[0].va
= (unsigned long) va
;
456 unaligned
[0].pc
= pc
;
458 /* We don't want to use the generic get/put unaligned macros as
459 we want to trap exceptions. Only if we actually get an
460 exception will we decide whether we should have caught it. */
463 case 0x0c: /* ldwu */
464 __asm__
__volatile__(
465 "1: ldq_u %1,0(%3)\n"
466 "2: ldq_u %2,1(%3)\n"
470 ".section __ex_table,\"a\"\n"
472 " lda %1,3b-1b(%0)\n"
474 " lda %2,3b-2b(%0)\n"
476 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
480 una_reg(reg
) = tmp1
|tmp2
;
484 __asm__
__volatile__(
485 "1: ldq_u %1,0(%3)\n"
486 "2: ldq_u %2,3(%3)\n"
490 ".section __ex_table,\"a\"\n"
492 " lda %1,3b-1b(%0)\n"
494 " lda %2,3b-2b(%0)\n"
496 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
500 una_reg(reg
) = (int)(tmp1
|tmp2
);
504 __asm__
__volatile__(
505 "1: ldq_u %1,0(%3)\n"
506 "2: ldq_u %2,7(%3)\n"
510 ".section __ex_table,\"a\"\n"
512 " lda %1,3b-1b(%0)\n"
514 " lda %2,3b-2b(%0)\n"
516 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
520 una_reg(reg
) = tmp1
|tmp2
;
523 /* Note that the store sequences do not indicate that they change
524 memory because it _should_ be affecting nothing in this context.
525 (Otherwise we have other, much larger, problems.) */
527 __asm__
__volatile__(
528 "1: ldq_u %2,1(%5)\n"
529 "2: ldq_u %1,0(%5)\n"
536 "3: stq_u %2,1(%5)\n"
537 "4: stq_u %1,0(%5)\n"
539 ".section __ex_table,\"a\"\n"
541 " lda %2,5b-1b(%0)\n"
543 " lda %1,5b-2b(%0)\n"
545 " lda $31,5b-3b(%0)\n"
547 " lda $31,5b-4b(%0)\n"
549 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
550 "=&r"(tmp3
), "=&r"(tmp4
)
551 : "r"(va
), "r"(una_reg(reg
)), "0"(0));
557 __asm__
__volatile__(
558 "1: ldq_u %2,3(%5)\n"
559 "2: ldq_u %1,0(%5)\n"
566 "3: stq_u %2,3(%5)\n"
567 "4: stq_u %1,0(%5)\n"
569 ".section __ex_table,\"a\"\n"
571 " lda %2,5b-1b(%0)\n"
573 " lda %1,5b-2b(%0)\n"
575 " lda $31,5b-3b(%0)\n"
577 " lda $31,5b-4b(%0)\n"
579 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
580 "=&r"(tmp3
), "=&r"(tmp4
)
581 : "r"(va
), "r"(una_reg(reg
)), "0"(0));
587 __asm__
__volatile__(
588 "1: ldq_u %2,7(%5)\n"
589 "2: ldq_u %1,0(%5)\n"
596 "3: stq_u %2,7(%5)\n"
597 "4: stq_u %1,0(%5)\n"
599 ".section __ex_table,\"a\"\n\t"
601 " lda %2,5b-1b(%0)\n"
603 " lda %1,5b-2b(%0)\n"
605 " lda $31,5b-3b(%0)\n"
607 " lda $31,5b-4b(%0)\n"
609 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
610 "=&r"(tmp3
), "=&r"(tmp4
)
611 : "r"(va
), "r"(una_reg(reg
)), "0"(0));
617 printk("Bad unaligned kernel access at %016lx: %p %lx %lu\n",
618 pc
, va
, opcode
, reg
);
622 /* Ok, we caught the exception, but we don't want it. Is there
623 someone to pass it along to? */
624 if ((fixup
= search_exception_tables(pc
)) != 0) {
626 newpc
= fixup_exception(una_reg
, fixup
, pc
);
628 printk("Forwarding unaligned exception at %lx (%lx)\n",
636 * Yikes! No one to forward the exception to.
637 * Since the registers are in a weird format, dump them ourselves.
640 printk("%s(%d): unhandled unaligned exception\n",
641 current
->comm
, task_pid_nr(current
));
643 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n",
644 pc
, una_reg(26), regs
->ps
);
645 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n",
646 una_reg(0), una_reg(1), una_reg(2));
647 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n",
648 una_reg(3), una_reg(4), una_reg(5));
649 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n",
650 una_reg(6), una_reg(7), una_reg(8));
651 printk("r9 = %016lx r10= %016lx r11= %016lx\n",
652 una_reg(9), una_reg(10), una_reg(11));
653 printk("r12= %016lx r13= %016lx r14= %016lx\n",
654 una_reg(12), una_reg(13), una_reg(14));
655 printk("r15= %016lx\n", una_reg(15));
656 printk("r16= %016lx r17= %016lx r18= %016lx\n",
657 una_reg(16), una_reg(17), una_reg(18));
658 printk("r19= %016lx r20= %016lx r21= %016lx\n",
659 una_reg(19), una_reg(20), una_reg(21));
660 printk("r22= %016lx r23= %016lx r24= %016lx\n",
661 una_reg(22), una_reg(23), una_reg(24));
662 printk("r25= %016lx r27= %016lx r28= %016lx\n",
663 una_reg(25), una_reg(27), una_reg(28));
664 printk("gp = %016lx sp = %p\n", regs
->gp
, regs
+1);
666 dik_show_code((unsigned int *)pc
);
667 dik_show_trace((unsigned long *)(regs
+1));
669 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL
)) {
670 printk("die_if_kernel recursion detected.\n");
678 * Convert an s-floating point value in memory format to the
679 * corresponding value in register format. The exponent
680 * needs to be remapped to preserve non-finite values
681 * (infinities, not-a-numbers, denormals).
683 static inline unsigned long
684 s_mem_to_reg (unsigned long s_mem
)
686 unsigned long frac
= (s_mem
>> 0) & 0x7fffff;
687 unsigned long sign
= (s_mem
>> 31) & 0x1;
688 unsigned long exp_msb
= (s_mem
>> 30) & 0x1;
689 unsigned long exp_low
= (s_mem
>> 23) & 0x7f;
692 exp
= (exp_msb
<< 10) | exp_low
; /* common case */
694 if (exp_low
== 0x7f) {
698 if (exp_low
== 0x00) {
704 return (sign
<< 63) | (exp
<< 52) | (frac
<< 29);
708 * Convert an s-floating point value in register format to the
709 * corresponding value in memory format.
711 static inline unsigned long
712 s_reg_to_mem (unsigned long s_reg
)
714 return ((s_reg
>> 62) << 30) | ((s_reg
<< 5) >> 34);
718 * Handle user-level unaligned fault. Handling user-level unaligned
719 * faults is *extremely* slow and produces nasty messages. A user
720 * program *should* fix unaligned faults ASAP.
722 * Notice that we have (almost) the regular kernel stack layout here,
723 * so finding the appropriate registers is a little more difficult
724 * than in the kernel case.
726 * Finally, we handle regular integer load/stores only. In
727 * particular, load-linked/store-conditionally and floating point
728 * load/stores are not supported. The former make no sense with
729 * unaligned faults (they are guaranteed to fail) and I don't think
730 * the latter will occur in any decent program.
732 * Sigh. We *do* have to handle some FP operations, because GCC will
733 * uses them as temporary storage for integer memory to memory copies.
734 * However, we need to deal with stt/ldt and sts/lds only.
737 #define OP_INT_MASK ( 1L << 0x28 | 1L << 0x2c /* ldl stl */ \
738 | 1L << 0x29 | 1L << 0x2d /* ldq stq */ \
739 | 1L << 0x0c | 1L << 0x0d /* ldwu stw */ \
740 | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */
742 #define OP_WRITE_MASK ( 1L << 0x26 | 1L << 0x27 /* sts stt */ \
743 | 1L << 0x2c | 1L << 0x2d /* stl stq */ \
744 | 1L << 0x0d | 1L << 0x0e ) /* stw stb */
746 #define R(x) ((size_t) &((struct pt_regs *)0)->x)
748 static int unauser_reg_offsets
[32] = {
749 R(r0
), R(r1
), R(r2
), R(r3
), R(r4
), R(r5
), R(r6
), R(r7
), R(r8
),
750 /* r9 ... r15 are stored in front of regs. */
751 -56, -48, -40, -32, -24, -16, -8,
752 R(r16
), R(r17
), R(r18
),
753 R(r19
), R(r20
), R(r21
), R(r22
), R(r23
), R(r24
), R(r25
), R(r26
),
754 R(r27
), R(r28
), R(gp
),
761 do_entUnaUser(void __user
* va
, unsigned long opcode
,
762 unsigned long reg
, struct pt_regs
*regs
)
764 static DEFINE_RATELIMIT_STATE(ratelimit
, 5 * HZ
, 5);
766 unsigned long tmp1
, tmp2
, tmp3
, tmp4
;
767 unsigned long fake_reg
, *reg_addr
= &fake_reg
;
771 /* Check the UAC bits to decide what the user wants us to do
772 with the unaliged access. */
774 if (!(current_thread_info()->status
& TS_UAC_NOPRINT
)) {
775 if (__ratelimit(&ratelimit
)) {
776 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
777 current
->comm
, task_pid_nr(current
),
778 regs
->pc
- 4, va
, opcode
, reg
);
781 if ((current_thread_info()->status
& TS_UAC_SIGBUS
))
783 /* Not sure why you'd want to use this, but... */
784 if ((current_thread_info()->status
& TS_UAC_NOFIX
))
787 /* Don't bother reading ds in the access check since we already
788 know that this came from the user. Also rely on the fact that
789 the page at TASK_SIZE is unmapped and so can't be touched anyway. */
790 if (!__access_ok((unsigned long)va
, 0, USER_DS
))
793 ++unaligned
[1].count
;
794 unaligned
[1].va
= (unsigned long)va
;
795 unaligned
[1].pc
= regs
->pc
- 4;
797 if ((1L << opcode
) & OP_INT_MASK
) {
798 /* it's an integer load/store */
800 reg_addr
= (unsigned long *)
801 ((char *)regs
+ unauser_reg_offsets
[reg
]);
802 } else if (reg
== 30) {
803 /* usp in PAL regs */
806 /* zero "register" */
811 /* We don't want to use the generic get/put unaligned macros as
812 we want to trap exceptions. Only if we actually get an
813 exception will we decide whether we should have caught it. */
816 case 0x0c: /* ldwu */
817 __asm__
__volatile__(
818 "1: ldq_u %1,0(%3)\n"
819 "2: ldq_u %2,1(%3)\n"
823 ".section __ex_table,\"a\"\n"
825 " lda %1,3b-1b(%0)\n"
827 " lda %2,3b-2b(%0)\n"
829 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
833 *reg_addr
= tmp1
|tmp2
;
837 __asm__
__volatile__(
838 "1: ldq_u %1,0(%3)\n"
839 "2: ldq_u %2,3(%3)\n"
843 ".section __ex_table,\"a\"\n"
845 " lda %1,3b-1b(%0)\n"
847 " lda %2,3b-2b(%0)\n"
849 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
853 alpha_write_fp_reg(reg
, s_mem_to_reg((int)(tmp1
|tmp2
)));
857 __asm__
__volatile__(
858 "1: ldq_u %1,0(%3)\n"
859 "2: ldq_u %2,7(%3)\n"
863 ".section __ex_table,\"a\"\n"
865 " lda %1,3b-1b(%0)\n"
867 " lda %2,3b-2b(%0)\n"
869 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
873 alpha_write_fp_reg(reg
, tmp1
|tmp2
);
877 __asm__
__volatile__(
878 "1: ldq_u %1,0(%3)\n"
879 "2: ldq_u %2,3(%3)\n"
883 ".section __ex_table,\"a\"\n"
885 " lda %1,3b-1b(%0)\n"
887 " lda %2,3b-2b(%0)\n"
889 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
893 *reg_addr
= (int)(tmp1
|tmp2
);
897 __asm__
__volatile__(
898 "1: ldq_u %1,0(%3)\n"
899 "2: ldq_u %2,7(%3)\n"
903 ".section __ex_table,\"a\"\n"
905 " lda %1,3b-1b(%0)\n"
907 " lda %2,3b-2b(%0)\n"
909 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
913 *reg_addr
= tmp1
|tmp2
;
916 /* Note that the store sequences do not indicate that they change
917 memory because it _should_ be affecting nothing in this context.
918 (Otherwise we have other, much larger, problems.) */
920 __asm__
__volatile__(
921 "1: ldq_u %2,1(%5)\n"
922 "2: ldq_u %1,0(%5)\n"
929 "3: stq_u %2,1(%5)\n"
930 "4: stq_u %1,0(%5)\n"
932 ".section __ex_table,\"a\"\n"
934 " lda %2,5b-1b(%0)\n"
936 " lda %1,5b-2b(%0)\n"
938 " lda $31,5b-3b(%0)\n"
940 " lda $31,5b-4b(%0)\n"
942 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
943 "=&r"(tmp3
), "=&r"(tmp4
)
944 : "r"(va
), "r"(*reg_addr
), "0"(0));
950 fake_reg
= s_reg_to_mem(alpha_read_fp_reg(reg
));
954 __asm__
__volatile__(
955 "1: ldq_u %2,3(%5)\n"
956 "2: ldq_u %1,0(%5)\n"
963 "3: stq_u %2,3(%5)\n"
964 "4: stq_u %1,0(%5)\n"
966 ".section __ex_table,\"a\"\n"
968 " lda %2,5b-1b(%0)\n"
970 " lda %1,5b-2b(%0)\n"
972 " lda $31,5b-3b(%0)\n"
974 " lda $31,5b-4b(%0)\n"
976 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
977 "=&r"(tmp3
), "=&r"(tmp4
)
978 : "r"(va
), "r"(*reg_addr
), "0"(0));
984 fake_reg
= alpha_read_fp_reg(reg
);
988 __asm__
__volatile__(
989 "1: ldq_u %2,7(%5)\n"
990 "2: ldq_u %1,0(%5)\n"
997 "3: stq_u %2,7(%5)\n"
998 "4: stq_u %1,0(%5)\n"
1000 ".section __ex_table,\"a\"\n\t"
1002 " lda %2,5b-1b(%0)\n"
1004 " lda %1,5b-2b(%0)\n"
1006 " lda $31,5b-3b(%0)\n"
1008 " lda $31,5b-4b(%0)\n"
1010 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
1011 "=&r"(tmp3
), "=&r"(tmp4
)
1012 : "r"(va
), "r"(*reg_addr
), "0"(0));
1018 /* What instruction were you trying to use, exactly? */
1022 /* Only integer loads should get here; everyone else returns early. */
1028 regs
->pc
-= 4; /* make pc point to faulting insn */
1029 info
.si_signo
= SIGSEGV
;
1032 /* We need to replicate some of the logic in mm/fault.c,
1033 since we don't have access to the fault code in the
1034 exception handling return path. */
1035 if (!__access_ok((unsigned long)va
, 0, USER_DS
))
1036 info
.si_code
= SEGV_ACCERR
;
1038 struct mm_struct
*mm
= current
->mm
;
1039 down_read(&mm
->mmap_sem
);
1040 if (find_vma(mm
, (unsigned long)va
))
1041 info
.si_code
= SEGV_ACCERR
;
1043 info
.si_code
= SEGV_MAPERR
;
1044 up_read(&mm
->mmap_sem
);
1047 send_sig_info(SIGSEGV
, &info
, current
);
1052 info
.si_signo
= SIGBUS
;
1054 info
.si_code
= BUS_ADRALN
;
1056 send_sig_info(SIGBUS
, &info
, current
);
1063 /* Tell PAL-code what global pointer we want in the kernel. */
1064 register unsigned long gptr
__asm__("$29");
1067 /* Hack for Multia (UDB) and JENSEN: some of their SRMs have
1068 a bug in the handling of the opDEC fault. Fix it up if so. */
1069 if (implver() == IMPLVER_EV4
)