arch/arm/boot/dts/ecx-common.dtsi

   1 /*
   2  * Copyright 2011-2012 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16
  17 / {
  18         chosen {
  19                 bootargs = "console=ttyAMA0";
  20         };
  21
  22         soc {
  23                 #address-cells = <1>;
  24                 #size-cells = <1>;
  25                 compatible = "simple-bus";
  26                 interrupt-parent = <&intc>;
  27
  28                 sata@ffe08000 {
  29                         compatible = "calxeda,hb-ahci";
  30                         reg = <0xffe08000 0x10000>;
  31                         interrupts = <0 83 4>;
  32                         dma-coherent;
  33                         calxeda,port-phys = <&combophy5 0 &combophy0 0
  34                                              &combophy0 1 &combophy0 2
  35                                              &combophy0 3>;
  36                         calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
  37                         calxeda,led-order = <4 0 1 2 3>;
  38                 };
  39
  40                 sdhci@ffe0e000 {
  41                         compatible = "calxeda,hb-sdhci";
  42                         reg = <0xffe0e000 0x1000>;
  43                         interrupts = <0 90 4>;
  44                         clocks = <&eclk>;
  45                         status = "disabled";
  46                 };
  47
  48                 memory-controller@fff00000 {
  49                         compatible = "calxeda,hb-ddr-ctrl";
  50                         reg = <0xfff00000 0x1000>;
  51                         interrupts = <0 91 4>;
  52                 };
  53
  54                 ipc@fff20000 {
  55                         compatible = "arm,pl320", "arm,primecell";
  56                         reg = <0xfff20000 0x1000>;
  57                         interrupts = <0 7 4>;
  58                         clocks = <&pclk>;
  59                         clock-names = "apb_pclk";
  60                 };
  61
  62                 gpioe: gpio@fff30000 {
  63                         #gpio-cells = <2>;
  64                         compatible = "arm,pl061", "arm,primecell";
  65                         gpio-controller;
  66                         reg = <0xfff30000 0x1000>;
  67                         interrupts = <0 14 4>;
  68                         clocks = <&pclk>;
  69                         clock-names = "apb_pclk";
  70                         status = "disabled";
  71                 };
  72
  73                 gpiof: gpio@fff31000 {
  74                         #gpio-cells = <2>;
  75                         compatible = "arm,pl061", "arm,primecell";
  76                         gpio-controller;
  77                         reg = <0xfff31000 0x1000>;
  78                         interrupts = <0 15 4>;
  79                         clocks = <&pclk>;
  80                         clock-names = "apb_pclk";
  81                         status = "disabled";
  82                 };
  83
  84                 gpiog: gpio@fff32000 {
  85                         #gpio-cells = <2>;
  86                         compatible = "arm,pl061", "arm,primecell";
  87                         gpio-controller;
  88                         reg = <0xfff32000 0x1000>;
  89                         interrupts = <0 16 4>;
  90                         clocks = <&pclk>;
  91                         clock-names = "apb_pclk";
  92                         status = "disabled";
  93                 };
  94
  95                 gpioh: gpio@fff33000 {
  96                         #gpio-cells = <2>;
  97                         compatible = "arm,pl061", "arm,primecell";
  98                         gpio-controller;
  99                         reg = <0xfff33000 0x1000>;
 100                         interrupts = <0 17 4>;
 101                         clocks = <&pclk>;
 102                         clock-names = "apb_pclk";
 103                         status = "disabled";
 104                 };
 105
 106                 timer@fff34000 {
 107                         compatible = "arm,sp804", "arm,primecell";
 108                         reg = <0xfff34000 0x1000>;
 109                         interrupts = <0 18 4>;
 110                         clocks = <&pclk>;
 111                         clock-names = "apb_pclk";
 112                 };
 113
 114                 rtc@fff35000 {
 115                         compatible = "arm,pl031", "arm,primecell";
 116                         reg = <0xfff35000 0x1000>;
 117                         interrupts = <0 19 4>;
 118                         clocks = <&pclk>;
 119                         clock-names = "apb_pclk";
 120                 };
 121
 122                 serial@fff36000 {
 123                         compatible = "arm,pl011", "arm,primecell";
 124                         reg = <0xfff36000 0x1000>;
 125                         interrupts = <0 20 4>;
 126                         clocks = <&pclk>;
 127                         clock-names = "apb_pclk";
 128                 };
 129
 130                 smic@fff3a000 {
 131                         compatible = "ipmi-smic";
 132                         device_type = "ipmi";
 133                         reg = <0xfff3a000 0x1000>;
 134                         interrupts = <0 24 4>;
 135                         reg-size = <4>;
 136                         reg-spacing = <4>;
 137                 };
 138
 139                 sregs@fff3c000 {
 140                         compatible = "calxeda,hb-sregs";
 141                         reg = <0xfff3c000 0x1000>;
 142
 143                         clocks {
 144                                 #address-cells = <1>;
 145                                 #size-cells = <0>;
 146
 147                                 osc: oscillator {
 148                                         #clock-cells = <0>;
 149                                         compatible = "fixed-clock";
 150                                         clock-frequency = <33333000>;
 151                                 };
 152
 153                                 ddrpll: ddrpll {
 154                                         #clock-cells = <0>;
 155                                         compatible = "calxeda,hb-pll-clock";
 156                                         clocks = <&osc>;
 157                                         reg = <0x108>;
 158                                 };
 159
 160                                 a9pll: a9pll {
 161                                         #clock-cells = <0>;
 162                                         compatible = "calxeda,hb-pll-clock";
 163                                         clocks = <&osc>;
 164                                         reg = <0x100>;
 165                                 };
 166
 167                                 a9periphclk: a9periphclk {
 168                                         #clock-cells = <0>;
 169                                         compatible = "calxeda,hb-a9periph-clock";
 170                                         clocks = <&a9pll>;
 171                                         reg = <0x104>;
 172                                 };
 173
 174                                 a9bclk: a9bclk {
 175                                         #clock-cells = <0>;
 176                                         compatible = "calxeda,hb-a9bus-clock";
 177                                         clocks = <&a9pll>;
 178                                         reg = <0x104>;
 179                                 };
 180
 181                                 emmcpll: emmcpll {
 182                                         #clock-cells = <0>;
 183                                         compatible = "calxeda,hb-pll-clock";
 184                                         clocks = <&osc>;
 185                                         reg = <0x10C>;
 186                                 };
 187
 188                                 eclk: eclk {
 189                                         #clock-cells = <0>;
 190                                         compatible = "calxeda,hb-emmc-clock";
 191                                         clocks = <&emmcpll>;
 192                                         reg = <0x114>;
 193                                 };
 194
 195                                 pclk: pclk {
 196                                         #clock-cells = <0>;
 197                                         compatible = "fixed-clock";
 198                                         clock-frequency = <150000000>;
 199                                 };
 200                         };
 201                 };
 202
 203                 dma@fff3d000 {
 204                         compatible = "arm,pl330", "arm,primecell";
 205                         reg = <0xfff3d000 0x1000>;
 206                         interrupts = <0 92 4>;
 207                         clocks = <&pclk>;
 208                         clock-names = "apb_pclk";
 209                 };
 210
 211                 ethernet@fff50000 {
 212                         compatible = "calxeda,hb-xgmac";
 213                         reg = <0xfff50000 0x1000>;
 214                         interrupts = <0 77 4  0 78 4  0 79 4>;
 215                         dma-coherent;
 216                 };
 217
 218                 ethernet@fff51000 {
 219                         compatible = "calxeda,hb-xgmac";
 220                         reg = <0xfff51000 0x1000>;
 221                         interrupts = <0 80 4  0 81 4  0 82 4>;
 222                         dma-coherent;
 223                 };
 224
 225                 combophy0: combo-phy@fff58000 {
 226                         compatible = "calxeda,hb-combophy";
 227                         #phy-cells = <1>;
 228                         reg = <0xfff58000 0x1000>;
 229                         phydev = <5>;
 230                 };
 231
 232                 combophy5: combo-phy@fff5d000 {
 233                         compatible = "calxeda,hb-combophy";
 234                         #phy-cells = <1>;
 235                         reg = <0xfff5d000 0x1000>;
 236                         phydev = <31>;
 237                 };
 238         };
 239 };