| blob | de1611966d8b233a612dcd3bab07d33ae0180351 |
1 /*
2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
12 #include "skeleton.dtsi"
14 / {
15 aliases {
16 gpio0 = &gpio1;
17 gpio1 = &gpio2;
18 gpio2 = &gpio3;
19 gpio3 = &gpio4;
20 i2c0 = &i2c1;
21 i2c1 = &i2c2;
22 i2c2 = &i2c3;
23 serial0 = &uart1;
24 serial1 = &uart2;
25 serial2 = &uart3;
26 serial3 = &uart4;
27 serial4 = &uart5;
28 spi0 = &spi1;
29 spi1 = &spi2;
30 spi2 = &spi3;
31 usb0 = &usbotg;
32 usb1 = &usbhost1;
33 ethernet0 = &fec;
34 };
36 cpus {
37 #address-cells = <0>;
38 #size-cells = <0>;
40 cpu {
41 compatible = "arm,arm926ej-s";
42 device_type = "cpu";
43 };
44 };
46 asic: asic-interrupt-controller@68000000 {
47 compatible = "fsl,imx25-asic", "fsl,avic";
48 interrupt-controller;
49 #interrupt-cells = <1>;
50 reg = <0x68000000 0x8000000>;
51 };
53 clocks {
54 #address-cells = <1>;
55 #size-cells = <0>;
57 osc {
58 compatible = "fsl,imx-osc", "fixed-clock";
59 clock-frequency = <24000000>;
60 };
61 };
63 soc {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "simple-bus";
67 interrupt-parent = <&asic>;
68 ranges;
70 aips@43f00000 { /* AIPS1 */
71 compatible = "fsl,aips-bus", "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <1>;
74 reg = <0x43f00000 0x100000>;
75 ranges;
77 i2c1: i2c@43f80000 {
78 #address-cells = <1>;
79 #size-cells = <0>;
80 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
81 reg = <0x43f80000 0x4000>;
82 clocks = <&clks 48>;
83 clock-names = "";
84 interrupts = <3>;
85 status = "disabled";
86 };
88 i2c3: i2c@43f84000 {
89 #address-cells = <1>;
90 #size-cells = <0>;
91 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
92 reg = <0x43f84000 0x4000>;
93 clocks = <&clks 48>;
94 clock-names = "";
95 interrupts = <10>;
96 status = "disabled";
97 };
99 can1: can@43f88000 {
100 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
101 reg = <0x43f88000 0x4000>;
102 interrupts = <43>;
103 clocks = <&clks 75>, <&clks 75>;
104 clock-names = "ipg", "per";
105 status = "disabled";
106 };
108 can2: can@43f8c000 {
109 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
110 reg = <0x43f8c000 0x4000>;
111 interrupts = <44>;
112 clocks = <&clks 76>, <&clks 76>;
113 clock-names = "ipg", "per";
114 status = "disabled";
115 };
117 uart1: serial@43f90000 {
118 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
119 reg = <0x43f90000 0x4000>;
120 interrupts = <45>;
121 clocks = <&clks 120>, <&clks 57>;
122 clock-names = "ipg", "per";
123 status = "disabled";
124 };
126 uart2: serial@43f94000 {
127 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
128 reg = <0x43f94000 0x4000>;
129 interrupts = <32>;
130 clocks = <&clks 121>, <&clks 57>;
131 clock-names = "ipg", "per";
132 status = "disabled";
133 };
135 i2c2: i2c@43f98000 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
139 reg = <0x43f98000 0x4000>;
140 clocks = <&clks 48>;
141 clock-names = "";
142 interrupts = <4>;
143 status = "disabled";
144 };
146 owire@43f9c000 {
147 #address-cells = <1>;
148 #size-cells = <0>;
149 reg = <0x43f9c000 0x4000>;
150 clocks = <&clks 51>;
151 clock-names = "";
152 interrupts = <2>;
153 status = "disabled";
154 };
156 spi1: cspi@43fa4000 {
157 #address-cells = <1>;
158 #size-cells = <0>;
159 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
160 reg = <0x43fa4000 0x4000>;
161 clocks = <&clks 62>, <&clks 62>;
162 clock-names = "ipg", "per";
163 interrupts = <14>;
164 status = "disabled";
165 };
167 kpp@43fa8000 {
168 #address-cells = <1>;
169 #size-cells = <0>;
170 reg = <0x43fa8000 0x4000>;
171 clocks = <&clks 102>;
172 clock-names = "";
173 interrupts = <24>;
174 status = "disabled";
175 };
177 iomuxc@43fac000{
178 compatible = "fsl,imx25-iomuxc";
179 reg = <0x43fac000 0x4000>;
180 };
182 audmux@43fb0000 {
183 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
184 reg = <0x43fb0000 0x4000>;
185 status = "disabled";
186 };
187 };
189 spba@50000000 {
190 compatible = "fsl,spba-bus", "simple-bus";
191 #address-cells = <1>;
192 #size-cells = <1>;
193 reg = <0x50000000 0x40000>;
194 ranges;
196 spi3: cspi@50004000 {
197 #address-cells = <1>;
198 #size-cells = <0>;
199 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
200 reg = <0x50004000 0x4000>;
201 interrupts = <0>;
202 clocks = <&clks 80>, <&clks 80>;
203 clock-names = "ipg", "per";
204 status = "disabled";
205 };
207 uart4: serial@50008000 {
208 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
209 reg = <0x50008000 0x4000>;
210 interrupts = <5>;
211 clocks = <&clks 123>, <&clks 57>;
212 clock-names = "ipg", "per";
213 status = "disabled";
214 };
216 uart3: serial@5000c000 {
217 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
218 reg = <0x5000c000 0x4000>;
219 interrupts = <18>;
220 clocks = <&clks 122>, <&clks 57>;
221 clock-names = "ipg", "per";
222 status = "disabled";
223 };
225 spi2: cspi@50010000 {
226 #address-cells = <1>;
227 #size-cells = <0>;
228 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
229 reg = <0x50010000 0x4000>;
230 clocks = <&clks 79>, <&clks 79>;
231 clock-names = "ipg", "per";
232 interrupts = <13>;
233 status = "disabled";
234 };
236 ssi2: ssi@50014000 {
237 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
238 reg = <0x50014000 0x4000>;
239 interrupts = <11>;
240 status = "disabled";
241 };
243 esai@50018000 {
244 reg = <0x50018000 0x4000>;
245 interrupts = <7>;
246 };
248 uart5: serial@5002c000 {
249 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
250 reg = <0x5002c000 0x4000>;
251 interrupts = <40>;
252 clocks = <&clks 124>, <&clks 57>;
253 clock-names = "ipg", "per";
254 status = "disabled";
255 };
257 tsc: tsc@50030000 {
258 compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
259 reg = <0x50030000 0x4000>;
260 interrupts = <46>;
261 clocks = <&clks 119>;
262 clock-names = "ipg";
263 status = "disabled";
264 };
266 ssi1: ssi@50034000 {
267 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
268 reg = <0x50034000 0x4000>;
269 interrupts = <12>;
270 status = "disabled";
271 };
273 fec: ethernet@50038000 {
274 compatible = "fsl,imx25-fec";
275 reg = <0x50038000 0x4000>;
276 interrupts = <57>;
277 clocks = <&clks 88>, <&clks 65>;
278 clock-names = "ipg", "ahb";
279 status = "disabled";
280 };
281 };
283 aips@53f00000 { /* AIPS2 */
284 compatible = "fsl,aips-bus", "simple-bus";
285 #address-cells = <1>;
286 #size-cells = <1>;
287 reg = <0x53f00000 0x100000>;
288 ranges;
290 clks: ccm@53f80000 {
291 compatible = "fsl,imx25-ccm";
292 reg = <0x53f80000 0x4000>;
293 interrupts = <31>;
294 #clock-cells = <1>;
295 };
297 gpt4: timer@53f84000 {
298 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
299 reg = <0x53f84000 0x4000>;
300 clocks = <&clks 9>, <&clks 45>;
301 clock-names = "ipg", "per";
302 interrupts = <1>;
303 };
305 gpt3: timer@53f88000 {
306 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
307 reg = <0x53f88000 0x4000>;
308 clocks = <&clks 9>, <&clks 47>;
309 clock-names = "ipg", "per";
310 interrupts = <29>;
311 };
313 gpt2: timer@53f8c000 {
314 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
315 reg = <0x53f8c000 0x4000>;
316 clocks = <&clks 9>, <&clks 47>;
317 clock-names = "ipg", "per";
318 interrupts = <53>;
319 };
321 gpt1: timer@53f90000 {
322 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
323 reg = <0x53f90000 0x4000>;
324 clocks = <&clks 9>, <&clks 47>;
325 clock-names = "ipg", "per";
326 interrupts = <54>;
327 };
329 epit1: timer@53f94000 {
330 compatible = "fsl,imx25-epit";
331 reg = <0x53f94000 0x4000>;
332 interrupts = <28>;
333 };
335 epit2: timer@53f98000 {
336 compatible = "fsl,imx25-epit";
337 reg = <0x53f98000 0x4000>;
338 interrupts = <27>;
339 };
341 gpio4: gpio@53f9c000 {
342 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
343 reg = <0x53f9c000 0x4000>;
344 interrupts = <23>;
345 gpio-controller;
346 #gpio-cells = <2>;
347 interrupt-controller;
348 #interrupt-cells = <2>;
349 };
351 pwm2: pwm@53fa0000 {
352 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
353 #pwm-cells = <2>;
354 reg = <0x53fa0000 0x4000>;
355 clocks = <&clks 106>, <&clks 36>;
356 clock-names = "ipg", "per";
357 interrupts = <36>;
358 };
360 gpio3: gpio@53fa4000 {
361 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
362 reg = <0x53fa4000 0x4000>;
363 interrupts = <16>;
364 gpio-controller;
365 #gpio-cells = <2>;
366 interrupt-controller;
367 #interrupt-cells = <2>;
368 };
370 pwm3: pwm@53fa8000 {
371 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
372 #pwm-cells = <2>;
373 reg = <0x53fa8000 0x4000>;
374 clocks = <&clks 107>, <&clks 36>;
375 clock-names = "ipg", "per";
376 interrupts = <41>;
377 };
379 esdhc1: esdhc@53fb4000 {
380 compatible = "fsl,imx25-esdhc";
381 reg = <0x53fb4000 0x4000>;
382 interrupts = <9>;
383 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
384 clock-names = "ipg", "ahb", "per";
385 status = "disabled";
386 };
388 esdhc2: esdhc@53fb8000 {
389 compatible = "fsl,imx25-esdhc";
390 reg = <0x53fb8000 0x4000>;
391 interrupts = <8>;
392 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
393 clock-names = "ipg", "ahb", "per";
394 status = "disabled";
395 };
397 lcdc: lcdc@53fbc000 {
398 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
399 reg = <0x53fbc000 0x4000>;
400 interrupts = <39>;
401 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
402 clock-names = "ipg", "ahb", "per";
403 status = "disabled";
404 };
406 slcdc@53fc0000 {
407 reg = <0x53fc0000 0x4000>;
408 interrupts = <38>;
409 status = "disabled";
410 };
412 pwm4: pwm@53fc8000 {
413 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
414 reg = <0x53fc8000 0x4000>;
415 clocks = <&clks 108>, <&clks 36>;
416 clock-names = "ipg", "per";
417 interrupts = <42>;
418 };
420 gpio1: gpio@53fcc000 {
421 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
422 reg = <0x53fcc000 0x4000>;
423 interrupts = <52>;
424 gpio-controller;
425 #gpio-cells = <2>;
426 interrupt-controller;
427 #interrupt-cells = <2>;
428 };
430 gpio2: gpio@53fd0000 {
431 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
432 reg = <0x53fd0000 0x4000>;
433 interrupts = <51>;
434 gpio-controller;
435 #gpio-cells = <2>;
436 interrupt-controller;
437 #interrupt-cells = <2>;
438 };
440 sdma@53fd4000 {
441 compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
442 reg = <0x53fd4000 0x4000>;
443 clocks = <&clks 112>, <&clks 68>;
444 clock-names = "ipg", "ahb";
445 #dma-cells = <3>;
446 interrupts = <34>;
447 };
449 wdog@53fdc000 {
450 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
451 reg = <0x53fdc000 0x4000>;
452 clocks = <&clks 126>;
453 clock-names = "";
454 interrupts = <55>;
455 };
457 pwm1: pwm@53fe0000 {
458 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
459 #pwm-cells = <2>;
460 reg = <0x53fe0000 0x4000>;
461 clocks = <&clks 105>, <&clks 36>;
462 clock-names = "ipg", "per";
463 interrupts = <26>;
464 };
466 iim: iim@53ff0000 {
467 compatible = "fsl,imx25-iim", "fsl,imx27-iim";
468 reg = <0x53ff0000 0x4000>;
469 interrupts = <19>;
470 clocks = <&clks 99>;
471 };
473 usbphy1: usbphy@1 {
474 compatible = "nop-usbphy";
475 status = "disabled";
476 };
478 usbphy2: usbphy@2 {
479 compatible = "nop-usbphy";
480 status = "disabled";
481 };
483 usbotg: usb@53ff4000 {
484 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
485 reg = <0x53ff4000 0x0200>;
486 interrupts = <37>;
487 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
488 clock-names = "ipg", "ahb", "per";
489 fsl,usbmisc = <&usbmisc 0>;
490 status = "disabled";
491 };
493 usbhost1: usb@53ff4400 {
494 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
495 reg = <0x53ff4400 0x0200>;
496 interrupts = <35>;
497 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
498 clock-names = "ipg", "ahb", "per";
499 fsl,usbmisc = <&usbmisc 1>;
500 status = "disabled";
501 };
503 usbmisc: usbmisc@53ff4600 {
504 #index-cells = <1>;
505 compatible = "fsl,imx25-usbmisc";
506 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
507 clock-names = "ipg", "ahb", "per";
508 reg = <0x53ff4600 0x00f>;
509 status = "disabled";
510 };
512 dryice@53ffc000 {
513 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
514 reg = <0x53ffc000 0x4000>;
515 clocks = <&clks 81>;
516 clock-names = "ipg";
517 interrupts = <25>;
518 };
519 };
521 emi@80000000 {
522 compatible = "fsl,emi-bus", "simple-bus";
523 #address-cells = <1>;
524 #size-cells = <1>;
525 reg = <0x80000000 0x3b002000>;
526 ranges;
528 nfc: nand@bb000000 {
529 #address-cells = <1>;
530 #size-cells = <1>;
532 compatible = "fsl,imx25-nand";
533 reg = <0xbb000000 0x2000>;
534 clocks = <&clks 50>;
535 clock-names = "";
536 interrupts = <33>;
537 status = "disabled";
538 };
539 };
540 };
541 };