4 compatible = "marvell,kirkwood-pcie";
11 bus-range = <0x00 0xff>;
14 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
15 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
16 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
20 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
21 reg = <0x0800 0 0 0 0>;
24 #interrupt-cells = <1>;
25 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
26 0x81000000 0 0 0x81000000 0x1 0 1 0>;
27 interrupt-map-mask = <0 0 0 0>;
28 interrupt-map = <0 0 0 0 &intc 9>;
29 marvell,pcie-port = <0>;
30 marvell,pcie-lane = <0>;
31 clocks = <&gate_clk 2>;
38 pinctrl: pinctrl@10000 {
39 compatible = "marvell,88f6281-pinctrl";
43 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
44 "mpp4", "mpp5", "mpp18",
46 marvell,function = "nand";
48 pmx_sata0: pmx-sata0 {
49 marvell,pins = "mpp5", "mpp21", "mpp23";
50 marvell,function = "sata0";
52 pmx_sata1: pmx-sata1 {
53 marvell,pins = "mpp4", "mpp20", "mpp22";
54 marvell,function = "sata1";
57 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
58 marvell,function = "spi";
60 pmx_twsi0: pmx-twsi0 {
61 marvell,pins = "mpp8", "mpp9";
62 marvell,function = "twsi0";
64 pmx_uart0: pmx-uart0 {
65 marvell,pins = "mpp10", "mpp11";
66 marvell,function = "uart0";
68 pmx_uart1: pmx-uart1 {
69 marvell,pins = "mpp13", "mpp14";
70 marvell,function = "uart1";
73 marvell,pins = "mpp12", "mpp13", "mpp14",
74 "mpp15", "mpp16", "mpp17";
75 marvell,function = "sdio";
80 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
83 clocks = <&gate_clk 7>;
87 compatible = "marvell,orion-sata";
88 reg = <0x80000 0x5000>;
90 clocks = <&gate_clk 14>, <&gate_clk 15>;
91 clock-names = "0", "1";
96 compatible = "marvell,orion-sdio";
97 reg = <0x90000 0x200>;
99 clocks = <&gate_clk 4>;