arch/arm/kernel/devtree.c

   1 /*
   2  *  linux/arch/arm/kernel/devtree.c
   3  *
   4  *  Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/init.h>
  12 #include <linux/export.h>
  13 #include <linux/errno.h>
  14 #include <linux/types.h>
  15 #include <linux/bootmem.h>
  16 #include <linux/memblock.h>
  17 #include <linux/of.h>
  18 #include <linux/of_fdt.h>
  19 #include <linux/of_irq.h>
  20 #include <linux/of_platform.h>
  21
  22 #include <asm/cputype.h>
  23 #include <asm/setup.h>
  24 #include <asm/page.h>
  25 #include <asm/smp_plat.h>
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach-types.h>
  28
  29 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
  30 {
  31         arm_add_memory(base, size);
  32 }
  33
  34 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
  35 {
  36         return alloc_bootmem_align(size, align);
  37 }
  38
  39 void __init arm_dt_memblock_reserve(void)
  40 {
  41         u64 *reserve_map, base, size;
  42
  43         if (!initial_boot_params)
  44                 return;
  45
  46         /* Reserve the dtb region */
  47         memblock_reserve(virt_to_phys(initial_boot_params),
  48                          be32_to_cpu(initial_boot_params->totalsize));
  49
  50         /*
  51          * Process the reserve map.  This will probably overlap the initrd
  52          * and dtb locations which are already reserved, but overlaping
  53          * doesn't hurt anything
  54          */
  55         reserve_map = ((void*)initial_boot_params) +
  56                         be32_to_cpu(initial_boot_params->off_mem_rsvmap);
  57         while (1) {
  58                 base = be64_to_cpup(reserve_map++);
  59                 size = be64_to_cpup(reserve_map++);
  60                 if (!size)
  61                         break;
  62                 memblock_reserve(base, size);
  63         }
  64 }
  65
  66 /*
  67  * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
  68  * and builds the cpu logical map array containing MPIDR values related to
  69  * logical cpus
  70  *
  71  * Updates the cpu possible mask with the number of parsed cpu nodes
  72  */
  73 void __init arm_dt_init_cpu_maps(void)
  74 {
  75         /*
  76          * Temp logical map is initialized with UINT_MAX values that are
  77          * considered invalid logical map entries since the logical map must
  78          * contain a list of MPIDR[23:0] values where MPIDR[31:24] must
  79          * read as 0.
  80          */
  81         struct device_node *cpu, *cpus;
  82         u32 i, j, cpuidx = 1;
  83         u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
  84
  85         u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
  86         bool bootcpu_valid = false;
  87         cpus = of_find_node_by_path("/cpus");
  88
  89         if (!cpus)
  90                 return;
  91
  92         for_each_child_of_node(cpus, cpu) {
  93                 u32 hwid;
  94
  95                 if (of_node_cmp(cpu->type, "cpu"))
  96                         continue;
  97
  98                 pr_debug(" * %s...\n", cpu->full_name);
  99                 /*
 100                  * A device tree containing CPU nodes with missing "reg"
 101                  * properties is considered invalid to build the
 102                  * cpu_logical_map.
 103                  */
 104                 if (of_property_read_u32(cpu, "reg", &hwid)) {
 105                         pr_debug(" * %s missing reg property\n",
 106                                      cpu->full_name);
 107                         return;
 108                 }
 109
 110                 /*
 111                  * 8 MSBs must be set to 0 in the DT since the reg property
 112                  * defines the MPIDR[23:0].
 113                  */
 114                 if (hwid & ~MPIDR_HWID_BITMASK)
 115                         return;
 116
 117                 /*
 118                  * Duplicate MPIDRs are a recipe for disaster.
 119                  * Scan all initialized entries and check for
 120                  * duplicates. If any is found just bail out.
 121                  * temp values were initialized to UINT_MAX
 122                  * to avoid matching valid MPIDR[23:0] values.
 123                  */
 124                 for (j = 0; j < cpuidx; j++)
 125                         if (WARN(tmp_map[j] == hwid, "Duplicate /cpu reg "
 126                                                      "properties in the DT\n"))
 127                                 return;
 128
 129                 /*
 130                  * Build a stashed array of MPIDR values. Numbering scheme
 131                  * requires that if detected the boot CPU must be assigned
 132                  * logical id 0. Other CPUs get sequential indexes starting
 133                  * from 1. If a CPU node with a reg property matching the
 134                  * boot CPU MPIDR is detected, this is recorded so that the
 135                  * logical map built from DT is validated and can be used
 136                  * to override the map created in smp_setup_processor_id().
 137                  */
 138                 if (hwid == mpidr) {
 139                         i = 0;
 140                         bootcpu_valid = true;
 141                 } else {
 142                         i = cpuidx++;
 143                 }
 144
 145                 if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than "
 146                                                "max cores %u, capping them\n",
 147                                                cpuidx, nr_cpu_ids)) {
 148                         cpuidx = nr_cpu_ids;
 149                         break;
 150                 }
 151
 152                 tmp_map[i] = hwid;
 153         }
 154
 155         if (!bootcpu_valid) {
 156                 pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n");
 157                 return;
 158         }
 159
 160         /*
 161          * Since the boot CPU node contains proper data, and all nodes have
 162          * a reg property, the DT CPU list can be considered valid and the
 163          * logical map created in smp_setup_processor_id() can be overridden
 164          */
 165         for (i = 0; i < cpuidx; i++) {
 166                 set_cpu_possible(i, true);
 167                 cpu_logical_map(i) = tmp_map[i];
 168                 pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i));
 169         }
 170 }
 171
 172 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
 173 {
 174         return phys_id == cpu_logical_map(cpu);
 175 }
 176
 177 /**
 178  * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
 179  * @dt_phys: physical address of dt blob
 180  *
 181  * If a dtb was passed to the kernel in r2, then use it to choose the
 182  * correct machine_desc and to setup the system.
 183  */
 184 const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
 185 {
 186         struct boot_param_header *devtree;
 187         const struct machine_desc *mdesc, *mdesc_best = NULL;
 188         unsigned int score, mdesc_score = ~1;
 189         unsigned long dt_root;
 190         const char *model;
 191
 192 #ifdef CONFIG_ARCH_MULTIPLATFORM
 193         DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
 194         MACHINE_END
 195
 196         mdesc_best = &__mach_desc_GENERIC_DT;
 197 #endif
 198
 199         if (!dt_phys)
 200                 return NULL;
 201
 202         devtree = phys_to_virt(dt_phys);
 203
 204         /* check device tree validity */
 205         if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
 206                 return NULL;
 207
 208         /* Search the mdescs for the 'best' compatible value match */
 209         initial_boot_params = devtree;
 210         dt_root = of_get_flat_dt_root();
 211         for_each_machine_desc(mdesc) {
 212                 score = of_flat_dt_match(dt_root, mdesc->dt_compat);
 213                 if (score > 0 && score < mdesc_score) {
 214                         mdesc_best = mdesc;
 215                         mdesc_score = score;
 216                 }
 217         }
 218         if (!mdesc_best) {
 219                 const char *prop;
 220                 long size;
 221
 222                 early_print("\nError: unrecognized/unsupported "
 223                             "device tree compatible list:\n[ ");
 224
 225                 prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
 226                 while (size > 0) {
 227                         early_print("'%s' ", prop);
 228                         size -= strlen(prop) + 1;
 229                         prop += strlen(prop) + 1;
 230                 }
 231                 early_print("]\n\n");
 232
 233                 dump_machine_table(); /* does not return */
 234         }
 235
 236         model = of_get_flat_dt_prop(dt_root, "model", NULL);
 237         if (!model)
 238                 model = of_get_flat_dt_prop(dt_root, "compatible", NULL);
 239         if (!model)
 240                 model = "<unknown>";
 241         pr_info("Machine: %s, model: %s\n", mdesc_best->name, model);
 242
 243         /* Retrieve various information from the /chosen node */
 244         of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
 245         /* Initialize {size,address}-cells info */
 246         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 247         /* Setup memory, calling early_init_dt_add_memory_arch */
 248         of_scan_flat_dt(early_init_dt_scan_memory, NULL);
 249
 250         /* Change machine number to match the mdesc we're using */
 251         __machine_arch_type = mdesc_best->nr;
 252
 253         return mdesc_best;
 254 }