x86/efi: Enforce CONFIG_RELOCATABLE for EFI boot stub
[linux/fpc-iii.git] / arch / arm / kernel / perf_event.c
blobde5cd767e4df79cb683479f9e8854a01b44178f5
1 #undef DEBUG
3 /*
4 * ARM performance counter support.
6 * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
7 * Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
9 * This code is based on the sparc64 perf event code, which is in turn based
10 * on the x86 code. Callchain code is based on the ARM OProfile backtrace
11 * code.
13 #define pr_fmt(fmt) "hw perfevents: " fmt
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/uaccess.h>
20 #include <asm/irq_regs.h>
21 #include <asm/pmu.h>
22 #include <asm/stacktrace.h>
24 static int
25 armpmu_map_cache_event(const unsigned (*cache_map)
26 [PERF_COUNT_HW_CACHE_MAX]
27 [PERF_COUNT_HW_CACHE_OP_MAX]
28 [PERF_COUNT_HW_CACHE_RESULT_MAX],
29 u64 config)
31 unsigned int cache_type, cache_op, cache_result, ret;
33 cache_type = (config >> 0) & 0xff;
34 if (cache_type >= PERF_COUNT_HW_CACHE_MAX)
35 return -EINVAL;
37 cache_op = (config >> 8) & 0xff;
38 if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX)
39 return -EINVAL;
41 cache_result = (config >> 16) & 0xff;
42 if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
43 return -EINVAL;
45 ret = (int)(*cache_map)[cache_type][cache_op][cache_result];
47 if (ret == CACHE_OP_UNSUPPORTED)
48 return -ENOENT;
50 return ret;
53 static int
54 armpmu_map_hw_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config)
56 int mapping;
58 if (config >= PERF_COUNT_HW_MAX)
59 return -EINVAL;
61 mapping = (*event_map)[config];
62 return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping;
65 static int
66 armpmu_map_raw_event(u32 raw_event_mask, u64 config)
68 return (int)(config & raw_event_mask);
71 int
72 armpmu_map_event(struct perf_event *event,
73 const unsigned (*event_map)[PERF_COUNT_HW_MAX],
74 const unsigned (*cache_map)
75 [PERF_COUNT_HW_CACHE_MAX]
76 [PERF_COUNT_HW_CACHE_OP_MAX]
77 [PERF_COUNT_HW_CACHE_RESULT_MAX],
78 u32 raw_event_mask)
80 u64 config = event->attr.config;
82 switch (event->attr.type) {
83 case PERF_TYPE_HARDWARE:
84 return armpmu_map_hw_event(event_map, config);
85 case PERF_TYPE_HW_CACHE:
86 return armpmu_map_cache_event(cache_map, config);
87 case PERF_TYPE_RAW:
88 return armpmu_map_raw_event(raw_event_mask, config);
91 return -ENOENT;
94 int armpmu_event_set_period(struct perf_event *event)
96 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
97 struct hw_perf_event *hwc = &event->hw;
98 s64 left = local64_read(&hwc->period_left);
99 s64 period = hwc->sample_period;
100 int ret = 0;
102 /* The period may have been changed by PERF_EVENT_IOC_PERIOD */
103 if (unlikely(period != hwc->last_period))
104 left = period - (hwc->last_period - left);
106 if (unlikely(left <= -period)) {
107 left = period;
108 local64_set(&hwc->period_left, left);
109 hwc->last_period = period;
110 ret = 1;
113 if (unlikely(left <= 0)) {
114 left += period;
115 local64_set(&hwc->period_left, left);
116 hwc->last_period = period;
117 ret = 1;
120 if (left > (s64)armpmu->max_period)
121 left = armpmu->max_period;
123 local64_set(&hwc->prev_count, (u64)-left);
125 armpmu->write_counter(event, (u64)(-left) & 0xffffffff);
127 perf_event_update_userpage(event);
129 return ret;
132 u64 armpmu_event_update(struct perf_event *event)
134 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
135 struct hw_perf_event *hwc = &event->hw;
136 u64 delta, prev_raw_count, new_raw_count;
138 again:
139 prev_raw_count = local64_read(&hwc->prev_count);
140 new_raw_count = armpmu->read_counter(event);
142 if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
143 new_raw_count) != prev_raw_count)
144 goto again;
146 delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
148 local64_add(delta, &event->count);
149 local64_sub(delta, &hwc->period_left);
151 return new_raw_count;
154 static void
155 armpmu_read(struct perf_event *event)
157 armpmu_event_update(event);
160 static void
161 armpmu_stop(struct perf_event *event, int flags)
163 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
164 struct hw_perf_event *hwc = &event->hw;
167 * ARM pmu always has to update the counter, so ignore
168 * PERF_EF_UPDATE, see comments in armpmu_start().
170 if (!(hwc->state & PERF_HES_STOPPED)) {
171 armpmu->disable(event);
172 armpmu_event_update(event);
173 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
177 static void armpmu_start(struct perf_event *event, int flags)
179 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
180 struct hw_perf_event *hwc = &event->hw;
183 * ARM pmu always has to reprogram the period, so ignore
184 * PERF_EF_RELOAD, see the comment below.
186 if (flags & PERF_EF_RELOAD)
187 WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
189 hwc->state = 0;
191 * Set the period again. Some counters can't be stopped, so when we
192 * were stopped we simply disabled the IRQ source and the counter
193 * may have been left counting. If we don't do this step then we may
194 * get an interrupt too soon or *way* too late if the overflow has
195 * happened since disabling.
197 armpmu_event_set_period(event);
198 armpmu->enable(event);
201 static void
202 armpmu_del(struct perf_event *event, int flags)
204 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
205 struct pmu_hw_events *hw_events = armpmu->get_hw_events();
206 struct hw_perf_event *hwc = &event->hw;
207 int idx = hwc->idx;
209 armpmu_stop(event, PERF_EF_UPDATE);
210 hw_events->events[idx] = NULL;
211 clear_bit(idx, hw_events->used_mask);
213 perf_event_update_userpage(event);
216 static int
217 armpmu_add(struct perf_event *event, int flags)
219 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
220 struct pmu_hw_events *hw_events = armpmu->get_hw_events();
221 struct hw_perf_event *hwc = &event->hw;
222 int idx;
223 int err = 0;
225 perf_pmu_disable(event->pmu);
227 /* If we don't have a space for the counter then finish early. */
228 idx = armpmu->get_event_idx(hw_events, event);
229 if (idx < 0) {
230 err = idx;
231 goto out;
235 * If there is an event in the counter we are going to use then make
236 * sure it is disabled.
238 event->hw.idx = idx;
239 armpmu->disable(event);
240 hw_events->events[idx] = event;
242 hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
243 if (flags & PERF_EF_START)
244 armpmu_start(event, PERF_EF_RELOAD);
246 /* Propagate our changes to the userspace mapping. */
247 perf_event_update_userpage(event);
249 out:
250 perf_pmu_enable(event->pmu);
251 return err;
254 static int
255 validate_event(struct pmu_hw_events *hw_events,
256 struct perf_event *event)
258 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
259 struct pmu *leader_pmu = event->group_leader->pmu;
261 if (is_software_event(event))
262 return 1;
264 if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF)
265 return 1;
267 if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
268 return 1;
270 return armpmu->get_event_idx(hw_events, event) >= 0;
273 static int
274 validate_group(struct perf_event *event)
276 struct perf_event *sibling, *leader = event->group_leader;
277 struct pmu_hw_events fake_pmu;
278 DECLARE_BITMAP(fake_used_mask, ARMPMU_MAX_HWEVENTS);
281 * Initialise the fake PMU. We only need to populate the
282 * used_mask for the purposes of validation.
284 memset(fake_used_mask, 0, sizeof(fake_used_mask));
285 fake_pmu.used_mask = fake_used_mask;
287 if (!validate_event(&fake_pmu, leader))
288 return -EINVAL;
290 list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
291 if (!validate_event(&fake_pmu, sibling))
292 return -EINVAL;
295 if (!validate_event(&fake_pmu, event))
296 return -EINVAL;
298 return 0;
301 static irqreturn_t armpmu_dispatch_irq(int irq, void *dev)
303 struct arm_pmu *armpmu = (struct arm_pmu *) dev;
304 struct platform_device *plat_device = armpmu->plat_device;
305 struct arm_pmu_platdata *plat = dev_get_platdata(&plat_device->dev);
306 int ret;
307 u64 start_clock, finish_clock;
309 start_clock = sched_clock();
310 if (plat && plat->handle_irq)
311 ret = plat->handle_irq(irq, dev, armpmu->handle_irq);
312 else
313 ret = armpmu->handle_irq(irq, dev);
314 finish_clock = sched_clock();
316 perf_sample_event_took(finish_clock - start_clock);
317 return ret;
320 static void
321 armpmu_release_hardware(struct arm_pmu *armpmu)
323 armpmu->free_irq(armpmu);
324 pm_runtime_put_sync(&armpmu->plat_device->dev);
327 static int
328 armpmu_reserve_hardware(struct arm_pmu *armpmu)
330 int err;
331 struct platform_device *pmu_device = armpmu->plat_device;
333 if (!pmu_device)
334 return -ENODEV;
336 pm_runtime_get_sync(&pmu_device->dev);
337 err = armpmu->request_irq(armpmu, armpmu_dispatch_irq);
338 if (err) {
339 armpmu_release_hardware(armpmu);
340 return err;
343 return 0;
346 static void
347 hw_perf_event_destroy(struct perf_event *event)
349 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
350 atomic_t *active_events = &armpmu->active_events;
351 struct mutex *pmu_reserve_mutex = &armpmu->reserve_mutex;
353 if (atomic_dec_and_mutex_lock(active_events, pmu_reserve_mutex)) {
354 armpmu_release_hardware(armpmu);
355 mutex_unlock(pmu_reserve_mutex);
359 static int
360 event_requires_mode_exclusion(struct perf_event_attr *attr)
362 return attr->exclude_idle || attr->exclude_user ||
363 attr->exclude_kernel || attr->exclude_hv;
366 static int
367 __hw_perf_event_init(struct perf_event *event)
369 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
370 struct hw_perf_event *hwc = &event->hw;
371 int mapping;
373 mapping = armpmu->map_event(event);
375 if (mapping < 0) {
376 pr_debug("event %x:%llx not supported\n", event->attr.type,
377 event->attr.config);
378 return mapping;
382 * We don't assign an index until we actually place the event onto
383 * hardware. Use -1 to signify that we haven't decided where to put it
384 * yet. For SMP systems, each core has it's own PMU so we can't do any
385 * clever allocation or constraints checking at this point.
387 hwc->idx = -1;
388 hwc->config_base = 0;
389 hwc->config = 0;
390 hwc->event_base = 0;
393 * Check whether we need to exclude the counter from certain modes.
395 if ((!armpmu->set_event_filter ||
396 armpmu->set_event_filter(hwc, &event->attr)) &&
397 event_requires_mode_exclusion(&event->attr)) {
398 pr_debug("ARM performance counters do not support "
399 "mode exclusion\n");
400 return -EOPNOTSUPP;
404 * Store the event encoding into the config_base field.
406 hwc->config_base |= (unsigned long)mapping;
408 if (!hwc->sample_period) {
410 * For non-sampling runs, limit the sample_period to half
411 * of the counter width. That way, the new counter value
412 * is far less likely to overtake the previous one unless
413 * you have some serious IRQ latency issues.
415 hwc->sample_period = armpmu->max_period >> 1;
416 hwc->last_period = hwc->sample_period;
417 local64_set(&hwc->period_left, hwc->sample_period);
420 if (event->group_leader != event) {
421 if (validate_group(event) != 0)
422 return -EINVAL;
425 return 0;
428 static int armpmu_event_init(struct perf_event *event)
430 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
431 int err = 0;
432 atomic_t *active_events = &armpmu->active_events;
434 /* does not support taken branch sampling */
435 if (has_branch_stack(event))
436 return -EOPNOTSUPP;
438 if (armpmu->map_event(event) == -ENOENT)
439 return -ENOENT;
441 event->destroy = hw_perf_event_destroy;
443 if (!atomic_inc_not_zero(active_events)) {
444 mutex_lock(&armpmu->reserve_mutex);
445 if (atomic_read(active_events) == 0)
446 err = armpmu_reserve_hardware(armpmu);
448 if (!err)
449 atomic_inc(active_events);
450 mutex_unlock(&armpmu->reserve_mutex);
453 if (err)
454 return err;
456 err = __hw_perf_event_init(event);
457 if (err)
458 hw_perf_event_destroy(event);
460 return err;
463 static void armpmu_enable(struct pmu *pmu)
465 struct arm_pmu *armpmu = to_arm_pmu(pmu);
466 struct pmu_hw_events *hw_events = armpmu->get_hw_events();
467 int enabled = bitmap_weight(hw_events->used_mask, armpmu->num_events);
469 if (enabled)
470 armpmu->start(armpmu);
473 static void armpmu_disable(struct pmu *pmu)
475 struct arm_pmu *armpmu = to_arm_pmu(pmu);
476 armpmu->stop(armpmu);
479 #ifdef CONFIG_PM_RUNTIME
480 static int armpmu_runtime_resume(struct device *dev)
482 struct arm_pmu_platdata *plat = dev_get_platdata(dev);
484 if (plat && plat->runtime_resume)
485 return plat->runtime_resume(dev);
487 return 0;
490 static int armpmu_runtime_suspend(struct device *dev)
492 struct arm_pmu_platdata *plat = dev_get_platdata(dev);
494 if (plat && plat->runtime_suspend)
495 return plat->runtime_suspend(dev);
497 return 0;
499 #endif
501 const struct dev_pm_ops armpmu_dev_pm_ops = {
502 SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL)
505 static void armpmu_init(struct arm_pmu *armpmu)
507 atomic_set(&armpmu->active_events, 0);
508 mutex_init(&armpmu->reserve_mutex);
510 armpmu->pmu = (struct pmu) {
511 .pmu_enable = armpmu_enable,
512 .pmu_disable = armpmu_disable,
513 .event_init = armpmu_event_init,
514 .add = armpmu_add,
515 .del = armpmu_del,
516 .start = armpmu_start,
517 .stop = armpmu_stop,
518 .read = armpmu_read,
522 int armpmu_register(struct arm_pmu *armpmu, int type)
524 armpmu_init(armpmu);
525 pm_runtime_enable(&armpmu->plat_device->dev);
526 pr_info("enabled with %s PMU driver, %d counters available\n",
527 armpmu->name, armpmu->num_events);
528 return perf_pmu_register(&armpmu->pmu, armpmu->name, type);
532 * Callchain handling code.
536 * The registers we're interested in are at the end of the variable
537 * length saved register structure. The fp points at the end of this
538 * structure so the address of this struct is:
539 * (struct frame_tail *)(xxx->fp)-1
541 * This code has been adapted from the ARM OProfile support.
543 struct frame_tail {
544 struct frame_tail __user *fp;
545 unsigned long sp;
546 unsigned long lr;
547 } __attribute__((packed));
550 * Get the return address for a single stackframe and return a pointer to the
551 * next frame tail.
553 static struct frame_tail __user *
554 user_backtrace(struct frame_tail __user *tail,
555 struct perf_callchain_entry *entry)
557 struct frame_tail buftail;
559 /* Also check accessibility of one struct frame_tail beyond */
560 if (!access_ok(VERIFY_READ, tail, sizeof(buftail)))
561 return NULL;
562 if (__copy_from_user_inatomic(&buftail, tail, sizeof(buftail)))
563 return NULL;
565 perf_callchain_store(entry, buftail.lr);
568 * Frame pointers should strictly progress back up the stack
569 * (towards higher addresses).
571 if (tail + 1 >= buftail.fp)
572 return NULL;
574 return buftail.fp - 1;
577 void
578 perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
580 struct frame_tail __user *tail;
582 if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
583 /* We don't support guest os callchain now */
584 return;
587 perf_callchain_store(entry, regs->ARM_pc);
588 tail = (struct frame_tail __user *)regs->ARM_fp - 1;
590 while ((entry->nr < PERF_MAX_STACK_DEPTH) &&
591 tail && !((unsigned long)tail & 0x3))
592 tail = user_backtrace(tail, entry);
596 * Gets called by walk_stackframe() for every stackframe. This will be called
597 * whist unwinding the stackframe and is like a subroutine return so we use
598 * the PC.
600 static int
601 callchain_trace(struct stackframe *fr,
602 void *data)
604 struct perf_callchain_entry *entry = data;
605 perf_callchain_store(entry, fr->pc);
606 return 0;
609 void
610 perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs)
612 struct stackframe fr;
614 if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
615 /* We don't support guest os callchain now */
616 return;
619 fr.fp = regs->ARM_fp;
620 fr.sp = regs->ARM_sp;
621 fr.lr = regs->ARM_lr;
622 fr.pc = regs->ARM_pc;
623 walk_stackframe(&fr, callchain_trace, entry);
626 unsigned long perf_instruction_pointer(struct pt_regs *regs)
628 if (perf_guest_cbs && perf_guest_cbs->is_in_guest())
629 return perf_guest_cbs->get_guest_ip();
631 return instruction_pointer(regs);
634 unsigned long perf_misc_flags(struct pt_regs *regs)
636 int misc = 0;
638 if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
639 if (perf_guest_cbs->is_user_mode())
640 misc |= PERF_RECORD_MISC_GUEST_USER;
641 else
642 misc |= PERF_RECORD_MISC_GUEST_KERNEL;
643 } else {
644 if (user_mode(regs))
645 misc |= PERF_RECORD_MISC_USER;
646 else
647 misc |= PERF_RECORD_MISC_KERNEL;
650 return misc;