arch/arm/mach-exynos/cpuidle.c

   1 /* linux/arch/arm/mach-exynos4/cpuidle.c
   2  *
   3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/cpuidle.h>
  14 #include <linux/cpu_pm.h>
  15 #include <linux/io.h>
  16 #include <linux/export.h>
  17 #include <linux/time.h>
  18
  19 #include <asm/proc-fns.h>
  20 #include <asm/smp_scu.h>
  21 #include <asm/suspend.h>
  22 #include <asm/unified.h>
  23 #include <asm/cpuidle.h>
  24 #include <mach/regs-clock.h>
  25 #include <mach/regs-pmu.h>
  26
  27 #include <plat/cpu.h>
  28 #include <plat/pm.h>
  29
  30 #include "common.h"
  31
  32 #define REG_DIRECTGO_ADDR       (samsung_rev() == EXYNOS4210_REV_1_1 ? \
  33                         S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
  34                         (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
  35 #define REG_DIRECTGO_FLAG       (samsung_rev() == EXYNOS4210_REV_1_1 ? \
  36                         S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
  37                         (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
  38
  39 #define S5P_CHECK_AFTR          0xFCBA0D10
  40
  41 static int exynos4_enter_lowpower(struct cpuidle_device *dev,
  42                                 struct cpuidle_driver *drv,
  43                                 int index);
  44
  45 static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
  46
  47 static struct cpuidle_driver exynos4_idle_driver = {
  48         .name                   = "exynos4_idle",
  49         .owner                  = THIS_MODULE,
  50         .states = {
  51                 [0] = ARM_CPUIDLE_WFI_STATE,
  52                 [1] = {
  53                         .enter                  = exynos4_enter_lowpower,
  54                         .exit_latency           = 300,
  55                         .target_residency       = 100000,
  56                         .flags                  = CPUIDLE_FLAG_TIME_VALID,
  57                         .name                   = "C1",
  58                         .desc                   = "ARM power down",
  59                 },
  60         },
  61         .state_count = 2,
  62         .safe_state_index = 0,
  63 };
  64
  65 /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
  66 static void exynos4_set_wakeupmask(void)
  67 {
  68         __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
  69 }
  70
  71 static unsigned int g_pwr_ctrl, g_diag_reg;
  72
  73 static void save_cpu_arch_register(void)
  74 {
  75         /*read power control register*/
  76         asm("mrc p15, 0, %0, c15, c0, 0" : "=r"(g_pwr_ctrl) : : "cc");
  77         /*read diagnostic register*/
  78         asm("mrc p15, 0, %0, c15, c0, 1" : "=r"(g_diag_reg) : : "cc");
  79         return;
  80 }
  81
  82 static void restore_cpu_arch_register(void)
  83 {
  84         /*write power control register*/
  85         asm("mcr p15, 0, %0, c15, c0, 0" : : "r"(g_pwr_ctrl) : "cc");
  86         /*write diagnostic register*/
  87         asm("mcr p15, 0, %0, c15, c0, 1" : : "r"(g_diag_reg) : "cc");
  88         return;
  89 }
  90
  91 static int idle_finisher(unsigned long flags)
  92 {
  93         cpu_do_idle();
  94         return 1;
  95 }
  96
  97 static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
  98                                 struct cpuidle_driver *drv,
  99                                 int index)
 100 {
 101         unsigned long tmp;
 102
 103         exynos4_set_wakeupmask();
 104
 105         /* Set value of power down register for aftr mode */
 106         exynos_sys_powerdown_conf(SYS_AFTR);
 107
 108         __raw_writel(virt_to_phys(s3c_cpu_resume), REG_DIRECTGO_ADDR);
 109         __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
 110
 111         save_cpu_arch_register();
 112
 113         /* Setting Central Sequence Register for power down mode */
 114         tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
 115         tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
 116         __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 117
 118         cpu_pm_enter();
 119         cpu_suspend(0, idle_finisher);
 120
 121 #ifdef CONFIG_SMP
 122         if (!soc_is_exynos5250())
 123                 scu_enable(S5P_VA_SCU);
 124 #endif
 125         cpu_pm_exit();
 126
 127         restore_cpu_arch_register();
 128
 129         /*
 130          * If PMU failed while entering sleep mode, WFI will be
 131          * ignored by PMU and then exiting cpu_do_idle().
 132          * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
 133          * in this situation.
 134          */
 135         tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
 136         if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
 137                 tmp |= S5P_CENTRAL_LOWPWR_CFG;
 138                 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 139         }
 140
 141         /* Clear wakeup state register */
 142         __raw_writel(0x0, S5P_WAKEUP_STAT);
 143
 144         return index;
 145 }
 146
 147 static int exynos4_enter_lowpower(struct cpuidle_device *dev,
 148                                 struct cpuidle_driver *drv,
 149                                 int index)
 150 {
 151         int new_index = index;
 152
 153         /* This mode only can be entered when other core's are offline */
 154         if (num_online_cpus() > 1)
 155                 new_index = drv->safe_state_index;
 156
 157         if (new_index == 0)
 158                 return arm_cpuidle_simple_enter(dev, drv, new_index);
 159         else
 160                 return exynos4_enter_core0_aftr(dev, drv, new_index);
 161 }
 162
 163 static void __init exynos5_core_down_clk(void)
 164 {
 165         unsigned int tmp;
 166
 167         /*
 168          * Enable arm clock down (in idle) and set arm divider
 169          * ratios in WFI/WFE state.
 170          */
 171         tmp = PWR_CTRL1_CORE2_DOWN_RATIO | \
 172               PWR_CTRL1_CORE1_DOWN_RATIO | \
 173               PWR_CTRL1_DIV2_DOWN_EN     | \
 174               PWR_CTRL1_DIV1_DOWN_EN     | \
 175               PWR_CTRL1_USE_CORE1_WFE    | \
 176               PWR_CTRL1_USE_CORE0_WFE    | \
 177               PWR_CTRL1_USE_CORE1_WFI    | \
 178               PWR_CTRL1_USE_CORE0_WFI;
 179         __raw_writel(tmp, EXYNOS5_PWR_CTRL1);
 180
 181         /*
 182          * Enable arm clock up (on exiting idle). Set arm divider
 183          * ratios when not in idle along with the standby duration
 184          * ratios.
 185          */
 186         tmp = PWR_CTRL2_DIV2_UP_EN       | \
 187               PWR_CTRL2_DIV1_UP_EN       | \
 188               PWR_CTRL2_DUR_STANDBY2_VAL | \
 189               PWR_CTRL2_DUR_STANDBY1_VAL | \
 190               PWR_CTRL2_CORE2_UP_RATIO   | \
 191               PWR_CTRL2_CORE1_UP_RATIO;
 192         __raw_writel(tmp, EXYNOS5_PWR_CTRL2);
 193 }
 194
 195 static int __init exynos4_init_cpuidle(void)
 196 {
 197         int cpu_id, ret;
 198         struct cpuidle_device *device;
 199
 200         if (soc_is_exynos5250())
 201                 exynos5_core_down_clk();
 202
 203         if (soc_is_exynos5440())
 204                 exynos4_idle_driver.state_count = 1;
 205
 206         ret = cpuidle_register_driver(&exynos4_idle_driver);
 207         if (ret) {
 208                 printk(KERN_ERR "CPUidle failed to register driver\n");
 209                 return ret;
 210         }
 211
 212         for_each_online_cpu(cpu_id) {
 213                 device = &per_cpu(exynos4_cpuidle_device, cpu_id);
 214                 device->cpu = cpu_id;
 215
 216                 /* Support IDLE only */
 217                 if (cpu_id != 0)
 218                         device->state_count = 1;
 219
 220                 ret = cpuidle_register_device(device);
 221                 if (ret) {
 222                         printk(KERN_ERR "CPUidle register device failed\n");
 223                         return ret;
 224                 }
 225         }
 226
 227         return 0;
 228 }
 229 device_initcall(exynos4_init_cpuidle);