x86/efi: Enforce CONFIG_RELOCATABLE for EFI boot stub
[linux/fpc-iii.git] / arch / arm / mach-imx / mach-cpuimx27.c
blobea50870bda80762d66b7499d5c999bafc558aa3b
1 /*
2 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
4 * Based on pcm038.c which is :
5 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
6 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
20 * MA 02110-1301, USA.
23 #include <linux/i2c.h>
24 #include <linux/io.h>
25 #include <linux/mtd/plat-ram.h>
26 #include <linux/mtd/physmap.h>
27 #include <linux/platform_device.h>
28 #include <linux/serial_8250.h>
29 #include <linux/usb/otg.h>
30 #include <linux/usb/ulpi.h>
32 #include <asm/mach-types.h>
33 #include <asm/mach/arch.h>
34 #include <asm/mach/time.h>
35 #include <asm/mach/map.h>
37 #include "common.h"
38 #include "devices-imx27.h"
39 #include "eukrea-baseboards.h"
40 #include "hardware.h"
41 #include "iomux-mx27.h"
42 #include "ulpi.h"
44 static const int eukrea_cpuimx27_pins[] __initconst = {
45 /* UART1 */
46 PE12_PF_UART1_TXD,
47 PE13_PF_UART1_RXD,
48 PE14_PF_UART1_CTS,
49 PE15_PF_UART1_RTS,
50 /* UART4 */
51 #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
52 PB26_AF_UART4_RTS,
53 PB28_AF_UART4_TXD,
54 PB29_AF_UART4_CTS,
55 PB31_AF_UART4_RXD,
56 #endif
57 /* FEC */
58 PD0_AIN_FEC_TXD0,
59 PD1_AIN_FEC_TXD1,
60 PD2_AIN_FEC_TXD2,
61 PD3_AIN_FEC_TXD3,
62 PD4_AOUT_FEC_RX_ER,
63 PD5_AOUT_FEC_RXD1,
64 PD6_AOUT_FEC_RXD2,
65 PD7_AOUT_FEC_RXD3,
66 PD8_AF_FEC_MDIO,
67 PD9_AIN_FEC_MDC,
68 PD10_AOUT_FEC_CRS,
69 PD11_AOUT_FEC_TX_CLK,
70 PD12_AOUT_FEC_RXD0,
71 PD13_AOUT_FEC_RX_DV,
72 PD14_AOUT_FEC_RX_CLK,
73 PD15_AOUT_FEC_COL,
74 PD16_AIN_FEC_TX_ER,
75 PF23_AIN_FEC_TX_EN,
76 /* I2C1 */
77 PD17_PF_I2C_DATA,
78 PD18_PF_I2C_CLK,
79 /* SDHC2 */
80 #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
81 PB4_PF_SD2_D0,
82 PB5_PF_SD2_D1,
83 PB6_PF_SD2_D2,
84 PB7_PF_SD2_D3,
85 PB8_PF_SD2_CMD,
86 PB9_PF_SD2_CLK,
87 #endif
88 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
89 /* Quad UART's IRQ */
90 GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
91 GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
92 GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
93 GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
94 #endif
95 /* OTG */
96 PC7_PF_USBOTG_DATA5,
97 PC8_PF_USBOTG_DATA6,
98 PC9_PF_USBOTG_DATA0,
99 PC10_PF_USBOTG_DATA2,
100 PC11_PF_USBOTG_DATA1,
101 PC12_PF_USBOTG_DATA4,
102 PC13_PF_USBOTG_DATA3,
103 PE0_PF_USBOTG_NXT,
104 PE1_PF_USBOTG_STP,
105 PE2_PF_USBOTG_DIR,
106 PE24_PF_USBOTG_CLK,
107 PE25_PF_USBOTG_DATA7,
108 /* USBH2 */
109 PA0_PF_USBH2_CLK,
110 PA1_PF_USBH2_DIR,
111 PA2_PF_USBH2_DATA7,
112 PA3_PF_USBH2_NXT,
113 PA4_PF_USBH2_STP,
114 PD19_AF_USBH2_DATA4,
115 PD20_AF_USBH2_DATA3,
116 PD21_AF_USBH2_DATA6,
117 PD22_AF_USBH2_DATA0,
118 PD23_AF_USBH2_DATA2,
119 PD24_AF_USBH2_DATA1,
120 PD26_AF_USBH2_DATA5,
123 static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
124 .width = 2,
127 static struct resource eukrea_cpuimx27_flash_resource = {
128 .start = 0xc0000000,
129 .end = 0xc3ffffff,
130 .flags = IORESOURCE_MEM,
133 static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
134 .name = "physmap-flash",
135 .id = 0,
136 .dev = {
137 .platform_data = &eukrea_cpuimx27_flash_data,
139 .num_resources = 1,
140 .resource = &eukrea_cpuimx27_flash_resource,
143 static const struct imxuart_platform_data uart_pdata __initconst = {
144 .flags = IMXUART_HAVE_RTSCTS,
147 static const struct mxc_nand_platform_data
148 cpuimx27_nand_board_info __initconst = {
149 .width = 1,
150 .hw_ecc = 1,
153 static struct platform_device *platform_devices[] __initdata = {
154 &eukrea_cpuimx27_nor_mtd_device,
157 static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
158 .bitrate = 100000,
161 static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
163 I2C_BOARD_INFO("pcf8563", 0x51),
167 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
168 static struct plat_serial8250_port serial_platform_data[] = {
170 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
171 /* irq number is run-time assigned */
172 .uartclk = 14745600,
173 .regshift = 1,
174 .iotype = UPIO_MEM,
175 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
176 }, {
177 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
178 /* irq number is run-time assigned */
179 .uartclk = 14745600,
180 .regshift = 1,
181 .iotype = UPIO_MEM,
182 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
183 }, {
184 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
185 /* irq number is run-time assigned */
186 .uartclk = 14745600,
187 .regshift = 1,
188 .iotype = UPIO_MEM,
189 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
190 }, {
191 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
192 /* irq number is run-time assigned */
193 .uartclk = 14745600,
194 .regshift = 1,
195 .iotype = UPIO_MEM,
196 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
197 }, {
201 static struct platform_device serial_device = {
202 .name = "serial8250",
203 .id = 0,
204 .dev = {
205 .platform_data = serial_platform_data,
208 #endif
210 static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
212 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
215 static struct mxc_usbh_platform_data otg_pdata __initdata = {
216 .init = eukrea_cpuimx27_otg_init,
217 .portsc = MXC_EHCI_MODE_ULPI,
220 static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
222 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
225 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
226 .init = eukrea_cpuimx27_usbh2_init,
227 .portsc = MXC_EHCI_MODE_ULPI,
230 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
231 .operating_mode = FSL_USB2_DR_DEVICE,
232 .phy_mode = FSL_USB2_PHY_ULPI,
235 static bool otg_mode_host __initdata;
237 static int __init eukrea_cpuimx27_otg_mode(char *options)
239 if (!strcmp(options, "host"))
240 otg_mode_host = true;
241 else if (!strcmp(options, "device"))
242 otg_mode_host = false;
243 else
244 pr_info("otg_mode neither \"host\" nor \"device\". "
245 "Defaulting to device\n");
246 return 1;
248 __setup("otg_mode=", eukrea_cpuimx27_otg_mode);
250 static void __init eukrea_cpuimx27_init(void)
252 imx27_soc_init();
254 mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
255 ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
257 imx27_add_imx_uart0(&uart_pdata);
259 imx27_add_mxc_nand(&cpuimx27_nand_board_info);
261 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
262 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
264 imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
266 imx27_add_fec(NULL);
267 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
268 imx27_add_imx2_wdt();
269 imx27_add_mxc_w1();
271 #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
272 /* SDHC2 can be used for Wifi */
273 imx27_add_mxc_mmc(1, NULL);
274 #endif
275 #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
276 /* in which case UART4 is also used for Bluetooth */
277 imx27_add_imx_uart3(&uart_pdata);
278 #endif
280 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
281 serial_platform_data[0].irq = IMX_GPIO_NR(2, 23);
282 serial_platform_data[1].irq = IMX_GPIO_NR(2, 22);
283 serial_platform_data[2].irq = IMX_GPIO_NR(2, 27);
284 serial_platform_data[3].irq = IMX_GPIO_NR(2, 30);
285 platform_device_register(&serial_device);
286 #endif
288 if (otg_mode_host) {
289 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
290 ULPI_OTG_DRVVBUS_EXT);
291 if (otg_pdata.otg)
292 imx27_add_mxc_ehci_otg(&otg_pdata);
293 } else {
294 imx27_add_fsl_usb2_udc(&otg_device_pdata);
297 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
298 ULPI_OTG_DRVVBUS_EXT);
299 if (usbh2_pdata.otg)
300 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
302 #ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
303 eukrea_mbimx27_baseboard_init();
304 #endif
307 static void __init eukrea_cpuimx27_timer_init(void)
309 mx27_clocks_init(26000000);
312 MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
313 .atag_offset = 0x100,
314 .map_io = mx27_map_io,
315 .init_early = imx27_init_early,
316 .init_irq = mx27_init_irq,
317 .handle_irq = imx27_handle_irq,
318 .init_time = eukrea_cpuimx27_timer_init,
319 .init_machine = eukrea_cpuimx27_init,
320 .restart = mxc_restart,
321 MACHINE_END