x86/efi: Enforce CONFIG_RELOCATABLE for EFI boot stub
[linux/fpc-iii.git] / arch / arm / mach-msm / board-qsd8x50.c
blob5f933bc507838e10cb408e5088b06b706d1894b7
1 /* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
17 #include <linux/gpio.h>
18 #include <linux/kernel.h>
19 #include <linux/irq.h>
20 #include <linux/platform_device.h>
21 #include <linux/delay.h>
22 #include <linux/usb/msm_hsusb.h>
23 #include <linux/err.h>
24 #include <linux/clkdev.h>
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
28 #include <asm/io.h>
29 #include <asm/setup.h>
31 #include <mach/irqs.h>
32 #include <mach/sirc.h>
33 #include <mach/vreg.h>
34 #include <linux/platform_data/mmc-msm_sdcc.h>
36 #include "devices.h"
37 #include "common.h"
39 static const resource_size_t qsd8x50_surf_smc91x_base __initconst = 0x70000300;
40 static const unsigned qsd8x50_surf_smc91x_gpio __initconst = 156;
42 /* Leave smc91x resources empty here, as we'll fill them in
43 * at run-time: they vary from board to board, and the true
44 * configuration won't be known until boot.
46 static struct resource smc91x_resources[] = {
47 [0] = {
48 .flags = IORESOURCE_MEM,
50 [1] = {
51 .flags = IORESOURCE_IRQ,
55 static struct platform_device smc91x_device = {
56 .name = "smc91x",
57 .id = 0,
58 .num_resources = ARRAY_SIZE(smc91x_resources),
59 .resource = smc91x_resources,
62 static int __init msm_init_smc91x(void)
64 if (machine_is_qsd8x50_surf()) {
65 smc91x_resources[0].start = qsd8x50_surf_smc91x_base;
66 smc91x_resources[0].end = qsd8x50_surf_smc91x_base + 0xff;
67 smc91x_resources[1].start =
68 gpio_to_irq(qsd8x50_surf_smc91x_gpio);
69 smc91x_resources[1].end =
70 gpio_to_irq(qsd8x50_surf_smc91x_gpio);
71 platform_device_register(&smc91x_device);
74 return 0;
76 module_init(msm_init_smc91x);
78 static int hsusb_phy_init_seq[] = {
79 0x08, 0x31, /* Increase HS Driver Amplitude */
80 0x20, 0x32, /* Enable and set Pre-Emphasis Depth to 10% */
84 static struct msm_otg_platform_data msm_otg_pdata = {
85 .phy_init_seq = hsusb_phy_init_seq,
86 .mode = USB_PERIPHERAL,
87 .otg_control = OTG_PHY_CONTROL,
90 static struct platform_device *devices[] __initdata = {
91 &msm_clock_8x50,
92 &msm_device_gpio_8x50,
93 &msm_device_uart3,
94 &msm_device_smd,
95 &msm_device_otg,
96 &msm_device_hsusb,
97 &msm_device_hsusb_host,
100 static struct msm_mmc_gpio sdc1_gpio_cfg[] = {
101 {51, "sdc1_dat_3"},
102 {52, "sdc1_dat_2"},
103 {53, "sdc1_dat_1"},
104 {54, "sdc1_dat_0"},
105 {55, "sdc1_cmd"},
106 {56, "sdc1_clk"}
109 static struct vreg *vreg_mmc;
110 static unsigned long vreg_sts;
112 static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
114 int rc = 0;
115 struct platform_device *pdev;
117 pdev = container_of(dv, struct platform_device, dev);
119 if (vdd == 0) {
120 if (!vreg_sts)
121 return 0;
123 clear_bit(pdev->id, &vreg_sts);
125 if (!vreg_sts) {
126 rc = vreg_disable(vreg_mmc);
127 if (rc)
128 pr_err("vreg_mmc disable failed for slot "
129 "%d: %d\n", pdev->id, rc);
131 return 0;
134 if (!vreg_sts) {
135 rc = vreg_set_level(vreg_mmc, 2900);
136 if (rc)
137 pr_err("vreg_mmc set level failed for slot %d: %d\n",
138 pdev->id, rc);
139 rc = vreg_enable(vreg_mmc);
140 if (rc)
141 pr_err("vreg_mmc enable failed for slot %d: %d\n",
142 pdev->id, rc);
144 set_bit(pdev->id, &vreg_sts);
145 return 0;
148 static struct msm_mmc_gpio_data sdc1_gpio = {
149 .gpio = sdc1_gpio_cfg,
150 .size = ARRAY_SIZE(sdc1_gpio_cfg),
153 static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
154 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
155 .translate_vdd = msm_sdcc_setup_power,
156 .gpio_data = &sdc1_gpio,
159 static void __init qsd8x50_init_mmc(void)
161 vreg_mmc = vreg_get(NULL, "gp5");
163 if (IS_ERR(vreg_mmc)) {
164 pr_err("vreg get for vreg_mmc failed (%ld)\n",
165 PTR_ERR(vreg_mmc));
166 return;
169 msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0);
172 static void __init qsd8x50_map_io(void)
174 msm_map_qsd8x50_io();
177 static void __init qsd8x50_init_irq(void)
179 msm_init_irq();
180 msm_init_sirc();
183 static void __init qsd8x50_init(void)
185 msm_device_otg.dev.platform_data = &msm_otg_pdata;
186 msm_device_hsusb.dev.parent = &msm_device_otg.dev;
187 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
188 platform_add_devices(devices, ARRAY_SIZE(devices));
189 qsd8x50_init_mmc();
192 static void __init qsd8x50_init_late(void)
194 smd_debugfs_init();
197 MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
198 .atag_offset = 0x100,
199 .map_io = qsd8x50_map_io,
200 .init_irq = qsd8x50_init_irq,
201 .init_machine = qsd8x50_init,
202 .init_late = qsd8x50_init_late,
203 .init_time = qsd8x50_timer_init,
204 MACHINE_END
206 MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
207 .atag_offset = 0x100,
208 .map_io = qsd8x50_map_io,
209 .init_irq = qsd8x50_init_irq,
210 .init_machine = qsd8x50_init,
211 .init_late = qsd8x50_init_late,
212 .init_time = qsd8x50_timer_init,
213 MACHINE_END