arch/arm/mach-realview/include/mach/board-pb1176.h

   1 /*
   2  * arch/arm/mach-realview/include/mach/board-pb1176.h
   3  *
   4  * Copyright (C) 2008 ARM Limited
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18  * MA 02110-1301, USA.
  19  */
  20
  21 #ifndef __ASM_ARCH_BOARD_PB1176_H
  22 #define __ASM_ARCH_BOARD_PB1176_H
  23
  24 #include <mach/platform.h>
  25
  26 /*
  27  * Peripheral addresses
  28  */
  29 #define REALVIEW_PB1176_UART4_BASE              0x10009000 /* UART 4 */
  30 #define REALVIEW_PB1176_SCTL_BASE               0x10100000 /* System controller */
  31 #define REALVIEW_PB1176_SMC_BASE                0x10111000 /* SMC */
  32 #define REALVIEW_PB1176_DMC_BASE                0x10109000 /* DMC configuration */
  33 #define REALVIEW_PB1176_SDRAM67_BASE            0x70000000 /* SDRAM banks 6 and 7 */
  34 #define REALVIEW_PB1176_FLASH_BASE              0x30000000
  35 #define REALVIEW_PB1176_FLASH_SIZE              SZ_64M
  36 #define REALVIEW_PB1176_SEC_FLASH_BASE          0x3C000000 /* Secure flash */
  37 #define REALVIEW_PB1176_SEC_FLASH_SIZE          SZ_64M
  38
  39 #define REALVIEW_PB1176_TIMER0_1_BASE           0x10104000 /* Timer 0 and 1 */
  40 #define REALVIEW_PB1176_TIMER2_3_BASE           0x10105000 /* Timer 2 and 3 */
  41 #define REALVIEW_PB1176_TIMER4_5_BASE           0x10106000 /* Timer 4 and 5 */
  42 #define REALVIEW_PB1176_WATCHDOG_BASE           0x10107000 /* watchdog interface */
  43 #define REALVIEW_PB1176_RTC_BASE                0x10108000 /* Real Time Clock */
  44 #define REALVIEW_PB1176_GPIO0_BASE              0x1010A000 /* GPIO port 0 */
  45 #define REALVIEW_PB1176_SSP_BASE                0x1010B000 /* Synchronous Serial Port */
  46 #define REALVIEW_PB1176_UART0_BASE              0x1010C000 /* UART 0 */
  47 #define REALVIEW_PB1176_UART1_BASE              0x1010D000 /* UART 1 */
  48 #define REALVIEW_PB1176_UART2_BASE              0x1010E000 /* UART 2 */
  49 #define REALVIEW_PB1176_UART3_BASE              0x1010F000 /* UART 3 */
  50 #define REALVIEW_PB1176_CLCD_BASE               0x10112000 /* CLCD */
  51 #define REALVIEW_PB1176_ETH_BASE                0x3A000000 /* Ethernet */
  52 #define REALVIEW_PB1176_USB_BASE                0x3B000000 /* USB */
  53
  54 /*
  55  * PCI regions
  56  */
  57 #define REALVIEW_PB1176_PCI_BASE                0x60000000 /* PCI self config */
  58 #define REALVIEW_PB1176_PCI_CFG_BASE            0x61000000 /* PCI config */
  59 #define REALVIEW_PB1176_PCI_IO_BASE0            0x62000000 /* PCI IO region */
  60 #define REALVIEW_PB1176_PCI_MEM_BASE0           0x63000000 /* Memory region 1 */
  61 #define REALVIEW_PB1176_PCI_MEM_BASE1           0x64000000 /* Memory region 2 */
  62 #define REALVIEW_PB1176_PCI_MEM_BASE2           0x68000000 /* Memory region 3 */
  63
  64 #define REALVIEW_PB1176_PCI_BASE_SIZE           0x01000000 /* 16MB */
  65 #define REALVIEW_PB1176_PCI_CFG_BASE_SIZE       0x01000000 /* 16MB */
  66 #define REALVIEW_PB1176_PCI_IO_BASE0_SIZE       0x01000000 /* 16MB */
  67 #define REALVIEW_PB1176_PCI_MEM_BASE0_SIZE      0x01000000 /* 16MB */
  68 #define REALVIEW_PB1176_PCI_MEM_BASE1_SIZE      0x04000000 /* 64MB */
  69 #define REALVIEW_PB1176_PCI_MEM_BASE2_SIZE      0x08000000 /* 128MB */
  70
  71 #define REALVIEW_DC1176_GIC_CPU_BASE            0x10120000 /* GIC CPU interface, on devchip */
  72 #define REALVIEW_DC1176_GIC_DIST_BASE           0x10121000 /* GIC distributor, on devchip */
  73 #define REALVIEW_DC1176_ROM_BASE                0x10200000 /* 16KiB NRAM preudo-ROM, on devchip */
  74 #define REALVIEW_PB1176_GIC_CPU_BASE            0x10040000 /* GIC CPU interface, on FPGA */
  75 #define REALVIEW_PB1176_GIC_DIST_BASE           0x10041000 /* GIC distributor, on FPGA */
  76 #define REALVIEW_PB1176_L220_BASE               0x10110000 /* L220 registers */
  77
  78 /*
  79  * Control register SYS_RESETCTL Bit 8 is set to 1 to force a soft reset
  80  */
  81 #define REALVIEW_PB1176_SYS_SOFT_RESET    0x0100
  82
  83 #endif  /* __ASM_ARCH_BOARD_PB1176_H */