1 /* linux/arch/arm/mach-s3c2410/s3c2410.c
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * http://www.simtec.co.uk/products/EB2410ITX/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/gpio.h>
20 #include <linux/clk.h>
21 #include <linux/device.h>
22 #include <linux/syscore_ops.h>
23 #include <linux/serial_core.h>
24 #include <linux/platform_device.h>
25 #include <linux/reboot.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/irq.h>
32 #include <mach/hardware.h>
34 #include <asm/system_misc.h>
36 #include <plat/cpu-freq.h>
38 #include <mach/regs-clock.h>
39 #include <plat/regs-serial.h>
42 #include <plat/devs.h>
43 #include <plat/clock.h>
46 #include <plat/watchdog-reset.h>
48 #include <plat/gpio-core.h>
49 #include <plat/gpio-cfg.h>
50 #include <plat/gpio-cfg-helpers.h>
54 /* Initial IO mappings */
56 static struct map_desc s3c2410_iodesc
[] __initdata
= {
62 /* our uart devices */
64 /* uart registration process */
66 void __init
s3c2410_init_uarts(struct s3c2410_uartcfg
*cfg
, int no
)
68 s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources
, cfg
, no
);
73 * register the standard cpu IO areas, and any passed in from the
74 * machine specific initialisation.
77 void __init
s3c2410_map_io(void)
79 s3c24xx_gpiocfg_default
.set_pull
= s3c24xx_gpio_setpull_1up
;
80 s3c24xx_gpiocfg_default
.get_pull
= s3c24xx_gpio_getpull_1up
;
82 iotable_init(s3c2410_iodesc
, ARRAY_SIZE(s3c2410_iodesc
));
85 void __init_or_cpufreq
s3c2410_setup_clocks(void)
94 xtal_clk
= clk_get(NULL
, "xtal");
95 xtal
= clk_get_rate(xtal_clk
);
98 /* now we've got our machine bits initialised, work out what
101 fclk
= s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON
), xtal
);
103 tmp
= __raw_readl(S3C2410_CLKDIVN
);
105 /* work out clock scalings */
107 hclk
= fclk
/ ((tmp
& S3C2410_CLKDIVN_HDIVN
) ? 2 : 1);
108 pclk
= hclk
/ ((tmp
& S3C2410_CLKDIVN_PDIVN
) ? 2 : 1);
110 /* print brieft summary of clocks, etc */
112 printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
113 print_mhz(fclk
), print_mhz(hclk
), print_mhz(pclk
));
115 /* initialise the clocks here, to allow other things like the
116 * console to use them
119 s3c24xx_setup_clocks(fclk
, hclk
, pclk
);
122 /* fake ARMCLK for use with cpufreq, etc. */
124 static struct clk s3c2410_armclk
= {
130 static struct clk_lookup s3c2410_clk_lookup
[] = {
131 CLKDEV_INIT(NULL
, "clk_uart_baud0", &clk_p
),
132 CLKDEV_INIT(NULL
, "clk_uart_baud1", &s3c24xx_uclk
),
135 void __init
s3c2410_init_clocks(int xtal
)
137 s3c24xx_register_baseclocks(xtal
);
138 s3c2410_setup_clocks();
139 s3c2410_baseclk_add();
140 s3c24xx_register_clock(&s3c2410_armclk
);
141 clkdev_add_table(s3c2410_clk_lookup
, ARRAY_SIZE(s3c2410_clk_lookup
));
142 samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG
);
145 struct bus_type s3c2410_subsys
= {
146 .name
= "s3c2410-core",
147 .dev_name
= "s3c2410-core",
150 /* Note, we would have liked to name this s3c2410-core, but we cannot
151 * register two subsystems with the same name.
153 struct bus_type s3c2410a_subsys
= {
154 .name
= "s3c2410a-core",
155 .dev_name
= "s3c2410a-core",
158 static struct device s3c2410_dev
= {
159 .bus
= &s3c2410_subsys
,
162 /* need to register the subsystem before we actually register the device, and
163 * we also need to ensure that it has been initialised before any of the
164 * drivers even try to use it (even if not on an s3c2410 based system)
165 * as a driver which may support both 2410 and 2440 may try and use it.
168 static int __init
s3c2410_core_init(void)
170 return subsys_system_register(&s3c2410_subsys
, NULL
);
173 core_initcall(s3c2410_core_init
);
175 static int __init
s3c2410a_core_init(void)
177 return subsys_system_register(&s3c2410a_subsys
, NULL
);
180 core_initcall(s3c2410a_core_init
);
182 int __init
s3c2410_init(void)
184 printk("S3C2410: Initialising architecture\n");
187 register_syscore_ops(&s3c2410_pm_syscore_ops
);
188 register_syscore_ops(&s3c24xx_irq_syscore_ops
);
191 return device_register(&s3c2410_dev
);
194 int __init
s3c2410a_init(void)
196 s3c2410_dev
.bus
= &s3c2410a_subsys
;
197 return s3c2410_init();
200 void s3c2410_restart(enum reboot_mode mode
, const char *cmd
)
202 if (mode
== REBOOT_SOFT
) {
208 /* we'll take a jump through zero as a poor second */