arch/arm/mach-s5pv210/pm.c

   1 /* linux/arch/arm/mach-s5pv210/pm.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * S5PV210 - Power Management support
   7  *
   8  * Based on arch/arm/mach-s3c2410/pm.c
   9  * Copyright (c) 2006 Simtec Electronics
  10  *      Ben Dooks <ben@simtec.co.uk>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15 */
  16
  17 #include <linux/init.h>
  18 #include <linux/suspend.h>
  19 #include <linux/syscore_ops.h>
  20 #include <linux/io.h>
  21
  22 #include <plat/cpu.h>
  23 #include <plat/pm.h>
  24
  25 #include <mach/regs-irq.h>
  26 #include <mach/regs-clock.h>
  27
  28 static struct sleep_save s5pv210_core_save[] = {
  29         /* Clock source */
  30         SAVE_ITEM(S5P_CLK_SRC0),
  31         SAVE_ITEM(S5P_CLK_SRC1),
  32         SAVE_ITEM(S5P_CLK_SRC2),
  33         SAVE_ITEM(S5P_CLK_SRC3),
  34         SAVE_ITEM(S5P_CLK_SRC4),
  35         SAVE_ITEM(S5P_CLK_SRC5),
  36         SAVE_ITEM(S5P_CLK_SRC6),
  37
  38         /* Clock source Mask */
  39         SAVE_ITEM(S5P_CLK_SRC_MASK0),
  40         SAVE_ITEM(S5P_CLK_SRC_MASK1),
  41
  42         /* Clock Divider */
  43         SAVE_ITEM(S5P_CLK_DIV0),
  44         SAVE_ITEM(S5P_CLK_DIV1),
  45         SAVE_ITEM(S5P_CLK_DIV2),
  46         SAVE_ITEM(S5P_CLK_DIV3),
  47         SAVE_ITEM(S5P_CLK_DIV4),
  48         SAVE_ITEM(S5P_CLK_DIV5),
  49         SAVE_ITEM(S5P_CLK_DIV6),
  50         SAVE_ITEM(S5P_CLK_DIV7),
  51
  52         /* Clock Main Gate */
  53         SAVE_ITEM(S5P_CLKGATE_MAIN0),
  54         SAVE_ITEM(S5P_CLKGATE_MAIN1),
  55         SAVE_ITEM(S5P_CLKGATE_MAIN2),
  56
  57         /* Clock source Peri Gate */
  58         SAVE_ITEM(S5P_CLKGATE_PERI0),
  59         SAVE_ITEM(S5P_CLKGATE_PERI1),
  60
  61         /* Clock source SCLK Gate */
  62         SAVE_ITEM(S5P_CLKGATE_SCLK0),
  63         SAVE_ITEM(S5P_CLKGATE_SCLK1),
  64
  65         /* Clock IP Clock gate */
  66         SAVE_ITEM(S5P_CLKGATE_IP0),
  67         SAVE_ITEM(S5P_CLKGATE_IP1),
  68         SAVE_ITEM(S5P_CLKGATE_IP2),
  69         SAVE_ITEM(S5P_CLKGATE_IP3),
  70         SAVE_ITEM(S5P_CLKGATE_IP4),
  71
  72         /* Clock Blcok and Bus gate */
  73         SAVE_ITEM(S5P_CLKGATE_BLOCK),
  74         SAVE_ITEM(S5P_CLKGATE_BUS0),
  75
  76         /* Clock ETC */
  77         SAVE_ITEM(S5P_CLK_OUT),
  78         SAVE_ITEM(S5P_MDNIE_SEL),
  79 };
  80
  81 static int s5pv210_cpu_suspend(unsigned long arg)
  82 {
  83         unsigned long tmp;
  84
  85         /* issue the standby signal into the pm unit. Note, we
  86          * issue a write-buffer drain just in case */
  87
  88         tmp = 0;
  89
  90         asm("b 1f\n\t"
  91             ".align 5\n\t"
  92             "1:\n\t"
  93             "mcr p15, 0, %0, c7, c10, 5\n\t"
  94             "mcr p15, 0, %0, c7, c10, 4\n\t"
  95             "wfi" : : "r" (tmp));
  96
  97         pr_info("Failed to suspend the system\n");
  98         return 1; /* Aborting suspend */
  99 }
 100
 101 static void s5pv210_pm_prepare(void)
 102 {
 103         unsigned int tmp;
 104
 105         /* ensure at least INFORM0 has the resume address */
 106         __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
 107
 108         tmp = __raw_readl(S5P_SLEEP_CFG);
 109         tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
 110         __raw_writel(tmp, S5P_SLEEP_CFG);
 111
 112         /* WFI for SLEEP mode configuration by SYSCON */
 113         tmp = __raw_readl(S5P_PWR_CFG);
 114         tmp &= S5P_CFG_WFI_CLEAN;
 115         tmp |= S5P_CFG_WFI_SLEEP;
 116         __raw_writel(tmp, S5P_PWR_CFG);
 117
 118         /* SYSCON interrupt handling disable */
 119         tmp = __raw_readl(S5P_OTHERS);
 120         tmp |= S5P_OTHER_SYSC_INTOFF;
 121         __raw_writel(tmp, S5P_OTHERS);
 122
 123         s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
 124 }
 125
 126 static int s5pv210_pm_add(struct device *dev, struct subsys_interface *sif)
 127 {
 128         pm_cpu_prep = s5pv210_pm_prepare;
 129         pm_cpu_sleep = s5pv210_cpu_suspend;
 130
 131         return 0;
 132 }
 133
 134 static struct subsys_interface s5pv210_pm_interface = {
 135         .name           = "s5pv210_pm",
 136         .subsys         = &s5pv210_subsys,
 137         .add_dev        = s5pv210_pm_add,
 138 };
 139
 140 static __init int s5pv210_pm_drvinit(void)
 141 {
 142         return subsys_interface_register(&s5pv210_pm_interface);
 143 }
 144 arch_initcall(s5pv210_pm_drvinit);
 145
 146 static void s5pv210_pm_resume(void)
 147 {
 148         u32 tmp;
 149
 150         tmp = __raw_readl(S5P_OTHERS);
 151         tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\
 152                 S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);
 153         __raw_writel(tmp , S5P_OTHERS);
 154
 155         s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
 156 }
 157
 158 static struct syscore_ops s5pv210_pm_syscore_ops = {
 159         .resume         = s5pv210_pm_resume,
 160 };
 161
 162 static __init int s5pv210_pm_syscore_init(void)
 163 {
 164         register_syscore_ops(&s5pv210_pm_syscore_ops);
 165         return 0;
 166 }
 167 arch_initcall(s5pv210_pm_syscore_init);