2 * arch/arm/mach-tegra/common.c
4 * Copyright (c) 2013 NVIDIA Corporation. All rights reserved.
5 * Copyright (C) 2010 Google, Inc.
8 * Colin Cross <ccross@android.com>
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 #include <linux/init.h>
23 #include <linux/clk.h>
24 #include <linux/delay.h>
26 #include <linux/reboot.h>
27 #include <linux/irqchip.h>
28 #include <linux/clk-provider.h>
30 #include <asm/hardware/cache-l2x0.h>
45 * Storage for debug-macro.S's state.
47 * This must be in .data not .bss so that it gets initialized each time the
48 * kernel is loaded. The data is declared here rather than debug-macro.S so
49 * that multiple inclusions of debug-macro.S point at the same data.
51 u32 tegra_uart_config
[4] = {
52 /* Debug UART initialization required */
54 /* Debug UART physical address */
56 /* Debug UART virtual address */
58 /* Scratch space for debug macro */
63 void __init
tegra_dt_init_irq(void)
69 tegra_legacy_irq_syscore_init();
73 void tegra_assert_system_reset(enum reboot_mode mode
, const char *cmd
)
75 void __iomem
*reset
= IO_ADDRESS(TEGRA_PMC_BASE
+ 0);
78 reg
= readl_relaxed(reset
);
80 writel_relaxed(reg
, reset
);
83 static void __init
tegra_init_cache(void)
85 #ifdef CONFIG_CACHE_L2X0
86 static const struct of_device_id pl310_ids
[] __initconst
= {
87 { .compatible
= "arm,pl310-cache", },
91 struct device_node
*np
;
93 void __iomem
*p
= IO_ADDRESS(TEGRA_ARM_PERIF_BASE
) + 0x3000;
94 u32 aux_ctrl
, cache_type
;
96 np
= of_find_matching_node(NULL
, pl310_ids
);
100 cache_type
= readl(p
+ L2X0_CACHE_TYPE
);
101 aux_ctrl
= (cache_type
& 0x700) << (17-8);
102 aux_ctrl
|= 0x7C400001;
104 ret
= l2x0_of_init(aux_ctrl
, 0x8200c3fe);
106 l2x0_saved_regs_addr
= virt_to_phys(&l2x0_saved_regs
);
111 void __init
tegra_init_early(void)
113 tegra_cpu_reset_handler_init();
117 tegra_powergate_init();
118 tegra_hotplug_init();
121 void __init
tegra_init_late(void)
123 tegra_init_suspend();
124 tegra_cpuidle_init();
125 tegra_powergate_debugfs_init();