x86/efi: Enforce CONFIG_RELOCATABLE for EFI boot stub
[linux/fpc-iii.git] / arch / arm / plat-samsung / pm.c
blobd0c23010b693a57625d002694528d0cd2fffaaa5
1 /* linux/arch/arm/plat-s3c/pm.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2004-2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C common power management (suspend to ram) support.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/suspend.h>
17 #include <linux/errno.h>
18 #include <linux/delay.h>
19 #include <linux/of.h>
20 #include <linux/serial_core.h>
21 #include <linux/io.h>
23 #include <asm/cacheflush.h>
24 #include <asm/suspend.h>
26 #include <plat/regs-serial.h>
28 #ifdef CONFIG_SAMSUNG_ATAGS
29 #include <mach/hardware.h>
30 #include <mach/map.h>
31 #include <mach/regs-clock.h>
32 #include <mach/regs-irq.h>
33 #include <mach/irqs.h>
34 #endif
36 #include <asm/irq.h>
38 #include <plat/pm.h>
39 #include <mach/pm-core.h>
41 /* for external use */
43 unsigned long s3c_pm_flags;
45 /* Debug code:
47 * This code supports debug output to the low level UARTs for use on
48 * resume before the console layer is available.
51 #ifdef CONFIG_SAMSUNG_PM_DEBUG
52 extern void printascii(const char *);
54 void s3c_pm_dbg(const char *fmt, ...)
56 va_list va;
57 char buff[256];
59 va_start(va, fmt);
60 vsnprintf(buff, sizeof(buff), fmt, va);
61 va_end(va);
63 printascii(buff);
66 static inline void s3c_pm_debug_init(void)
68 /* restart uart clocks so we can use them to output */
69 s3c_pm_debug_init_uart();
72 #else
73 #define s3c_pm_debug_init() do { } while(0)
75 #endif /* CONFIG_SAMSUNG_PM_DEBUG */
77 /* Save the UART configurations if we are configured for debug. */
79 unsigned char pm_uart_udivslot;
81 #ifdef CONFIG_SAMSUNG_PM_DEBUG
83 static struct pm_uart_save uart_save;
85 static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
87 void __iomem *regs = S3C_VA_UARTx(uart);
89 save->ulcon = __raw_readl(regs + S3C2410_ULCON);
90 save->ucon = __raw_readl(regs + S3C2410_UCON);
91 save->ufcon = __raw_readl(regs + S3C2410_UFCON);
92 save->umcon = __raw_readl(regs + S3C2410_UMCON);
93 save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
95 if (pm_uart_udivslot)
96 save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
98 S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
99 uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
102 static void s3c_pm_save_uarts(void)
104 s3c_pm_save_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
107 static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
109 void __iomem *regs = S3C_VA_UARTx(uart);
111 s3c_pm_arch_update_uart(regs, save);
113 __raw_writel(save->ulcon, regs + S3C2410_ULCON);
114 __raw_writel(save->ucon, regs + S3C2410_UCON);
115 __raw_writel(save->ufcon, regs + S3C2410_UFCON);
116 __raw_writel(save->umcon, regs + S3C2410_UMCON);
117 __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
119 if (pm_uart_udivslot)
120 __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
123 static void s3c_pm_restore_uarts(void)
125 s3c_pm_restore_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
127 #else
128 static void s3c_pm_save_uarts(void) { }
129 static void s3c_pm_restore_uarts(void) { }
130 #endif
132 /* The IRQ ext-int code goes here, it is too small to currently bother
133 * with its own file. */
135 unsigned long s3c_irqwake_intmask = 0xffffffffL;
136 unsigned long s3c_irqwake_eintmask = 0xffffffffL;
138 int s3c_irqext_wake(struct irq_data *data, unsigned int state)
140 unsigned long bit = 1L << IRQ_EINT_BIT(data->irq);
142 if (!(s3c_irqwake_eintallow & bit))
143 return -ENOENT;
145 printk(KERN_INFO "wake %s for irq %d\n",
146 state ? "enabled" : "disabled", data->irq);
148 if (!state)
149 s3c_irqwake_eintmask |= bit;
150 else
151 s3c_irqwake_eintmask &= ~bit;
153 return 0;
156 /* helper functions to save and restore register state */
159 * s3c_pm_do_save() - save a set of registers for restoration on resume.
160 * @ptr: Pointer to an array of registers.
161 * @count: Size of the ptr array.
163 * Run through the list of registers given, saving their contents in the
164 * array for later restoration when we wakeup.
166 void s3c_pm_do_save(struct sleep_save *ptr, int count)
168 for (; count > 0; count--, ptr++) {
169 ptr->val = __raw_readl(ptr->reg);
170 S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
175 * s3c_pm_do_restore() - restore register values from the save list.
176 * @ptr: Pointer to an array of registers.
177 * @count: Size of the ptr array.
179 * Restore the register values saved from s3c_pm_do_save().
181 * Note, we do not use S3C_PMDBG() in here, as the system may not have
182 * restore the UARTs state yet
185 void s3c_pm_do_restore(struct sleep_save *ptr, int count)
187 for (; count > 0; count--, ptr++) {
188 printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
189 ptr->reg, ptr->val, __raw_readl(ptr->reg));
191 __raw_writel(ptr->val, ptr->reg);
196 * s3c_pm_do_restore_core() - early restore register values from save list.
198 * This is similar to s3c_pm_do_restore() except we try and minimise the
199 * side effects of the function in case registers that hardware might need
200 * to work has been restored.
202 * WARNING: Do not put any debug in here that may effect memory or use
203 * peripherals, as things may be changing!
206 void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
208 for (; count > 0; count--, ptr++)
209 __raw_writel(ptr->val, ptr->reg);
212 /* s3c2410_pm_show_resume_irqs
214 * print any IRQs asserted at resume time (ie, we woke from)
216 static void __maybe_unused s3c_pm_show_resume_irqs(int start,
217 unsigned long which,
218 unsigned long mask)
220 int i;
222 which &= ~mask;
224 for (i = 0; i <= 31; i++) {
225 if (which & (1L<<i)) {
226 S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
232 void (*pm_cpu_prep)(void);
233 int (*pm_cpu_sleep)(unsigned long);
235 #define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
237 /* s3c_pm_enter
239 * central control for sleep/resume process
242 static int s3c_pm_enter(suspend_state_t state)
244 int ret;
245 /* ensure the debug is initialised (if enabled) */
247 s3c_pm_debug_init();
249 S3C_PMDBG("%s(%d)\n", __func__, state);
251 if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
252 printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
253 return -EINVAL;
256 /* check if we have anything to wake-up with... bad things seem
257 * to happen if you suspend with no wakeup (system will often
258 * require a full power-cycle)
261 if (!of_have_populated_dt() &&
262 !any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
263 !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
264 printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
265 printk(KERN_ERR "%s: Aborting sleep\n", __func__);
266 return -EINVAL;
269 /* save all necessary core registers not covered by the drivers */
271 if (!of_have_populated_dt()) {
272 samsung_pm_save_gpios();
273 samsung_pm_saved_gpios();
276 s3c_pm_save_uarts();
277 s3c_pm_save_core();
279 /* set the irq configuration for wake */
281 s3c_pm_configure_extint();
283 S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
284 s3c_irqwake_intmask, s3c_irqwake_eintmask);
286 s3c_pm_arch_prepare_irqs();
288 /* call cpu specific preparation */
290 pm_cpu_prep();
292 /* flush cache back to ram */
294 flush_cache_all();
296 s3c_pm_check_store();
298 /* send the cpu to sleep... */
300 s3c_pm_arch_stop_clocks();
302 /* this will also act as our return point from when
303 * we resume as it saves its own register state and restores it
304 * during the resume. */
306 ret = cpu_suspend(0, pm_cpu_sleep);
307 if (ret)
308 return ret;
310 /* restore the system state */
312 s3c_pm_restore_core();
313 s3c_pm_restore_uarts();
315 if (!of_have_populated_dt()) {
316 samsung_pm_restore_gpios();
317 s3c_pm_restored_gpios();
320 s3c_pm_debug_init();
322 /* check what irq (if any) restored the system */
324 s3c_pm_arch_show_resume_irqs();
326 S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
328 /* LEDs should now be 1110 */
329 s3c_pm_debug_smdkled(1 << 1, 0);
331 s3c_pm_check_restore();
333 /* ok, let's return from sleep */
335 S3C_PMDBG("S3C PM Resume (post-restore)\n");
336 return 0;
339 static int s3c_pm_prepare(void)
341 /* prepare check area if configured */
343 s3c_pm_check_prepare();
344 return 0;
347 static void s3c_pm_finish(void)
349 s3c_pm_check_cleanup();
352 static const struct platform_suspend_ops s3c_pm_ops = {
353 .enter = s3c_pm_enter,
354 .prepare = s3c_pm_prepare,
355 .finish = s3c_pm_finish,
356 .valid = suspend_valid_only_mem,
359 /* s3c_pm_init
361 * Attach the power management functions. This should be called
362 * from the board specific initialisation if the board supports
363 * it.
366 int __init s3c_pm_init(void)
368 printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");
370 suspend_set_ops(&s3c_pm_ops);
371 return 0;