x86/efi: Enforce CONFIG_RELOCATABLE for EFI boot stub
[linux/fpc-iii.git] / arch / blackfin / mach-bf527 / boards / ad7160eval.c
blob1e7be62fccb60f7e216dc3120f0752f3387c14a5
1 /*
2 * Copyright 2004-20010 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
7 */
9 #include <linux/device.h>
10 #include <linux/export.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #include <linux/i2c.h>
18 #include <linux/irq.h>
19 #include <linux/interrupt.h>
20 #include <linux/usb/musb.h>
21 #include <linux/leds.h>
22 #include <linux/input.h>
23 #include <asm/dma.h>
24 #include <asm/bfin5xx_spi.h>
25 #include <asm/reboot.h>
26 #include <asm/nand.h>
27 #include <asm/portmux.h>
28 #include <asm/dpmc.h>
32 * Name the Board for the /proc/cpuinfo
34 const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
37 * Driver needs to know address, irq and flag pin.
40 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
41 static struct resource musb_resources[] = {
42 [0] = {
43 .start = 0xffc03800,
44 .end = 0xffc03cff,
45 .flags = IORESOURCE_MEM,
47 [1] = { /* general IRQ */
48 .start = IRQ_USB_INT0,
49 .end = IRQ_USB_INT0,
50 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
52 [2] = { /* DMA IRQ */
53 .start = IRQ_USB_DMA,
54 .end = IRQ_USB_DMA,
55 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
59 static struct musb_hdrc_config musb_config = {
60 .multipoint = 0,
61 .dyn_fifo = 0,
62 .soft_con = 1,
63 .dma = 1,
64 .num_eps = 8,
65 .dma_channels = 8,
66 .gpio_vrsel = GPIO_PG13,
67 /* Some custom boards need to be active low, just set it to "0"
68 * if it is the case.
70 .gpio_vrsel_active = 1,
71 .clkin = 24, /* musb CLKIN in MHZ */
74 static struct musb_hdrc_platform_data musb_plat = {
75 #if defined(CONFIG_USB_MUSB_OTG)
76 .mode = MUSB_OTG,
77 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
78 .mode = MUSB_HOST,
79 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
80 .mode = MUSB_PERIPHERAL,
81 #endif
82 .config = &musb_config,
85 static u64 musb_dmamask = ~(u32)0;
87 static struct platform_device musb_device = {
88 .name = "musb-blackfin",
89 .id = 0,
90 .dev = {
91 .dma_mask = &musb_dmamask,
92 .coherent_dma_mask = 0xffffffff,
93 .platform_data = &musb_plat,
95 .num_resources = ARRAY_SIZE(musb_resources),
96 .resource = musb_resources,
98 #endif
100 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
101 static struct resource bf52x_ra158z_resources[] = {
103 .start = IRQ_PPI_ERROR,
104 .end = IRQ_PPI_ERROR,
105 .flags = IORESOURCE_IRQ,
109 static struct platform_device bf52x_ra158z_device = {
110 .name = "bfin-ra158z",
111 .id = -1,
112 .num_resources = ARRAY_SIZE(bf52x_ra158z_resources),
113 .resource = bf52x_ra158z_resources,
115 #endif
117 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
118 static struct mtd_partition ad7160eval_partitions[] = {
120 .name = "bootloader(nor)",
121 .size = 0x40000,
122 .offset = 0,
123 }, {
124 .name = "linux kernel(nor)",
125 .size = 0x1C0000,
126 .offset = MTDPART_OFS_APPEND,
127 }, {
128 .name = "file system(nor)",
129 .size = MTDPART_SIZ_FULL,
130 .offset = MTDPART_OFS_APPEND,
134 static struct physmap_flash_data ad7160eval_flash_data = {
135 .width = 2,
136 .parts = ad7160eval_partitions,
137 .nr_parts = ARRAY_SIZE(ad7160eval_partitions),
140 static struct resource ad7160eval_flash_resource = {
141 .start = 0x20000000,
142 .end = 0x203fffff,
143 .flags = IORESOURCE_MEM,
146 static struct platform_device ad7160eval_flash_device = {
147 .name = "physmap-flash",
148 .id = 0,
149 .dev = {
150 .platform_data = &ad7160eval_flash_data,
152 .num_resources = 1,
153 .resource = &ad7160eval_flash_resource,
155 #endif
157 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
158 static struct mtd_partition partition_info[] = {
160 .name = "linux kernel(nand)",
161 .offset = 0,
162 .size = 4 * 1024 * 1024,
165 .name = "file system(nand)",
166 .offset = MTDPART_OFS_APPEND,
167 .size = MTDPART_SIZ_FULL,
171 static struct bf5xx_nand_platform bf5xx_nand_platform = {
172 .data_width = NFC_NWIDTH_8,
173 .partitions = partition_info,
174 .nr_partitions = ARRAY_SIZE(partition_info),
175 .rd_dly = 3,
176 .wr_dly = 3,
179 static struct resource bf5xx_nand_resources[] = {
181 .start = NFC_CTL,
182 .end = NFC_DATA_RD + 2,
183 .flags = IORESOURCE_MEM,
186 .start = CH_NFC,
187 .end = CH_NFC,
188 .flags = IORESOURCE_IRQ,
192 static struct platform_device bf5xx_nand_device = {
193 .name = "bf5xx-nand",
194 .id = 0,
195 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
196 .resource = bf5xx_nand_resources,
197 .dev = {
198 .platform_data = &bf5xx_nand_platform,
201 #endif
203 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
204 static struct platform_device rtc_device = {
205 .name = "rtc-bfin",
206 .id = -1,
208 #endif
210 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
211 #include <linux/bfin_mac.h>
212 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
214 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
216 .addr = 1,
217 .irq = IRQ_MAC_PHYINT,
221 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
222 .phydev_number = 1,
223 .phydev_data = bfin_phydev_data,
224 .phy_mode = PHY_INTERFACE_MODE_RMII,
225 .mac_peripherals = bfin_mac_peripherals,
228 static struct platform_device bfin_mii_bus = {
229 .name = "bfin_mii_bus",
230 .dev = {
231 .platform_data = &bfin_mii_bus_data,
235 static struct platform_device bfin_mac_device = {
236 .name = "bfin_mac",
237 .dev = {
238 .platform_data = &bfin_mii_bus,
241 #endif
244 #if defined(CONFIG_MTD_M25P80) \
245 || defined(CONFIG_MTD_M25P80_MODULE)
246 static struct mtd_partition bfin_spi_flash_partitions[] = {
248 .name = "bootloader(spi)",
249 .size = 0x00040000,
250 .offset = 0,
251 .mask_flags = MTD_CAP_ROM
252 }, {
253 .name = "linux kernel(spi)",
254 .size = MTDPART_SIZ_FULL,
255 .offset = MTDPART_OFS_APPEND,
259 static struct flash_platform_data bfin_spi_flash_data = {
260 .name = "m25p80",
261 .parts = bfin_spi_flash_partitions,
262 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
263 .type = "m25p16",
266 /* SPI flash chip (m25p64) */
267 static struct bfin5xx_spi_chip spi_flash_chip_info = {
268 .enable_dma = 0, /* use dma transfer with this chip*/
270 #endif
272 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
273 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
274 .enable_dma = 0,
276 #endif
278 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
279 static struct platform_device bfin_i2s = {
280 .name = "bfin-i2s",
281 .id = CONFIG_SND_BF5XX_SPORT_NUM,
282 /* TODO: add platform data here */
284 #endif
286 static struct spi_board_info bfin_spi_board_info[] __initdata = {
287 #if defined(CONFIG_MTD_M25P80) \
288 || defined(CONFIG_MTD_M25P80_MODULE)
290 /* the modalias must be the same as spi device driver name */
291 .modalias = "m25p80", /* Name of spi_driver for this device */
292 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
293 .bus_num = 0, /* Framework bus number */
294 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
295 .platform_data = &bfin_spi_flash_data,
296 .controller_data = &spi_flash_chip_info,
297 .mode = SPI_MODE_3,
299 #endif
300 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
301 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
303 .modalias = "ad183x",
304 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
305 .bus_num = 0,
306 .chip_select = 4,
308 #endif
309 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
311 .modalias = "mmc_spi",
312 .max_speed_hz = 30000000, /* max spi clock (SCK) speed in HZ */
313 .bus_num = 0,
314 .chip_select = GPIO_PH3 + MAX_CTRL_CS,
315 .controller_data = &mmc_spi_chip_info,
316 .mode = SPI_MODE_3,
318 #endif
319 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
321 .modalias = "spidev",
322 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
323 .bus_num = 0,
324 .chip_select = 1,
326 #endif
329 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
330 /* SPI controller data */
331 static struct bfin5xx_spi_master bfin_spi0_info = {
332 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
333 .enable_dma = 1, /* master has the ability to do dma transfer */
334 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
337 /* SPI (0) */
338 static struct resource bfin_spi0_resource[] = {
339 [0] = {
340 .start = SPI0_REGBASE,
341 .end = SPI0_REGBASE + 0xFF,
342 .flags = IORESOURCE_MEM,
344 [1] = {
345 .start = CH_SPI,
346 .end = CH_SPI,
347 .flags = IORESOURCE_DMA,
349 [2] = {
350 .start = IRQ_SPI,
351 .end = IRQ_SPI,
352 .flags = IORESOURCE_IRQ,
356 static struct platform_device bfin_spi0_device = {
357 .name = "bfin-spi",
358 .id = 0, /* Bus number */
359 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
360 .resource = bfin_spi0_resource,
361 .dev = {
362 .platform_data = &bfin_spi0_info, /* Passed to driver */
365 #endif /* spi master and devices */
367 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
368 #ifdef CONFIG_SERIAL_BFIN_UART0
369 static struct resource bfin_uart0_resources[] = {
371 .start = UART0_THR,
372 .end = UART0_GCTL+2,
373 .flags = IORESOURCE_MEM,
376 .start = IRQ_UART0_TX,
377 .end = IRQ_UART0_TX,
378 .flags = IORESOURCE_IRQ,
381 .start = IRQ_UART0_RX,
382 .end = IRQ_UART0_RX,
383 .flags = IORESOURCE_IRQ,
386 .start = IRQ_UART0_ERROR,
387 .end = IRQ_UART0_ERROR,
388 .flags = IORESOURCE_IRQ,
391 .start = CH_UART0_TX,
392 .end = CH_UART0_TX,
393 .flags = IORESOURCE_DMA,
396 .start = CH_UART0_RX,
397 .end = CH_UART0_RX,
398 .flags = IORESOURCE_DMA,
402 static unsigned short bfin_uart0_peripherals[] = {
403 P_UART0_TX, P_UART0_RX, 0
406 static struct platform_device bfin_uart0_device = {
407 .name = "bfin-uart",
408 .id = 0,
409 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
410 .resource = bfin_uart0_resources,
411 .dev = {
412 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
415 #endif
416 #ifdef CONFIG_SERIAL_BFIN_UART1
417 static struct resource bfin_uart1_resources[] = {
419 .start = UART1_THR,
420 .end = UART1_GCTL+2,
421 .flags = IORESOURCE_MEM,
424 .start = IRQ_UART1_TX,
425 .end = IRQ_UART1_TX,
426 .flags = IORESOURCE_IRQ,
429 .start = IRQ_UART1_RX,
430 .end = IRQ_UART1_RX,
431 .flags = IORESOURCE_IRQ,
434 .start = IRQ_UART1_ERROR,
435 .end = IRQ_UART1_ERROR,
436 .flags = IORESOURCE_IRQ,
439 .start = CH_UART1_TX,
440 .end = CH_UART1_TX,
441 .flags = IORESOURCE_DMA,
444 .start = CH_UART1_RX,
445 .end = CH_UART1_RX,
446 .flags = IORESOURCE_DMA,
448 #ifdef CONFIG_BFIN_UART1_CTSRTS
449 { /* CTS pin */
450 .start = GPIO_PF9,
451 .end = GPIO_PF9,
452 .flags = IORESOURCE_IO,
454 { /* RTS pin */
455 .start = GPIO_PF10,
456 .end = GPIO_PF10,
457 .flags = IORESOURCE_IO,
459 #endif
462 static unsigned short bfin_uart1_peripherals[] = {
463 P_UART1_TX, P_UART1_RX, 0
466 static struct platform_device bfin_uart1_device = {
467 .name = "bfin-uart",
468 .id = 1,
469 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
470 .resource = bfin_uart1_resources,
471 .dev = {
472 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
475 #endif
476 #endif
478 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
479 #ifdef CONFIG_BFIN_SIR0
480 static struct resource bfin_sir0_resources[] = {
482 .start = 0xFFC00400,
483 .end = 0xFFC004FF,
484 .flags = IORESOURCE_MEM,
487 .start = IRQ_UART0_RX,
488 .end = IRQ_UART0_RX+1,
489 .flags = IORESOURCE_IRQ,
492 .start = CH_UART0_RX,
493 .end = CH_UART0_RX+1,
494 .flags = IORESOURCE_DMA,
498 static struct platform_device bfin_sir0_device = {
499 .name = "bfin_sir",
500 .id = 0,
501 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
502 .resource = bfin_sir0_resources,
504 #endif
505 #ifdef CONFIG_BFIN_SIR1
506 static struct resource bfin_sir1_resources[] = {
508 .start = 0xFFC02000,
509 .end = 0xFFC020FF,
510 .flags = IORESOURCE_MEM,
513 .start = IRQ_UART1_RX,
514 .end = IRQ_UART1_RX+1,
515 .flags = IORESOURCE_IRQ,
518 .start = CH_UART1_RX,
519 .end = CH_UART1_RX+1,
520 .flags = IORESOURCE_DMA,
524 static struct platform_device bfin_sir1_device = {
525 .name = "bfin_sir",
526 .id = 1,
527 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
528 .resource = bfin_sir1_resources,
530 #endif
531 #endif
533 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
534 #include <linux/input/ad7160.h>
535 static const struct ad7160_platform_data bfin_ad7160_ts_info = {
536 .sensor_x_res = 854,
537 .sensor_y_res = 480,
538 .pressure = 100,
539 .filter_coef = 3,
540 .coord_pref = AD7160_ORIG_TOP_LEFT,
541 .first_touch_window = 5,
542 .move_window = 3,
543 .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
544 AD7160_EMIT_ABS_MT_PRESSURE |
545 AD7160_TRACKING_ID_ASCENDING,
546 .finger_act_ctrl = 0x64,
547 .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
548 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
549 AD7160_HAPTIC_SLOT_B(60) |
550 AD7160_HAPTIC_SLOT_B_LVL_LOW,
552 .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
553 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
554 AD7160_HAPTIC_SLOT_B(80) |
555 AD7160_HAPTIC_SLOT_B_LVL_LOW |
556 AD7160_HAPTIC_SLOT_C(120) |
557 AD7160_HAPTIC_SLOT_C_LVL_HIGH |
558 AD7160_HAPTIC_SLOT_D(30) |
559 AD7160_HAPTIC_SLOT_D_LVL_LOW,
561 #endif
563 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
564 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
566 static struct resource bfin_twi0_resource[] = {
567 [0] = {
568 .start = TWI0_REGBASE,
569 .end = TWI0_REGBASE,
570 .flags = IORESOURCE_MEM,
572 [1] = {
573 .start = IRQ_TWI,
574 .end = IRQ_TWI,
575 .flags = IORESOURCE_IRQ,
579 static struct platform_device i2c_bfin_twi_device = {
580 .name = "i2c-bfin-twi",
581 .id = 0,
582 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
583 .resource = bfin_twi0_resource,
584 .dev = {
585 .platform_data = &bfin_twi0_pins,
588 #endif
590 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
591 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
593 I2C_BOARD_INFO("ad7160", 0x33),
594 .irq = IRQ_PH1,
595 .platform_data = (void *)&bfin_ad7160_ts_info,
597 #endif
600 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
601 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
602 static struct resource bfin_sport0_uart_resources[] = {
604 .start = SPORT0_TCR1,
605 .end = SPORT0_MRCS3+4,
606 .flags = IORESOURCE_MEM,
609 .start = IRQ_SPORT0_RX,
610 .end = IRQ_SPORT0_RX+1,
611 .flags = IORESOURCE_IRQ,
614 .start = IRQ_SPORT0_ERROR,
615 .end = IRQ_SPORT0_ERROR,
616 .flags = IORESOURCE_IRQ,
620 static unsigned short bfin_sport0_peripherals[] = {
621 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
622 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
625 static struct platform_device bfin_sport0_uart_device = {
626 .name = "bfin-sport-uart",
627 .id = 0,
628 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
629 .resource = bfin_sport0_uart_resources,
630 .dev = {
631 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
634 #endif
635 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
636 static struct resource bfin_sport1_uart_resources[] = {
638 .start = SPORT1_TCR1,
639 .end = SPORT1_MRCS3+4,
640 .flags = IORESOURCE_MEM,
643 .start = IRQ_SPORT1_RX,
644 .end = IRQ_SPORT1_RX+1,
645 .flags = IORESOURCE_IRQ,
648 .start = IRQ_SPORT1_ERROR,
649 .end = IRQ_SPORT1_ERROR,
650 .flags = IORESOURCE_IRQ,
654 static unsigned short bfin_sport1_peripherals[] = {
655 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
656 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
659 static struct platform_device bfin_sport1_uart_device = {
660 .name = "bfin-sport-uart",
661 .id = 1,
662 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
663 .resource = bfin_sport1_uart_resources,
664 .dev = {
665 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
668 #endif
669 #endif
671 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
672 #include <asm/bfin_rotary.h>
674 static struct bfin_rotary_platform_data bfin_rotary_data = {
675 /*.rotary_up_key = KEY_UP,*/
676 /*.rotary_down_key = KEY_DOWN,*/
677 .rotary_rel_code = REL_WHEEL,
678 .rotary_button_key = KEY_ENTER,
679 .debounce = 10, /* 0..17 */
680 .mode = ROT_QUAD_ENC | ROT_DEBE,
681 .pm_wakeup = 1,
684 static struct resource bfin_rotary_resources[] = {
686 .start = IRQ_CNT,
687 .end = IRQ_CNT,
688 .flags = IORESOURCE_IRQ,
692 static struct platform_device bfin_rotary_device = {
693 .name = "bfin-rotary",
694 .id = -1,
695 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
696 .resource = bfin_rotary_resources,
697 .dev = {
698 .platform_data = &bfin_rotary_data,
701 #endif
703 static const unsigned int cclk_vlev_datasheet[] = {
704 VRPAIR(VLEV_100, 400000000),
705 VRPAIR(VLEV_105, 426000000),
706 VRPAIR(VLEV_110, 500000000),
707 VRPAIR(VLEV_115, 533000000),
708 VRPAIR(VLEV_120, 600000000),
711 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
712 .tuple_tab = cclk_vlev_datasheet,
713 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
714 .vr_settling_time = 25 /* us */,
717 static struct platform_device bfin_dpmc = {
718 .name = "bfin dpmc",
719 .dev = {
720 .platform_data = &bfin_dmpc_vreg_data,
724 static struct platform_device *stamp_devices[] __initdata = {
726 &bfin_dpmc,
728 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
729 &bf5xx_nand_device,
730 #endif
732 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
733 &rtc_device,
734 #endif
736 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
737 &musb_device,
738 #endif
740 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
741 &bfin_mii_bus,
742 &bfin_mac_device,
743 #endif
745 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
746 &bfin_spi0_device,
747 #endif
749 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
750 #ifdef CONFIG_SERIAL_BFIN_UART0
751 &bfin_uart0_device,
752 #endif
753 #ifdef CONFIG_SERIAL_BFIN_UART1
754 &bfin_uart1_device,
755 #endif
756 #endif
758 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
759 &bf52x_ra158z_device,
760 #endif
762 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
763 #ifdef CONFIG_BFIN_SIR0
764 &bfin_sir0_device,
765 #endif
766 #ifdef CONFIG_BFIN_SIR1
767 &bfin_sir1_device,
768 #endif
769 #endif
771 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
772 &i2c_bfin_twi_device,
773 #endif
775 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
776 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
777 &bfin_sport0_uart_device,
778 #endif
779 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
780 &bfin_sport1_uart_device,
781 #endif
782 #endif
784 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
785 &bfin_rotary_device,
786 #endif
788 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
789 &ad7160eval_flash_device,
790 #endif
792 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
793 &bfin_i2s,
794 #endif
797 static int __init ad7160eval_init(void)
799 printk(KERN_INFO "%s(): registering device resources\n", __func__);
800 i2c_register_board_info(0, bfin_i2c_board_info,
801 ARRAY_SIZE(bfin_i2c_board_info));
802 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
803 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
804 return 0;
807 arch_initcall(ad7160eval_init);
809 static struct platform_device *ad7160eval_early_devices[] __initdata = {
810 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
811 #ifdef CONFIG_SERIAL_BFIN_UART0
812 &bfin_uart0_device,
813 #endif
814 #ifdef CONFIG_SERIAL_BFIN_UART1
815 &bfin_uart1_device,
816 #endif
817 #endif
819 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
820 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
821 &bfin_sport0_uart_device,
822 #endif
823 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
824 &bfin_sport1_uart_device,
825 #endif
826 #endif
829 void __init native_machine_early_platform_add_devices(void)
831 printk(KERN_INFO "register early platform devices\n");
832 early_platform_add_devices(ad7160eval_early_devices,
833 ARRAY_SIZE(ad7160eval_early_devices));
836 void native_machine_restart(char *cmd)
838 /* workaround reboot hang when booting from SPI */
839 if ((bfin_read_SYSCR() & 0x7) == 0x3)
840 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
843 int bfin_get_ether_addr(char *addr)
845 /* the MAC is stored in OTP memory page 0xDF */
846 u32 ret;
847 u64 otp_mac;
848 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
850 ret = otp_read(0xDF, 0x00, &otp_mac);
851 if (!(ret & 0x1)) {
852 char *otp_mac_p = (char *)&otp_mac;
853 for (ret = 0; ret < 6; ++ret)
854 addr[ret] = otp_mac_p[5 - ret];
856 return 0;
858 EXPORT_SYMBOL(bfin_get_ether_addr);