arch/blackfin/mach-bf527/boards/tll6527m.c

   1 /* File:        arch/blackfin/mach-bf527/boards/tll6527m.c
   2  * Based on:    arch/blackfin/mach-bf527/boards/ezkit.c
   3  * Author:      Ashish Gupta
   4  *
   5  * Copyright: 2010 - The Learning Labs Inc.
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/export.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/mtd/mtd.h>
  14 #include <linux/mtd/partitions.h>
  15 #include <linux/mtd/physmap.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/spi/flash.h>
  18 #include <linux/i2c.h>
  19 #include <linux/irq.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/usb/musb.h>
  22 #include <linux/leds.h>
  23 #include <linux/input.h>
  24 #include <asm/dma.h>
  25 #include <asm/bfin5xx_spi.h>
  26 #include <asm/reboot.h>
  27 #include <asm/nand.h>
  28 #include <asm/portmux.h>
  29 #include <asm/dpmc.h>
  30
  31 #if defined(CONFIG_TOUCHSCREEN_AD7879) \
  32         || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  33 #include <linux/spi/ad7879.h>
  34 #define LCD_BACKLIGHT_GPIO 0x40
  35 /* TLL6527M uses TLL7UIQ35 / ADI LCD EZ Extender. AD7879 AUX GPIO is used for
  36  * LCD Backlight Enable
  37  */
  38 #endif
  39
  40 /*
  41  * Name the Board for the /proc/cpuinfo
  42  */
  43 const char bfin_board_name[] = "TLL6527M";
  44 /*
  45  *  Driver needs to know address, irq and flag pin.
  46  */
  47
  48 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  49 static struct resource musb_resources[] = {
  50         [0] = {
  51                 .start  = 0xffc03800,
  52                 .end    = 0xffc03cff,
  53                 .flags  = IORESOURCE_MEM,
  54         },
  55         [1] = { /* general IRQ */
  56                 .start  = IRQ_USB_INT0,
  57                 .end    = IRQ_USB_INT0,
  58                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  59         },
  60         [2] = { /* DMA IRQ */
  61                 .start  = IRQ_USB_DMA,
  62                 .end    = IRQ_USB_DMA,
  63                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  64         },
  65 };
  66
  67 static struct musb_hdrc_config musb_config = {
  68         .multipoint     = 0,
  69         .dyn_fifo       = 0,
  70         .soft_con       = 1,
  71         .dma            = 1,
  72         .num_eps        = 8,
  73         .dma_channels   = 8,
  74         /*.gpio_vrsel   = GPIO_PG13,*/
  75         /* Some custom boards need to be active low, just set it to "0"
  76          * if it is the case.
  77          */
  78         .gpio_vrsel_active      = 1,
  79 };
  80
  81 static struct musb_hdrc_platform_data musb_plat = {
  82 #if defined(CONFIG_USB_MUSB_OTG)
  83         .mode           = MUSB_OTG,
  84 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  85         .mode           = MUSB_HOST,
  86 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  87         .mode           = MUSB_PERIPHERAL,
  88 #endif
  89         .config         = &musb_config,
  90 };
  91
  92 static u64 musb_dmamask = ~(u32)0;
  93
  94 static struct platform_device musb_device = {
  95         .name           = "musb-blackfin",
  96         .id             = 0,
  97         .dev = {
  98                 .dma_mask               = &musb_dmamask,
  99                 .coherent_dma_mask      = 0xffffffff,
 100                 .platform_data          = &musb_plat,
 101         },
 102         .num_resources  = ARRAY_SIZE(musb_resources),
 103         .resource       = musb_resources,
 104 };
 105 #endif
 106
 107 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 108 #include <asm/bfin-lq035q1.h>
 109
 110 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 111         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 112         .ppi_mode = USE_RGB565_16_BIT_PPI,
 113         .use_bl = 1,
 114         .gpio_bl = LCD_BACKLIGHT_GPIO,
 115 };
 116
 117 static struct resource bfin_lq035q1_resources[] = {
 118         {
 119                 .start = IRQ_PPI_ERROR,
 120                 .end = IRQ_PPI_ERROR,
 121                 .flags = IORESOURCE_IRQ,
 122         },
 123 };
 124
 125 static struct platform_device bfin_lq035q1_device = {
 126         .name           = "bfin-lq035q1",
 127         .id             = -1,
 128         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 129         .resource       = bfin_lq035q1_resources,
 130         .dev            = {
 131                 .platform_data = &bfin_lq035q1_data,
 132         },
 133 };
 134 #endif
 135
 136 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 137 static struct mtd_partition tll6527m_partitions[] = {
 138         {
 139                 .name       = "bootloader(nor)",
 140                 .size       = 0xA0000,
 141                 .offset     = 0,
 142         }, {
 143                 .name       = "linux kernel(nor)",
 144                 .size       = 0xD00000,
 145                 .offset     = MTDPART_OFS_APPEND,
 146         }, {
 147                 .name       = "file system(nor)",
 148                 .size       = MTDPART_SIZ_FULL,
 149                 .offset     = MTDPART_OFS_APPEND,
 150         }
 151 };
 152
 153 static struct physmap_flash_data tll6527m_flash_data = {
 154         .width      = 2,
 155         .parts      = tll6527m_partitions,
 156         .nr_parts   = ARRAY_SIZE(tll6527m_partitions),
 157 };
 158
 159 static unsigned tll6527m_flash_gpios[] = { GPIO_PG11, GPIO_PH11, GPIO_PH12 };
 160
 161 static struct resource tll6527m_flash_resource[] = {
 162         {
 163                 .name  = "cfi_probe",
 164                 .start = 0x20000000,
 165                 .end   = 0x201fffff,
 166                 .flags = IORESOURCE_MEM,
 167         }, {
 168                 .start = (unsigned long)tll6527m_flash_gpios,
 169                 .end   = ARRAY_SIZE(tll6527m_flash_gpios),
 170                 .flags = IORESOURCE_IRQ,
 171         }
 172 };
 173
 174 static struct platform_device tll6527m_flash_device = {
 175         .name          = "gpio-addr-flash",
 176         .id            = 0,
 177         .dev = {
 178                 .platform_data = &tll6527m_flash_data,
 179         },
 180         .num_resources = ARRAY_SIZE(tll6527m_flash_resource),
 181         .resource      = tll6527m_flash_resource,
 182 };
 183 #endif
 184
 185 #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
 186 /* An SN74LVC138A 3:8 decoder chip has been used to generate 7 augmented
 187  * outputs used as SPI CS lines for all SPI SLAVE devices on TLL6527v1-0.
 188  * EXP_GPIO_SPISEL_BASE is the base number for the expanded outputs being
 189  * used as SPI CS lines, this should be > MAX_BLACKFIN_GPIOS
 190  */
 191 #include <linux/gpio-decoder.h>
 192 #define EXP_GPIO_SPISEL_BASE 0x64
 193 static unsigned gpio_addr_inputs[] = {
 194         GPIO_PG1, GPIO_PH9, GPIO_PH10
 195 };
 196
 197 static struct gpio_decoder_platform_data spi_decoded_cs = {
 198         .base           = EXP_GPIO_SPISEL_BASE,
 199         .input_addrs    = gpio_addr_inputs,
 200         .nr_input_addrs = ARRAY_SIZE(gpio_addr_inputs),
 201         .default_output = 0,
 202 /*      .default_output = (1 << ARRAY_SIZE(gpio_addr_inputs)) - 1 */
 203 };
 204
 205 static struct platform_device spi_decoded_gpio = {
 206         .name   = "gpio-decoder",
 207         .id     = 0,
 208         .dev    = {
 209                 .platform_data = &spi_decoded_cs,
 210         },
 211 };
 212
 213 #else
 214 #define EXP_GPIO_SPISEL_BASE 0x0
 215
 216 #endif
 217
 218 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
 219 #include <linux/input/adxl34x.h>
 220 static const struct adxl34x_platform_data adxl345_info = {
 221         .x_axis_offset = 0,
 222         .y_axis_offset = 0,
 223         .z_axis_offset = 0,
 224         .tap_threshold = 0x31,
 225         .tap_duration = 0x10,
 226         .tap_latency = 0x60,
 227         .tap_window = 0xF0,
 228         .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
 229         .act_axis_control = 0xFF,
 230         .activity_threshold = 5,
 231         .inactivity_threshold = 2,
 232         .inactivity_time = 2,
 233         .free_fall_threshold = 0x7,
 234         .free_fall_time = 0x20,
 235         .data_rate = 0x8,
 236         .data_range = ADXL_FULL_RES,
 237
 238         .ev_type = EV_ABS,
 239         .ev_code_x = ABS_X,             /* EV_REL */
 240         .ev_code_y = ABS_Y,             /* EV_REL */
 241         .ev_code_z = ABS_Z,             /* EV_REL */
 242
 243         .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
 244
 245 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 246         .ev_code_act_inactivity = KEY_A,        /* EV_KEY */
 247         .use_int2 = 1,
 248         .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
 249         .fifo_mode = ADXL_FIFO_STREAM,
 250 };
 251 #endif
 252
 253 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 254 static struct platform_device rtc_device = {
 255         .name = "rtc-bfin",
 256         .id   = -1,
 257 };
 258 #endif
 259
 260 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 261 #include <linux/bfin_mac.h>
 262 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 263
 264 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 265         {
 266                 .addr = 1,
 267                 .irq = IRQ_MAC_PHYINT,
 268         },
 269 };
 270
 271 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 272         .phydev_number = 1,
 273         .phydev_data = bfin_phydev_data,
 274         .phy_mode = PHY_INTERFACE_MODE_RMII,
 275         .mac_peripherals = bfin_mac_peripherals,
 276 };
 277
 278 static struct platform_device bfin_mii_bus = {
 279         .name = "bfin_mii_bus",
 280         .dev = {
 281                 .platform_data = &bfin_mii_bus_data,
 282         }
 283 };
 284
 285 static struct platform_device bfin_mac_device = {
 286         .name = "bfin_mac",
 287         .dev = {
 288                 .platform_data = &bfin_mii_bus,
 289         }
 290 };
 291 #endif
 292
 293 #if defined(CONFIG_MTD_M25P80) \
 294         || defined(CONFIG_MTD_M25P80_MODULE)
 295 static struct mtd_partition bfin_spi_flash_partitions[] = {
 296         {
 297                 .name = "bootloader(spi)",
 298                 .size = 0x00040000,
 299                 .offset = 0,
 300                 .mask_flags = MTD_CAP_ROM
 301         }, {
 302                 .name = "linux kernel(spi)",
 303                 .size = MTDPART_SIZ_FULL,
 304                 .offset = MTDPART_OFS_APPEND,
 305         }
 306 };
 307
 308 static struct flash_platform_data bfin_spi_flash_data = {
 309         .name = "m25p80",
 310         .parts = bfin_spi_flash_partitions,
 311         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 312         .type = "m25p16",
 313 };
 314
 315 /* SPI flash chip (m25p64) */
 316 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 317         .enable_dma = 0,         /* use dma transfer with this chip*/
 318 };
 319 #endif
 320
 321 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 322 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 323         .enable_dma = 0,
 324 };
 325 #endif
 326
 327 #if defined(CONFIG_TOUCHSCREEN_AD7879) \
 328         || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 329 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 330         .model                  = 7879, /* Model = AD7879 */
 331         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 332         .pressure_max           = 10000,
 333         .pressure_min           = 0,
 334         .first_conversion_delay = 3,
 335                                 /* wait 512us before do a first conversion */
 336         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 337         .median                 = 2,    /* do 8 measurements */
 338         .averaging              = 1,
 339                                 /* take the average of 4 middle samples */
 340         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 341         .gpio_export            = 1,    /* configure AUX as GPIO output*/
 342         .gpio_base              = LCD_BACKLIGHT_GPIO,
 343 };
 344 #endif
 345
 346 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 347 static struct platform_device bfin_i2s = {
 348         .name = "bfin-i2s",
 349         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 350         /* TODO: add platform data here */
 351 };
 352 #endif
 353
 354 #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
 355 #include <linux/spi/mcp23s08.h>
 356 static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
 357         .chip[0].is_present = true,
 358         .base = 0x30,
 359 };
 360 static const struct mcp23s08_platform_data bfin_mcp23s08_usr_gpio_info = {
 361         .chip[2].is_present = true,
 362         .base = 0x38,
 363 };
 364 #endif
 365
 366 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 367 #if defined(CONFIG_MTD_M25P80) \
 368         || defined(CONFIG_MTD_M25P80_MODULE)
 369         {
 370                 /* the modalias must be the same as spi device driver name */
 371                 .modalias = "m25p80", /* Name of spi_driver for this device */
 372                 .max_speed_hz = 25000000,
 373                                 /* max spi clock (SCK) speed in HZ */
 374                 .bus_num = 0, /* Framework bus number */
 375                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
 376                 /* Can be connected to TLL6527M GPIO connector */
 377                 /* Either SPI_ADC or M25P80 FLASH can be installed at a time */
 378                 .platform_data = &bfin_spi_flash_data,
 379                 .controller_data = &spi_flash_chip_info,
 380                 .mode = SPI_MODE_3,
 381         },
 382 #endif
 383
 384 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 385         {
 386                 .modalias = "mmc_spi",
 387 /*
 388  * TLL6527M V1.0 does not support SD Card at SPI Clock > 10 MHz due to
 389  * SPI buffer limitations
 390  */
 391                 .max_speed_hz = 10000000,
 392                                         /* max spi clock (SCK) speed in HZ */
 393                 .bus_num = 0,
 394                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x05 + MAX_CTRL_CS,
 395                 .controller_data = &mmc_spi_chip_info,
 396                 .mode = SPI_MODE_0,
 397         },
 398 #endif
 399 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
 400         || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 401         {
 402                 .modalias = "ad7879",
 403                 .platform_data = &bfin_ad7879_ts_info,
 404                 .irq = IRQ_PH14,
 405                 .max_speed_hz = 5000000,
 406                                         /* max spi clock (SCK) speed in HZ */
 407                 .bus_num = 0,
 408                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
 409                 .mode = SPI_CPHA | SPI_CPOL,
 410         },
 411 #endif
 412 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 413         {
 414                 .modalias = "spidev",
 415                 .max_speed_hz = 10000000,
 416                 /* TLL6527Mv1-0 supports max spi clock (SCK) speed = 10 MHz */
 417                 .bus_num = 0,
 418                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
 419                 .mode = SPI_CPHA | SPI_CPOL,
 420         },
 421 #endif
 422 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 423         {
 424                 .modalias = "bfin-lq035q1-spi",
 425                 .max_speed_hz = 20000000,
 426                 .bus_num = 0,
 427                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
 428                 .mode = SPI_CPHA | SPI_CPOL,
 429         },
 430 #endif
 431 #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
 432         {
 433                 .modalias = "mcp23s08",
 434                 .platform_data = &bfin_mcp23s08_sys_gpio_info,
 435                 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
 436                 .bus_num = 0,
 437                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
 438                 .mode = SPI_CPHA | SPI_CPOL,
 439         },
 440         {
 441                 .modalias = "mcp23s08",
 442                 .platform_data = &bfin_mcp23s08_usr_gpio_info,
 443                 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
 444                 .bus_num = 0,
 445                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
 446                 .mode = SPI_CPHA | SPI_CPOL,
 447         },
 448 #endif
 449 };
 450
 451 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 452 /* SPI controller data */
 453 static struct bfin5xx_spi_master bfin_spi0_info = {
 454         .num_chipselect = EXP_GPIO_SPISEL_BASE + 8 + MAX_CTRL_CS,
 455         /* EXP_GPIO_SPISEL_BASE will be > MAX_BLACKFIN_GPIOS */
 456         .enable_dma = 1,  /* master has the ability to do dma transfer */
 457         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 458 };
 459
 460 /* SPI (0) */
 461 static struct resource bfin_spi0_resource[] = {
 462         [0] = {
 463                 .start = SPI0_REGBASE,
 464                 .end   = SPI0_REGBASE + 0xFF,
 465                 .flags = IORESOURCE_MEM,
 466                 },
 467         [1] = {
 468                 .start = CH_SPI,
 469                 .end   = CH_SPI,
 470                 .flags = IORESOURCE_DMA,
 471         },
 472         [2] = {
 473                 .start = IRQ_SPI,
 474                 .end   = IRQ_SPI,
 475                 .flags = IORESOURCE_IRQ,
 476         },
 477 };
 478
 479 static struct platform_device bfin_spi0_device = {
 480         .name = "bfin-spi",
 481         .id = 0, /* Bus number */
 482         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 483         .resource = bfin_spi0_resource,
 484         .dev = {
 485                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 486         },
 487 };
 488 #endif  /* spi master and devices */
 489
 490 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 491 #ifdef CONFIG_SERIAL_BFIN_UART0
 492 static struct resource bfin_uart0_resources[] = {
 493         {
 494                 .start = UART0_THR,
 495                 .end = UART0_GCTL+2,
 496                 .flags = IORESOURCE_MEM,
 497         },
 498         {
 499                 .start = IRQ_UART0_TX,
 500                 .end = IRQ_UART0_TX,
 501                 .flags = IORESOURCE_IRQ,
 502         },
 503         {
 504                 .start = IRQ_UART0_RX,
 505                 .end = IRQ_UART0_RX,
 506                 .flags = IORESOURCE_IRQ,
 507         },
 508         {
 509                 .start = IRQ_UART0_ERROR,
 510                 .end = IRQ_UART0_ERROR,
 511                 .flags = IORESOURCE_IRQ,
 512         },
 513         {
 514                 .start = CH_UART0_TX,
 515                 .end = CH_UART0_TX,
 516                 .flags = IORESOURCE_DMA,
 517         },
 518         {
 519                 .start = CH_UART0_RX,
 520                 .end = CH_UART0_RX,
 521                 .flags = IORESOURCE_DMA,
 522         },
 523 };
 524
 525 static unsigned short bfin_uart0_peripherals[] = {
 526         P_UART0_TX, P_UART0_RX, 0
 527 };
 528
 529 static struct platform_device bfin_uart0_device = {
 530         .name = "bfin-uart",
 531         .id = 0,
 532         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 533         .resource = bfin_uart0_resources,
 534         .dev = {
 535                 .platform_data = &bfin_uart0_peripherals,
 536                                         /* Passed to driver */
 537         },
 538 };
 539 #endif
 540 #ifdef CONFIG_SERIAL_BFIN_UART1
 541 static struct resource bfin_uart1_resources[] = {
 542         {
 543                 .start = UART1_THR,
 544                 .end = UART1_GCTL+2,
 545                 .flags = IORESOURCE_MEM,
 546         },
 547         {
 548                 .start = IRQ_UART1_TX,
 549                 .end = IRQ_UART1_TX,
 550                 .flags = IORESOURCE_IRQ,
 551         },
 552         {
 553                 .start = IRQ_UART1_RX,
 554                 .end = IRQ_UART1_RX,
 555                 .flags = IORESOURCE_IRQ,
 556         },
 557         {
 558                 .start = IRQ_UART1_ERROR,
 559                 .end = IRQ_UART1_ERROR,
 560                 .flags = IORESOURCE_IRQ,
 561         },
 562         {
 563                 .start = CH_UART1_TX,
 564                 .end = CH_UART1_TX,
 565                 .flags = IORESOURCE_DMA,
 566         },
 567         {
 568                 .start = CH_UART1_RX,
 569                 .end = CH_UART1_RX,
 570                 .flags = IORESOURCE_DMA,
 571         },
 572 #ifdef CONFIG_BFIN_UART1_CTSRTS
 573         {       /* CTS pin */
 574                 .start = GPIO_PF9,
 575                 .end = GPIO_PF9,
 576                 .flags = IORESOURCE_IO,
 577         },
 578         {       /* RTS pin */
 579                 .start = GPIO_PF10,
 580                 .end = GPIO_PF10,
 581                 .flags = IORESOURCE_IO,
 582         },
 583 #endif
 584 };
 585
 586 static unsigned short bfin_uart1_peripherals[] = {
 587         P_UART1_TX, P_UART1_RX, 0
 588 };
 589
 590 static struct platform_device bfin_uart1_device = {
 591         .name = "bfin-uart",
 592         .id = 1,
 593         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 594         .resource = bfin_uart1_resources,
 595         .dev = {
 596                 .platform_data = &bfin_uart1_peripherals,
 597                                                 /* Passed to driver */
 598         },
 599 };
 600 #endif
 601 #endif
 602
 603 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 604 #ifdef CONFIG_BFIN_SIR0
 605 static struct resource bfin_sir0_resources[] = {
 606         {
 607                 .start = 0xFFC00400,
 608                 .end = 0xFFC004FF,
 609                 .flags = IORESOURCE_MEM,
 610         },
 611         {
 612                 .start = IRQ_UART0_RX,
 613                 .end = IRQ_UART0_RX+1,
 614                 .flags = IORESOURCE_IRQ,
 615         },
 616         {
 617                 .start = CH_UART0_RX,
 618                 .end = CH_UART0_RX+1,
 619                 .flags = IORESOURCE_DMA,
 620         },
 621 };
 622
 623 static struct platform_device bfin_sir0_device = {
 624         .name = "bfin_sir",
 625         .id = 0,
 626         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 627         .resource = bfin_sir0_resources,
 628 };
 629 #endif
 630 #ifdef CONFIG_BFIN_SIR1
 631 static struct resource bfin_sir1_resources[] = {
 632         {
 633                 .start = 0xFFC02000,
 634                 .end = 0xFFC020FF,
 635                 .flags = IORESOURCE_MEM,
 636         },
 637         {
 638                 .start = IRQ_UART1_RX,
 639                 .end = IRQ_UART1_RX+1,
 640                 .flags = IORESOURCE_IRQ,
 641         },
 642         {
 643                 .start = CH_UART1_RX,
 644                 .end = CH_UART1_RX+1,
 645                 .flags = IORESOURCE_DMA,
 646         },
 647 };
 648
 649 static struct platform_device bfin_sir1_device = {
 650         .name = "bfin_sir",
 651         .id = 1,
 652         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 653         .resource = bfin_sir1_resources,
 654 };
 655 #endif
 656 #endif
 657
 658 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 659 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
 660
 661 static struct resource bfin_twi0_resource[] = {
 662         [0] = {
 663                 .start = TWI0_REGBASE,
 664                 .end   = TWI0_REGBASE,
 665                 .flags = IORESOURCE_MEM,
 666         },
 667         [1] = {
 668                 .start = IRQ_TWI,
 669                 .end   = IRQ_TWI,
 670                 .flags = IORESOURCE_IRQ,
 671         },
 672 };
 673
 674 static struct platform_device i2c_bfin_twi_device = {
 675         .name = "i2c-bfin-twi",
 676         .id = 0,
 677         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 678         .resource = bfin_twi0_resource,
 679         .dev = {
 680                 .platform_data = &bfin_twi0_pins,
 681         },
 682 };
 683 #endif
 684
 685 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 686 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 687         {
 688                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 689         },
 690 #endif
 691
 692 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
 693         {
 694                 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
 695         },
 696 #endif
 697 #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) \
 698         || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
 699         {
 700                 I2C_BOARD_INFO("ad7879", 0x2C),
 701                 .irq = IRQ_PH14,
 702                 .platform_data = (void *)&bfin_ad7879_ts_info,
 703         },
 704 #endif
 705 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
 706         {
 707                 I2C_BOARD_INFO("ssm2602", 0x1b),
 708         },
 709 #endif
 710         {
 711                 I2C_BOARD_INFO("adm1192", 0x2e),
 712         },
 713
 714         {
 715                 I2C_BOARD_INFO("ltc3576", 0x09),
 716         },
 717 #if defined(CONFIG_INPUT_ADXL34X_I2C) \
 718         || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
 719         {
 720                 I2C_BOARD_INFO("adxl34x", 0x53),
 721                 .irq = IRQ_PH13,
 722                 .platform_data = (void *)&adxl345_info,
 723         },
 724 #endif
 725 };
 726
 727 #if defined(CONFIG_SERIAL_BFIN_SPORT) \
 728         || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 729 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 730 static struct resource bfin_sport0_uart_resources[] = {
 731         {
 732                 .start = SPORT0_TCR1,
 733                 .end = SPORT0_MRCS3+4,
 734                 .flags = IORESOURCE_MEM,
 735         },
 736         {
 737                 .start = IRQ_SPORT0_RX,
 738                 .end = IRQ_SPORT0_RX+1,
 739                 .flags = IORESOURCE_IRQ,
 740         },
 741         {
 742                 .start = IRQ_SPORT0_ERROR,
 743                 .end = IRQ_SPORT0_ERROR,
 744                 .flags = IORESOURCE_IRQ,
 745         },
 746 };
 747
 748 static unsigned short bfin_sport0_peripherals[] = {
 749         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 750         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 751 };
 752
 753 static struct platform_device bfin_sport0_uart_device = {
 754         .name = "bfin-sport-uart",
 755         .id = 0,
 756         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 757         .resource = bfin_sport0_uart_resources,
 758         .dev = {
 759                 .platform_data = &bfin_sport0_peripherals,
 760                 /* Passed to driver */
 761         },
 762 };
 763 #endif
 764 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 765 static struct resource bfin_sport1_uart_resources[] = {
 766         {
 767                 .start = SPORT1_TCR1,
 768                 .end = SPORT1_MRCS3+4,
 769                 .flags = IORESOURCE_MEM,
 770         },
 771         {
 772                 .start = IRQ_SPORT1_RX,
 773                 .end = IRQ_SPORT1_RX+1,
 774                 .flags = IORESOURCE_IRQ,
 775         },
 776         {
 777                 .start = IRQ_SPORT1_ERROR,
 778                 .end = IRQ_SPORT1_ERROR,
 779                 .flags = IORESOURCE_IRQ,
 780         },
 781 };
 782
 783 static unsigned short bfin_sport1_peripherals[] = {
 784         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 785         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 786 };
 787
 788 static struct platform_device bfin_sport1_uart_device = {
 789         .name = "bfin-sport-uart",
 790         .id = 1,
 791         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 792         .resource = bfin_sport1_uart_resources,
 793         .dev = {
 794                 .platform_data = &bfin_sport1_peripherals,
 795                 /* Passed to driver */
 796         },
 797 };
 798 #endif
 799 #endif
 800
 801 static const unsigned int cclk_vlev_datasheet[] = {
 802         VRPAIR(VLEV_100, 400000000),
 803         VRPAIR(VLEV_105, 426000000),
 804         VRPAIR(VLEV_110, 500000000),
 805         VRPAIR(VLEV_115, 533000000),
 806         VRPAIR(VLEV_120, 600000000),
 807 };
 808
 809 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 810         .tuple_tab = cclk_vlev_datasheet,
 811         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 812         .vr_settling_time = 25 /* us */,
 813 };
 814
 815 static struct platform_device bfin_dpmc = {
 816         .name = "bfin dpmc",
 817         .dev = {
 818                 .platform_data = &bfin_dmpc_vreg_data,
 819         },
 820 };
 821
 822 static struct platform_device *tll6527m_devices[] __initdata = {
 823
 824         &bfin_dpmc,
 825
 826 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 827         &rtc_device,
 828 #endif
 829
 830 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 831         &musb_device,
 832 #endif
 833
 834 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 835         &bfin_mii_bus,
 836         &bfin_mac_device,
 837 #endif
 838
 839 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 840         &bfin_spi0_device,
 841 #endif
 842
 843 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 844         &bfin_lq035q1_device,
 845 #endif
 846
 847 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 848 #ifdef CONFIG_SERIAL_BFIN_UART0
 849         &bfin_uart0_device,
 850 #endif
 851 #ifdef CONFIG_SERIAL_BFIN_UART1
 852         &bfin_uart1_device,
 853 #endif
 854 #endif
 855
 856 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 857 #ifdef CONFIG_BFIN_SIR0
 858         &bfin_sir0_device,
 859 #endif
 860 #ifdef CONFIG_BFIN_SIR1
 861         &bfin_sir1_device,
 862 #endif
 863 #endif
 864
 865 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 866         &i2c_bfin_twi_device,
 867 #endif
 868
 869 #if defined(CONFIG_SERIAL_BFIN_SPORT) \
 870         || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 871 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 872         &bfin_sport0_uart_device,
 873 #endif
 874 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 875         &bfin_sport1_uart_device,
 876 #endif
 877 #endif
 878
 879 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 880         &tll6527m_flash_device,
 881 #endif
 882
 883 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 884         &bfin_i2s,
 885 #endif
 886
 887 #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
 888         &spi_decoded_gpio,
 889 #endif
 890 };
 891
 892 static int __init tll6527m_init(void)
 893 {
 894         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 895         i2c_register_board_info(0, bfin_i2c_board_info,
 896                                 ARRAY_SIZE(bfin_i2c_board_info));
 897         platform_add_devices(tll6527m_devices, ARRAY_SIZE(tll6527m_devices));
 898         spi_register_board_info(bfin_spi_board_info,
 899                                 ARRAY_SIZE(bfin_spi_board_info));
 900         return 0;
 901 }
 902
 903 arch_initcall(tll6527m_init);
 904
 905 static struct platform_device *tll6527m_early_devices[] __initdata = {
 906 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 907 #ifdef CONFIG_SERIAL_BFIN_UART0
 908         &bfin_uart0_device,
 909 #endif
 910 #ifdef CONFIG_SERIAL_BFIN_UART1
 911         &bfin_uart1_device,
 912 #endif
 913 #endif
 914
 915 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 916 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 917         &bfin_sport0_uart_device,
 918 #endif
 919 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 920         &bfin_sport1_uart_device,
 921 #endif
 922 #endif
 923 };
 924
 925 void __init native_machine_early_platform_add_devices(void)
 926 {
 927         printk(KERN_INFO "register early platform devices\n");
 928         early_platform_add_devices(tll6527m_early_devices,
 929                 ARRAY_SIZE(tll6527m_early_devices));
 930 }
 931
 932 void native_machine_restart(char *cmd)
 933 {
 934         /* workaround reboot hang when booting from SPI */
 935         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 936                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 937 }
 938
 939 int bfin_get_ether_addr(char *addr)
 940 {
 941         /* the MAC is stored in OTP memory page 0xDF */
 942         u32 ret;
 943         u64 otp_mac;
 944         u32 (*otp_read)(u32 page, u32 flags,
 945                         u64 *page_content) = (void *)0xEF00001A;
 946
 947         ret = otp_read(0xDF, 0x00, &otp_mac);
 948         if (!(ret & 0x1)) {
 949                 char *otp_mac_p = (char *)&otp_mac;
 950                 for (ret = 0; ret < 6; ++ret)
 951                         addr[ret] = otp_mac_p[5 - ret];
 952         }
 953         return 0;
 954 }
 955 EXPORT_SYMBOL(bfin_get_ether_addr);