arch/mips/powertv/asic/asic-calliope.c

   1 /*
   2  * Locations of devices in the Calliope ASIC.
   3  *
   4  * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19  *
  20  * Author:       Ken Eppinett
  21  *               David Schleef <ds@schleef.org>
  22  *
  23  * Description:  Defines the platform resources for the SA settop.
  24  */
  25
  26 #include <linux/init.h>
  27 #include <asm/mach-powertv/asic.h>
  28
  29 #define CALLIOPE_ADDR(x)        (CALLIOPE_IO_BASE + (x))
  30
  31 const struct register_map calliope_register_map __initconst = {
  32         .eic_slow0_strt_add = {.phys = CALLIOPE_ADDR(0x800000)},
  33         .eic_cfg_bits = {.phys = CALLIOPE_ADDR(0x800038)},
  34         .eic_ready_status = {.phys = CALLIOPE_ADDR(0x80004c)},
  35
  36         .chipver3 = {.phys = CALLIOPE_ADDR(0xA00800)},
  37         .chipver2 = {.phys = CALLIOPE_ADDR(0xA00804)},
  38         .chipver1 = {.phys = CALLIOPE_ADDR(0xA00808)},
  39         .chipver0 = {.phys = CALLIOPE_ADDR(0xA0080c)},
  40
  41         /* The registers of IRBlaster */
  42         .uart1_intstat = {.phys = CALLIOPE_ADDR(0xA01800)},
  43         .uart1_inten = {.phys = CALLIOPE_ADDR(0xA01804)},
  44         .uart1_config1 = {.phys = CALLIOPE_ADDR(0xA01808)},
  45         .uart1_config2 = {.phys = CALLIOPE_ADDR(0xA0180C)},
  46         .uart1_divisorhi = {.phys = CALLIOPE_ADDR(0xA01810)},
  47         .uart1_divisorlo = {.phys = CALLIOPE_ADDR(0xA01814)},
  48         .uart1_data = {.phys = CALLIOPE_ADDR(0xA01818)},
  49         .uart1_status = {.phys = CALLIOPE_ADDR(0xA0181C)},
  50
  51         .int_stat_3 = {.phys = CALLIOPE_ADDR(0xA02800)},
  52         .int_stat_2 = {.phys = CALLIOPE_ADDR(0xA02804)},
  53         .int_stat_1 = {.phys = CALLIOPE_ADDR(0xA02808)},
  54         .int_stat_0 = {.phys = CALLIOPE_ADDR(0xA0280c)},
  55         .int_config = {.phys = CALLIOPE_ADDR(0xA02810)},
  56         .int_int_scan = {.phys = CALLIOPE_ADDR(0xA02818)},
  57         .ien_int_3 = {.phys = CALLIOPE_ADDR(0xA02830)},
  58         .ien_int_2 = {.phys = CALLIOPE_ADDR(0xA02834)},
  59         .ien_int_1 = {.phys = CALLIOPE_ADDR(0xA02838)},
  60         .ien_int_0 = {.phys = CALLIOPE_ADDR(0xA0283c)},
  61         .int_level_3_3 = {.phys = CALLIOPE_ADDR(0xA02880)},
  62         .int_level_3_2 = {.phys = CALLIOPE_ADDR(0xA02884)},
  63         .int_level_3_1 = {.phys = CALLIOPE_ADDR(0xA02888)},
  64         .int_level_3_0 = {.phys = CALLIOPE_ADDR(0xA0288c)},
  65         .int_level_2_3 = {.phys = CALLIOPE_ADDR(0xA02890)},
  66         .int_level_2_2 = {.phys = CALLIOPE_ADDR(0xA02894)},
  67         .int_level_2_1 = {.phys = CALLIOPE_ADDR(0xA02898)},
  68         .int_level_2_0 = {.phys = CALLIOPE_ADDR(0xA0289c)},
  69         .int_level_1_3 = {.phys = CALLIOPE_ADDR(0xA028a0)},
  70         .int_level_1_2 = {.phys = CALLIOPE_ADDR(0xA028a4)},
  71         .int_level_1_1 = {.phys = CALLIOPE_ADDR(0xA028a8)},
  72         .int_level_1_0 = {.phys = CALLIOPE_ADDR(0xA028ac)},
  73         .int_level_0_3 = {.phys = CALLIOPE_ADDR(0xA028b0)},
  74         .int_level_0_2 = {.phys = CALLIOPE_ADDR(0xA028b4)},
  75         .int_level_0_1 = {.phys = CALLIOPE_ADDR(0xA028b8)},
  76         .int_level_0_0 = {.phys = CALLIOPE_ADDR(0xA028bc)},
  77         .int_docsis_en = {.phys = CALLIOPE_ADDR(0xA028F4)},
  78
  79         .mips_pll_setup = {.phys = CALLIOPE_ADDR(0x980000)},
  80         .fs432x4b4_usb_ctl = {.phys = CALLIOPE_ADDR(0x980030)},
  81         .test_bus = {.phys = CALLIOPE_ADDR(0x9800CC)},
  82         .crt_spare = {.phys = CALLIOPE_ADDR(0x9800d4)},
  83         .usb2_ohci_int_mask = {.phys = CALLIOPE_ADDR(0x9A000c)},
  84         .usb2_strap = {.phys = CALLIOPE_ADDR(0x9A0014)},
  85         .ehci_hcapbase = {.phys = CALLIOPE_ADDR(0x9BFE00)},
  86         .ohci_hc_revision = {.phys = CALLIOPE_ADDR(0x9BFC00)},
  87         .bcm1_bs_lmi_steer = {.phys = CALLIOPE_ADDR(0x9E0004)},
  88         .usb2_control = {.phys = CALLIOPE_ADDR(0x9E0054)},
  89         .usb2_stbus_obc = {.phys = CALLIOPE_ADDR(0x9BFF00)},
  90         .usb2_stbus_mess_size = {.phys = CALLIOPE_ADDR(0x9BFF04)},
  91         .usb2_stbus_chunk_size = {.phys = CALLIOPE_ADDR(0x9BFF08)},
  92
  93         .pcie_regs = {.phys = 0x000000},        /* -doesn't exist- */
  94         .tim_ch = {.phys = CALLIOPE_ADDR(0xA02C10)},
  95         .tim_cl = {.phys = CALLIOPE_ADDR(0xA02C14)},
  96         .gpio_dout = {.phys = CALLIOPE_ADDR(0xA02c20)},
  97         .gpio_din = {.phys = CALLIOPE_ADDR(0xA02c24)},
  98         .gpio_dir = {.phys = CALLIOPE_ADDR(0xA02c2C)},
  99         .watchdog = {.phys = CALLIOPE_ADDR(0xA02c30)},
 100         .front_panel = {.phys = 0x000000},      /* -not used- */
 101 };