2 * linux/arch/parisc/traps.c
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org>
9 * 'Traps.c' handles hardware traps and faults after we have saved some
13 #include <linux/sched.h>
14 #include <linux/kernel.h>
15 #include <linux/string.h>
16 #include <linux/errno.h>
17 #include <linux/ptrace.h>
18 #include <linux/timer.h>
19 #include <linux/delay.h>
21 #include <linux/module.h>
22 #include <linux/smp.h>
23 #include <linux/spinlock.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/console.h>
27 #include <linux/bug.h>
29 #include <asm/assembly.h>
30 #include <asm/uaccess.h>
33 #include <asm/traps.h>
34 #include <asm/unaligned.h>
35 #include <linux/atomic.h>
38 #include <asm/pdc_chassis.h>
39 #include <asm/unwind.h>
40 #include <asm/tlbflush.h>
41 #include <asm/cacheflush.h>
43 #include "../math-emu/math-emu.h" /* for handle_fpe() */
45 #define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
46 /* dumped to the console via printk) */
48 #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)
49 DEFINE_SPINLOCK(pa_dbit_lock
);
52 static void parisc_show_stack(struct task_struct
*task
, unsigned long *sp
,
53 struct pt_regs
*regs
);
55 static int printbinary(char *buf
, unsigned long x
, int nbits
)
57 unsigned long mask
= 1UL << (nbits
- 1);
59 *buf
++ = (mask
& x
? '1' : '0');
72 #define FFMT "%016llx" /* fpregs are 64-bit always */
74 #define PRINTREGS(lvl,r,f,fmt,x) \
75 printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \
76 lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \
77 (r)[(x)+2], (r)[(x)+3])
79 static void print_gr(char *level
, struct pt_regs
*regs
)
84 printk("%s\n", level
);
85 printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level
);
86 printbinary(buf
, regs
->gr
[0], 32);
87 printk("%sPSW: %s %s\n", level
, buf
, print_tainted());
89 for (i
= 0; i
< 32; i
+= 4)
90 PRINTREGS(level
, regs
->gr
, "r", RFMT
, i
);
93 static void print_fr(char *level
, struct pt_regs
*regs
)
97 struct { u32 sw
[2]; } s
;
99 /* FR are 64bit everywhere. Need to use asm to get the content
100 * of fpsr/fper1, and we assume that we won't have a FP Identify
101 * in our way, otherwise we're screwed.
102 * The fldd is used to restore the T-bit if there was one, as the
103 * store clears it anyway.
104 * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */
105 asm volatile ("fstd %%fr0,0(%1) \n\t"
106 "fldd 0(%1),%%fr0 \n\t"
107 : "=m" (s
) : "r" (&s
) : "r0");
109 printk("%s\n", level
);
110 printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level
);
111 printbinary(buf
, s
.sw
[0], 32);
112 printk("%sFPSR: %s\n", level
, buf
);
113 printk("%sFPER1: %08x\n", level
, s
.sw
[1]);
115 /* here we'll print fr0 again, tho it'll be meaningless */
116 for (i
= 0; i
< 32; i
+= 4)
117 PRINTREGS(level
, regs
->fr
, "fr", FFMT
, i
);
120 void show_regs(struct pt_regs
*regs
)
124 unsigned long cr30
, cr31
;
126 user
= user_mode(regs
);
127 level
= user
? KERN_DEBUG
: KERN_CRIT
;
129 show_regs_print_info(level
);
131 print_gr(level
, regs
);
133 for (i
= 0; i
< 8; i
+= 4)
134 PRINTREGS(level
, regs
->sr
, "sr", RFMT
, i
);
137 print_fr(level
, regs
);
141 printk("%s\n", level
);
142 printk("%sIASQ: " RFMT
" " RFMT
" IAOQ: " RFMT
" " RFMT
"\n",
143 level
, regs
->iasq
[0], regs
->iasq
[1], regs
->iaoq
[0], regs
->iaoq
[1]);
144 printk("%s IIR: %08lx ISR: " RFMT
" IOR: " RFMT
"\n",
145 level
, regs
->iir
, regs
->isr
, regs
->ior
);
146 printk("%s CPU: %8d CR30: " RFMT
" CR31: " RFMT
"\n",
147 level
, current_thread_info()->cpu
, cr30
, cr31
);
148 printk("%s ORIG_R28: " RFMT
"\n", level
, regs
->orig_r28
);
151 printk("%s IAOQ[0]: " RFMT
"\n", level
, regs
->iaoq
[0]);
152 printk("%s IAOQ[1]: " RFMT
"\n", level
, regs
->iaoq
[1]);
153 printk("%s RP(r2): " RFMT
"\n", level
, regs
->gr
[2]);
155 printk("%s IAOQ[0]: %pS\n", level
, (void *) regs
->iaoq
[0]);
156 printk("%s IAOQ[1]: %pS\n", level
, (void *) regs
->iaoq
[1]);
157 printk("%s RP(r2): %pS\n", level
, (void *) regs
->gr
[2]);
159 parisc_show_stack(current
, NULL
, regs
);
163 static void do_show_stack(struct unwind_frame_info
*info
)
167 printk(KERN_CRIT
"Backtrace:\n");
169 if (unwind_once(info
) < 0 || info
->ip
== 0)
172 if (__kernel_text_address(info
->ip
)) {
173 printk(KERN_CRIT
" [<" RFMT
">] %pS\n",
174 info
->ip
, (void *) info
->ip
);
178 printk(KERN_CRIT
"\n");
181 static void parisc_show_stack(struct task_struct
*task
, unsigned long *sp
,
182 struct pt_regs
*regs
)
184 struct unwind_frame_info info
;
185 struct task_struct
*t
;
187 t
= task
? task
: current
;
189 unwind_frame_init(&info
, t
, regs
);
197 asm volatile ("copy %%r30, %0" : "=r"(sp
));
201 memset(&r
, 0, sizeof(struct pt_regs
));
202 r
.iaoq
[0] = (unsigned long)&&HERE
;
203 r
.gr
[2] = (unsigned long)__builtin_return_address(0);
206 unwind_frame_init(&info
, current
, &r
);
209 unwind_frame_init_from_blocked_task(&info
, t
);
213 do_show_stack(&info
);
216 void show_stack(struct task_struct
*t
, unsigned long *sp
)
218 return parisc_show_stack(t
, sp
, NULL
);
221 int is_valid_bugaddr(unsigned long iaoq
)
226 void die_if_kernel(char *str
, struct pt_regs
*regs
, long err
)
228 if (user_mode(regs
)) {
232 printk(KERN_CRIT
"%s (pid %d): %s (code %ld) at " RFMT
"\n",
233 current
->comm
, task_pid_nr(current
), str
, err
, regs
->iaoq
[0]);
234 #ifdef PRINT_USER_FAULTS
235 /* XXX for debugging only */
241 oops_in_progress
= 1;
245 /* Amuse the user in a SPARC fashion */
246 if (err
) printk(KERN_CRIT
247 " _______________________________ \n"
248 " < Your System ate a SPARC! Gah! >\n"
249 " ------------------------------- \n"
255 /* unlock the pdc lock if necessary */
256 pdc_emergency_unlock();
258 /* maybe the kernel hasn't booted very far yet and hasn't been able
259 * to initialize the serial or STI console. In that case we should
260 * re-enable the pdc console, so that the user will be able to
261 * identify the problem. */
262 if (!console_drivers
)
263 pdc_console_restart();
266 printk(KERN_CRIT
"%s (pid %d): %s (code %ld)\n",
267 current
->comm
, task_pid_nr(current
), str
, err
);
269 /* Wot's wrong wif bein' racy? */
270 if (current
->thread
.flags
& PARISC_KERNEL_DEATH
) {
271 printk(KERN_CRIT
"%s() recursion detected.\n", __func__
);
275 current
->thread
.flags
|= PARISC_KERNEL_DEATH
;
279 add_taint(TAINT_DIE
, LOCKDEP_NOW_UNRELIABLE
);
282 panic("Fatal exception in interrupt");
285 printk(KERN_EMERG
"Fatal exception: panic in 5 seconds\n");
287 panic("Fatal exception");
294 /* gdb uses break 4,8 */
295 #define GDB_BREAK_INSN 0x10004
296 static void handle_gdb_break(struct pt_regs
*regs
, int wot
)
300 si
.si_signo
= SIGTRAP
;
303 si
.si_addr
= (void __user
*) (regs
->iaoq
[0] & ~3);
304 force_sig_info(SIGTRAP
, &si
, current
);
307 static void handle_break(struct pt_regs
*regs
)
309 unsigned iir
= regs
->iir
;
311 if (unlikely(iir
== PARISC_BUG_BREAK_INSN
&& !user_mode(regs
))) {
312 /* check if a BUG() or WARN() trapped here. */
313 enum bug_trap_type tt
;
314 tt
= report_bug(regs
->iaoq
[0] & ~3, regs
);
315 if (tt
== BUG_TRAP_TYPE_WARN
) {
318 return; /* return to next instruction when WARN_ON(). */
320 die_if_kernel("Unknown kernel breakpoint", regs
,
321 (tt
== BUG_TRAP_TYPE_NONE
) ? 9 : 0);
324 #ifdef PRINT_USER_FAULTS
325 if (unlikely(iir
!= GDB_BREAK_INSN
)) {
326 printk(KERN_DEBUG
"break %d,%d: pid=%d command='%s'\n",
327 iir
& 31, (iir
>>13) & ((1<<13)-1),
328 task_pid_nr(current
), current
->comm
);
333 /* send standard GDB signal */
334 handle_gdb_break(regs
, TRAP_BRKPT
);
337 static void default_trap(int code
, struct pt_regs
*regs
)
339 printk(KERN_ERR
"Trap %d on CPU %d\n", code
, smp_processor_id());
343 void (*cpu_lpmc
) (int code
, struct pt_regs
*regs
) __read_mostly
= default_trap
;
346 void transfer_pim_to_trap_frame(struct pt_regs
*regs
)
349 extern unsigned int hpmc_pim_data
[];
350 struct pdc_hpmc_pim_11
*pim_narrow
;
351 struct pdc_hpmc_pim_20
*pim_wide
;
353 if (boot_cpu_data
.cpu_type
>= pcxu
) {
355 pim_wide
= (struct pdc_hpmc_pim_20
*)hpmc_pim_data
;
358 * Note: The following code will probably generate a
359 * bunch of truncation error warnings from the compiler.
360 * Could be handled with an ifdef, but perhaps there
364 regs
->gr
[0] = pim_wide
->cr
[22];
366 for (i
= 1; i
< 32; i
++)
367 regs
->gr
[i
] = pim_wide
->gr
[i
];
369 for (i
= 0; i
< 32; i
++)
370 regs
->fr
[i
] = pim_wide
->fr
[i
];
372 for (i
= 0; i
< 8; i
++)
373 regs
->sr
[i
] = pim_wide
->sr
[i
];
375 regs
->iasq
[0] = pim_wide
->cr
[17];
376 regs
->iasq
[1] = pim_wide
->iasq_back
;
377 regs
->iaoq
[0] = pim_wide
->cr
[18];
378 regs
->iaoq
[1] = pim_wide
->iaoq_back
;
380 regs
->sar
= pim_wide
->cr
[11];
381 regs
->iir
= pim_wide
->cr
[19];
382 regs
->isr
= pim_wide
->cr
[20];
383 regs
->ior
= pim_wide
->cr
[21];
386 pim_narrow
= (struct pdc_hpmc_pim_11
*)hpmc_pim_data
;
388 regs
->gr
[0] = pim_narrow
->cr
[22];
390 for (i
= 1; i
< 32; i
++)
391 regs
->gr
[i
] = pim_narrow
->gr
[i
];
393 for (i
= 0; i
< 32; i
++)
394 regs
->fr
[i
] = pim_narrow
->fr
[i
];
396 for (i
= 0; i
< 8; i
++)
397 regs
->sr
[i
] = pim_narrow
->sr
[i
];
399 regs
->iasq
[0] = pim_narrow
->cr
[17];
400 regs
->iasq
[1] = pim_narrow
->iasq_back
;
401 regs
->iaoq
[0] = pim_narrow
->cr
[18];
402 regs
->iaoq
[1] = pim_narrow
->iaoq_back
;
404 regs
->sar
= pim_narrow
->cr
[11];
405 regs
->iir
= pim_narrow
->cr
[19];
406 regs
->isr
= pim_narrow
->cr
[20];
407 regs
->ior
= pim_narrow
->cr
[21];
411 * The following fields only have meaning if we came through
412 * another path. So just zero them here.
422 * This routine is called as a last resort when everything else
423 * has gone clearly wrong. We get called for faults in kernel space,
426 void parisc_terminate(char *msg
, struct pt_regs
*regs
, int code
, unsigned long offset
)
428 static DEFINE_SPINLOCK(terminate_lock
);
430 oops_in_progress
= 1;
434 spin_lock(&terminate_lock
);
436 /* unlock the pdc lock if necessary */
437 pdc_emergency_unlock();
439 /* restart pdc console if necessary */
440 if (!console_drivers
)
441 pdc_console_restart();
443 /* Not all paths will gutter the processor... */
447 transfer_pim_to_trap_frame(regs
);
457 /* show_stack(NULL, (unsigned long *)regs->gr[30]); */
458 struct unwind_frame_info info
;
459 unwind_frame_init(&info
, current
, regs
);
460 do_show_stack(&info
);
464 printk(KERN_CRIT
"%s: Code=%d regs=%p (Addr=" RFMT
")\n",
465 msg
, code
, regs
, offset
);
468 spin_unlock(&terminate_lock
);
470 /* put soft power button back under hardware control;
471 * if the user had pressed it once at any time, the
472 * system will shut down immediately right here. */
473 pdc_soft_power_button(0);
475 /* Call kernel panic() so reboot timeouts work properly
476 * FIXME: This function should be on the list of
477 * panic notifiers, and we should call panic
478 * directly from the location that we wish.
479 * e.g. We should not call panic from
480 * parisc_terminate, but rather the oter way around.
481 * This hack works, prints the panic message twice,
482 * and it enables reboot timers!
487 void notrace
handle_interruption(int code
, struct pt_regs
*regs
)
489 unsigned long fault_address
= 0;
490 unsigned long fault_space
= 0;
494 pdc_console_restart(); /* switch back to pdc if HPMC */
499 * If the priority level is still user, and the
500 * faulting space is not equal to the active space
501 * then the user is attempting something in a space
502 * that does not belong to them. Kill the process.
504 * This is normally the situation when the user
505 * attempts to jump into the kernel space at the
506 * wrong offset, be it at the gateway page or a
509 * We cannot normally signal the process because it
510 * could *be* on the gateway page, and processes
511 * executing on the gateway page can't have signals
514 * We merely readjust the address into the users
515 * space, at a destination address of zero, and
516 * allow processing to continue.
518 if (((unsigned long)regs
->iaoq
[0] & 3) &&
519 ((unsigned long)regs
->iasq
[0] != (unsigned long)regs
->sr
[7])) {
520 /* Kill the user process later */
521 regs
->iaoq
[0] = 0 | 3;
522 regs
->iaoq
[1] = regs
->iaoq
[0] + 4;
523 regs
->iasq
[0] = regs
->iasq
[1] = regs
->sr
[7];
524 regs
->gr
[0] &= ~PSW_B
;
529 printk(KERN_CRIT
"Interruption # %d\n", code
);
535 /* High-priority machine check (HPMC) */
537 /* set up a new led state on systems shipped with a LED State panel */
538 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC
);
540 parisc_terminate("High Priority Machine Check (HPMC)",
545 /* Power failure interrupt */
546 printk(KERN_CRIT
"Power failure interrupt !\n");
550 /* Recovery counter trap */
551 regs
->gr
[0] &= ~PSW_R
;
552 if (user_space(regs
))
553 handle_gdb_break(regs
, TRAP_TRACE
);
554 /* else this must be the start of a syscall - just let it run */
558 /* Low-priority machine check */
559 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC
);
567 /* Instruction TLB miss fault/Instruction page fault */
568 fault_address
= regs
->iaoq
[0];
569 fault_space
= regs
->iasq
[0];
573 /* Illegal instruction trap */
574 die_if_kernel("Illegal instruction", regs
, code
);
575 si
.si_code
= ILL_ILLOPC
;
579 /* Break instruction trap */
584 /* Privileged operation trap */
585 die_if_kernel("Privileged operation", regs
, code
);
586 si
.si_code
= ILL_PRVOPC
;
590 /* Privileged register trap */
591 if ((regs
->iir
& 0xffdfffe0) == 0x034008a0) {
593 /* This is a MFCTL cr26/cr27 to gr instruction.
594 * PCXS traps on this, so we need to emulate it.
597 if (regs
->iir
& 0x00200000)
598 regs
->gr
[regs
->iir
& 0x1f] = mfctl(27);
600 regs
->gr
[regs
->iir
& 0x1f] = mfctl(26);
602 regs
->iaoq
[0] = regs
->iaoq
[1];
604 regs
->iasq
[0] = regs
->iasq
[1];
608 die_if_kernel("Privileged register usage", regs
, code
);
609 si
.si_code
= ILL_PRVREG
;
611 si
.si_signo
= SIGILL
;
613 si
.si_addr
= (void __user
*) regs
->iaoq
[0];
614 force_sig_info(SIGILL
, &si
, current
);
618 /* Overflow Trap, let the userland signal handler do the cleanup */
619 si
.si_signo
= SIGFPE
;
620 si
.si_code
= FPE_INTOVF
;
621 si
.si_addr
= (void __user
*) regs
->iaoq
[0];
622 force_sig_info(SIGFPE
, &si
, current
);
627 The condition succeeds in an instruction which traps
630 si
.si_signo
= SIGFPE
;
631 /* Set to zero, and let the userspace app figure it out from
632 the insn pointed to by si_addr */
634 si
.si_addr
= (void __user
*) regs
->iaoq
[0];
635 force_sig_info(SIGFPE
, &si
, current
);
638 /* The kernel doesn't want to handle condition codes */
642 /* Assist Exception Trap, i.e. floating point exception. */
643 die_if_kernel("Floating point exception", regs
, 0); /* quiet */
644 __inc_irq_stat(irq_fpassist_count
);
649 /* Data TLB miss fault/Data page fault */
652 /* Non-access instruction TLB miss fault */
653 /* The instruction TLB entry needed for the target address of the FIC
654 is absent, and hardware can't find it, so we get to cleanup */
657 /* Non-access data TLB miss fault/Non-access data page fault */
659 Still need to add slow path emulation code here!
660 If the insn used a non-shadow register, then the tlb
661 handlers could not have their side-effect (e.g. probe
662 writing to a target register) emulated since rfir would
663 erase the changes to said register. Instead we have to
664 setup everything, call this function we are in, and emulate
665 by hand. Technically we need to emulate:
666 fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw
668 fault_address
= regs
->ior
;
669 fault_space
= regs
->isr
;
673 /* PCXS only -- later cpu's split this into types 26,27 & 28 */
674 /* Check for unaligned access */
675 if (check_unaligned(regs
)) {
676 handle_unaligned(regs
);
681 /* PCXL: Data memory access rights trap */
682 fault_address
= regs
->ior
;
683 fault_space
= regs
->isr
;
687 /* Data memory break trap */
688 regs
->gr
[0] |= PSW_X
; /* So we can single-step over the trap */
691 /* Page reference trap */
692 handle_gdb_break(regs
, TRAP_HWBKPT
);
696 /* Taken branch trap */
697 regs
->gr
[0] &= ~PSW_T
;
698 if (user_space(regs
))
699 handle_gdb_break(regs
, TRAP_BRANCH
);
700 /* else this must be the start of a syscall - just let it
706 /* Instruction access rights */
707 /* PCXL: Instruction memory protection trap */
710 * This could be caused by either: 1) a process attempting
711 * to execute within a vma that does not have execute
712 * permission, or 2) an access rights violation caused by a
713 * flush only translation set up by ptep_get_and_clear().
714 * So we check the vma permissions to differentiate the two.
715 * If the vma indicates we have execute permission, then
716 * the cause is the latter one. In this case, we need to
717 * call do_page_fault() to fix the problem.
720 if (user_mode(regs
)) {
721 struct vm_area_struct
*vma
;
723 down_read(¤t
->mm
->mmap_sem
);
724 vma
= find_vma(current
->mm
,regs
->iaoq
[0]);
725 if (vma
&& (regs
->iaoq
[0] >= vma
->vm_start
)
726 && (vma
->vm_flags
& VM_EXEC
)) {
728 fault_address
= regs
->iaoq
[0];
729 fault_space
= regs
->iasq
[0];
731 up_read(¤t
->mm
->mmap_sem
);
732 break; /* call do_page_fault() */
734 up_read(¤t
->mm
->mmap_sem
);
738 /* Data memory protection ID trap */
739 if (code
== 27 && !user_mode(regs
) &&
740 fixup_exception(regs
))
743 die_if_kernel("Protection id trap", regs
, code
);
744 si
.si_code
= SEGV_MAPERR
;
745 si
.si_signo
= SIGSEGV
;
748 si
.si_addr
= (void __user
*) regs
->iaoq
[0];
750 si
.si_addr
= (void __user
*) regs
->ior
;
751 force_sig_info(SIGSEGV
, &si
, current
);
755 /* Unaligned data reference trap */
756 handle_unaligned(regs
);
760 if (user_mode(regs
)) {
761 #ifdef PRINT_USER_FAULTS
762 printk(KERN_DEBUG
"\nhandle_interruption() pid=%d command='%s'\n",
763 task_pid_nr(current
), current
->comm
);
766 /* SIGBUS, for lack of a better one. */
767 si
.si_signo
= SIGBUS
;
768 si
.si_code
= BUS_OBJERR
;
770 si
.si_addr
= (void __user
*) regs
->ior
;
771 force_sig_info(SIGBUS
, &si
, current
);
774 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC
);
776 parisc_terminate("Unexpected interruption", regs
, code
, 0);
780 if (user_mode(regs
)) {
781 if ((fault_space
>> SPACEID_SHIFT
) != (regs
->sr
[7] >> SPACEID_SHIFT
)) {
782 #ifdef PRINT_USER_FAULTS
783 if (fault_space
== 0)
784 printk(KERN_DEBUG
"User Fault on Kernel Space ");
786 printk(KERN_DEBUG
"User Fault (long pointer) (fault %d) ",
788 printk(KERN_CONT
"pid=%d command='%s'\n",
789 task_pid_nr(current
), current
->comm
);
792 si
.si_signo
= SIGSEGV
;
794 si
.si_code
= SEGV_MAPERR
;
795 si
.si_addr
= (void __user
*) regs
->ior
;
796 force_sig_info(SIGSEGV
, &si
, current
);
803 * The kernel should never fault on its own address space,
804 * unless pagefault_disable() was called before.
807 if (fault_space
== 0 && !in_atomic())
809 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC
);
810 parisc_terminate("Kernel Fault", regs
, code
, fault_address
);
814 do_page_fault(regs
, code
, fault_address
);
818 int __init
check_ivt(void *iva
)
820 extern u32 os_hpmc_size
;
821 extern const u32 os_hpmc
[];
829 if (strcmp((char *)iva
, "cows can fly"))
834 for (i
= 0; i
< 8; i
++)
837 /* Compute Checksum for HPMC handler */
838 length
= os_hpmc_size
;
841 hpmcp
= (u32
*)os_hpmc
;
843 for (i
=0; i
<length
/4; i
++)
855 extern const void fault_vector_11
;
857 extern const void fault_vector_20
;
859 void __init
trap_init(void)
863 if (boot_cpu_data
.cpu_type
>= pcxu
)
864 iva
= (void *) &fault_vector_20
;
867 panic("Can't boot 64-bit OS on PA1.1 processor!");
869 iva
= (void *) &fault_vector_11
;
873 panic("IVT invalid");