2 * P5040 Silicon/SoC Device Tree Source (pre include)
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37 /include/ "e5500_power_isa.dtsi"
40 compatible = "fsl,P5040";
43 interrupt-parent = <&mpic>;
81 cpu0: PowerPC,e5500@0 {
84 next-level-cache = <&L2_0>;
86 next-level-cache = <&cpc>;
89 cpu1: PowerPC,e5500@1 {
92 next-level-cache = <&L2_1>;
94 next-level-cache = <&cpc>;
97 cpu2: PowerPC,e5500@2 {
100 next-level-cache = <&L2_2>;
102 next-level-cache = <&cpc>;
105 cpu3: PowerPC,e5500@3 {
108 next-level-cache = <&L2_3>;
110 next-level-cache = <&cpc>;