2 * T4240 Silicon/SoC Device Tree Source (post include)
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38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <25 2 0 0>;
42 /* controller at 0x240000 */
44 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
48 bus-range = <0x0 0xff>;
49 interrupts = <20 2 0 0>;
51 #interrupt-cells = <1>;
56 interrupts = <20 2 0 0>;
57 interrupt-map-mask = <0xf800 0 0 7>;
60 0000 0 0 1 &mpic 40 1 0 0
61 0000 0 0 2 &mpic 1 1 0 0
62 0000 0 0 3 &mpic 2 1 0 0
63 0000 0 0 4 &mpic 3 1 0 0
68 /* controller at 0x250000 */
70 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
75 interrupts = <21 2 0 0>;
77 #interrupt-cells = <1>;
82 interrupts = <21 2 0 0>;
83 interrupt-map-mask = <0xf800 0 0 7>;
86 0000 0 0 1 &mpic 41 1 0 0
87 0000 0 0 2 &mpic 5 1 0 0
88 0000 0 0 3 &mpic 6 1 0 0
89 0000 0 0 4 &mpic 7 1 0 0
94 /* controller at 0x260000 */
96 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
100 bus-range = <0x0 0xff>;
101 interrupts = <22 2 0 0>;
103 #interrupt-cells = <1>;
105 #address-cells = <3>;
108 interrupts = <22 2 0 0>;
109 interrupt-map-mask = <0xf800 0 0 7>;
112 0000 0 0 1 &mpic 42 1 0 0
113 0000 0 0 2 &mpic 9 1 0 0
114 0000 0 0 3 &mpic 10 1 0 0
115 0000 0 0 4 &mpic 11 1 0 0
120 /* controller at 0x270000 */
122 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
125 #address-cells = <3>;
126 bus-range = <0x0 0xff>;
127 interrupts = <23 2 0 0>;
129 #interrupt-cells = <1>;
131 #address-cells = <3>;
134 interrupts = <23 2 0 0>;
135 interrupt-map-mask = <0xf800 0 0 7>;
138 0000 0 0 1 &mpic 43 1 0 0
139 0000 0 0 2 &mpic 0 1 0 0
140 0000 0 0 3 &mpic 4 1 0 0
141 0000 0 0 4 &mpic 8 1 0 0
147 compatible = "fsl,srio";
148 interrupts = <16 2 1 11>;
149 #address-cells = <2>;
154 #address-cells = <2>;
160 #address-cells = <2>;
167 #address-cells = <1>;
169 compatible = "fsl,dcsr", "simple-bus";
172 compatible = "fsl,t4240-dcsr-epu", "fsl,dcsr-epu";
173 interrupts = <52 2 0 0
181 compatible = "fsl,t4240-dcsr-cnpc", "fsl,dcsr-cnpc";
182 reg = <0x1000 0x1000 0x1002000 0x10000>;
185 compatible = "fsl,dcsr-nxc";
186 reg = <0x2000 0x1000>;
189 compatible = "fsl,dcsr-corenet";
190 reg = <0x8000 0x1000 0x1A000 0x1000>;
193 compatible = "fsl,t4240-dcsr-dpaa", "fsl,dcsr-dpaa";
194 reg = <0x9000 0x1000>;
197 compatible = "fsl,t4240-dcsr-ocn", "fsl,dcsr-ocn";
198 reg = <0x11000 0x1000>;
201 compatible = "fsl,dcsr-ddr";
202 dev-handle = <&ddr1>;
203 reg = <0x12000 0x1000>;
206 compatible = "fsl,dcsr-ddr";
207 dev-handle = <&ddr2>;
208 reg = <0x13000 0x1000>;
211 compatible = "fsl,dcsr-ddr";
212 dev-handle = <&ddr3>;
213 reg = <0x14000 0x1000>;
216 compatible = "fsl,t4240-dcsr-nal", "fsl,dcsr-nal";
217 reg = <0x18000 0x1000>;
220 compatible = "fsl,t4240-dcsr-rcpm", "fsl,dcsr-rcpm";
221 reg = <0x22000 0x1000>;
224 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
225 reg = <0x30000 0x1000 0x1022000 0x10000>;
228 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
229 reg = <0x31000 0x1000 0x1042000 0x10000>;
232 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
233 reg = <0x32000 0x1000 0x1062000 0x10000>;
235 dcsr-cpu-sb-proxy@100000 {
236 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
237 cpu-handle = <&cpu0>;
238 reg = <0x100000 0x1000 0x101000 0x1000>;
240 dcsr-cpu-sb-proxy@108000 {
241 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
242 cpu-handle = <&cpu1>;
243 reg = <0x108000 0x1000 0x109000 0x1000>;
245 dcsr-cpu-sb-proxy@110000 {
246 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
247 cpu-handle = <&cpu2>;
248 reg = <0x110000 0x1000 0x111000 0x1000>;
250 dcsr-cpu-sb-proxy@118000 {
251 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
252 cpu-handle = <&cpu3>;
253 reg = <0x118000 0x1000 0x119000 0x1000>;
255 dcsr-cpu-sb-proxy@120000 {
256 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
257 cpu-handle = <&cpu4>;
258 reg = <0x120000 0x1000 0x121000 0x1000>;
260 dcsr-cpu-sb-proxy@128000 {
261 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
262 cpu-handle = <&cpu5>;
263 reg = <0x128000 0x1000 0x129000 0x1000>;
265 dcsr-cpu-sb-proxy@130000 {
266 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
267 cpu-handle = <&cpu6>;
268 reg = <0x130000 0x1000 0x131000 0x1000>;
270 dcsr-cpu-sb-proxy@138000 {
271 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
272 cpu-handle = <&cpu7>;
273 reg = <0x138000 0x1000 0x139000 0x1000>;
275 dcsr-cpu-sb-proxy@140000 {
276 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
277 cpu-handle = <&cpu8>;
278 reg = <0x140000 0x1000 0x141000 0x1000>;
280 dcsr-cpu-sb-proxy@148000 {
281 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
282 cpu-handle = <&cpu9>;
283 reg = <0x148000 0x1000 0x149000 0x1000>;
285 dcsr-cpu-sb-proxy@150000 {
286 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
287 cpu-handle = <&cpu10>;
288 reg = <0x150000 0x1000 0x151000 0x1000>;
290 dcsr-cpu-sb-proxy@158000 {
291 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
292 cpu-handle = <&cpu11>;
293 reg = <0x158000 0x1000 0x159000 0x1000>;
298 #address-cells = <1>;
301 compatible = "simple-bus";
304 compatible = "fsl,soc-sram-error";
305 interrupts = <16 2 1 29>;
309 compatible = "fsl,corenet-law";
314 ddr1: memory-controller@8000 {
315 compatible = "fsl,qoriq-memory-controller-v4.7",
316 "fsl,qoriq-memory-controller";
317 reg = <0x8000 0x1000>;
318 interrupts = <16 2 1 23>;
321 ddr2: memory-controller@9000 {
322 compatible = "fsl,qoriq-memory-controller-v4.7",
323 "fsl,qoriq-memory-controller";
324 reg = <0x9000 0x1000>;
325 interrupts = <16 2 1 22>;
328 ddr3: memory-controller@a000 {
329 compatible = "fsl,qoriq-memory-controller-v4.7",
330 "fsl,qoriq-memory-controller";
331 reg = <0xa000 0x1000>;
332 interrupts = <16 2 1 21>;
335 cpc: l3-cache-controller@10000 {
336 compatible = "fsl,t4240-l3-cache-controller", "cache";
337 reg = <0x10000 0x1000
340 interrupts = <16 2 1 27
346 compatible = "fsl,corenet-cf";
347 reg = <0x18000 0x1000>;
348 interrupts = <16 2 1 31>;
349 fsl,ccf-num-csdids = <32>;
350 fsl,ccf-num-snoopids = <32>;
354 compatible = "fsl,pamu-v1.0", "fsl,pamu";
355 reg = <0x20000 0x6000>;
361 /include/ "qoriq-mpic4.3.dtsi"
363 guts: global-utilities@e0000 {
364 compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0";
365 reg = <0xe0000 0xe00>;
367 fsl,liodn-bits = <12>;
370 clockgen: global-utilities@e1000 {
371 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
372 reg = <0xe1000 0x1000>;
375 rcpm: global-utilities@e2000 {
376 compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
377 reg = <0xe2000 0x1000>;
381 compatible = "fsl,t4240-sfp";
382 reg = <0xe8000 0x1000>;
385 serdes: serdes@ea000 {
386 compatible = "fsl,t4240-serdes";
387 reg = <0xea000 0x4000>;
390 /include/ "qoriq-dma-0.dtsi"
391 /include/ "qoriq-dma-1.dtsi"
393 /include/ "qoriq-espi-0.dtsi"
395 fsl,espi-num-chipselects = <4>;
398 /include/ "qoriq-esdhc-0.dtsi"
400 compatible = "fsl,t4240-esdhc", "fsl,esdhc";
403 /include/ "qoriq-i2c-0.dtsi"
404 /include/ "qoriq-i2c-1.dtsi"
405 /include/ "qoriq-duart-0.dtsi"
406 /include/ "qoriq-duart-1.dtsi"
407 /include/ "qoriq-gpio-0.dtsi"
408 /include/ "qoriq-gpio-1.dtsi"
409 /include/ "qoriq-gpio-2.dtsi"
410 /include/ "qoriq-gpio-3.dtsi"
411 /include/ "qoriq-usb2-mph-0.dtsi"
413 compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph";
417 /include/ "qoriq-usb2-dr-0.dtsi"
419 compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
423 /include/ "qoriq-sata2-0.dtsi"
424 /include/ "qoriq-sata2-1.dtsi"
425 /include/ "qoriq-sec5.0-0.dtsi"
427 L2_1: l2-cache-controller@c20000 {
428 compatible = "fsl,t4240-l2-cache-controller";
429 reg = <0xc20000 0x40000>;
430 next-level-cache = <&cpc>;
432 L2_2: l2-cache-controller@c60000 {
433 compatible = "fsl,t4240-l2-cache-controller";
434 reg = <0xc60000 0x40000>;
435 next-level-cache = <&cpc>;
437 L2_3: l2-cache-controller@ca0000 {
438 compatible = "fsl,t4240-l2-cache-controller";
439 reg = <0xca0000 0x40000>;
440 next-level-cache = <&cpc>;