2 * mpc8308_p1m Device Tree Source
4 * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 compatible = "denx,mpc8308_p1m";
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <16384>;
37 i-cache-size = <16384>;
38 timebase-frequency = <0>; // from bootloader
39 bus-frequency = <0>; // from bootloader
40 clock-frequency = <0>; // from bootloader
45 device_type = "memory";
46 reg = <0x00000000 0x08000000>; // 128MB at 0
52 compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
57 ranges = <0x0 0x0 0xfc000000 0x04000000
58 0x1 0x0 0xfbff0000 0x00008000
59 0x2 0x0 0xfbff8000 0x00008000>;
64 compatible = "cfi-flash";
65 reg = <0x0 0x0 0x4000000>;
74 reg = <0x60000 0x20000>;
77 reg = <0x80000 0x20000>;
80 reg = <0xa0000 0x200000>;
83 reg = <0x2a0000 0x20000>;
86 reg = <0x2c0000 0x640000>;
89 reg = <0x700000 0x3900000>;
94 compatible = "nxp,sja1000";
96 interrupts = <18 0x8>;
97 interrups-parent = <&ipic>;
101 compatible = "denx,mpc8308_p1m-cpld";
103 interrupts = <48 0x8>;
104 interrups-parent = <&ipic>;
109 #address-cells = <1>;
112 compatible = "fsl,mpc8308-immr", "simple-bus";
113 ranges = <0 0xe0000000 0x00100000>;
114 reg = <0xe0000000 0x00000200>;
118 #address-cells = <1>;
120 compatible = "fsl-i2c";
121 reg = <0x3000 0x100>;
122 interrupts = <14 0x8>;
123 interrupt-parent = <&ipic>;
126 compatible = "ramtron,24c64";
132 #address-cells = <1>;
134 compatible = "fsl-i2c";
135 reg = <0x3100 0x100>;
136 interrupts = <15 0x8>;
137 interrupt-parent = <&ipic>;
140 compatible = "maxim,ds1050";
144 compatible = "maxim,max6625";
148 compatible = "maxim,max6625";
152 compatible = "maxim,max6625";
158 compatible = "fsl-usb2-dr";
159 reg = <0x23000 0x1000>;
160 #address-cells = <1>;
162 interrupt-parent = <&ipic>;
163 interrupts = <38 0x8>;
164 dr_mode = "peripheral";
168 enet0: ethernet@24000 {
169 #address-cells = <1>;
171 ranges = <0x0 0x24000 0x1000>;
174 device_type = "network";
176 compatible = "gianfar";
177 reg = <0x24000 0x1000>;
178 local-mac-address = [ 00 00 00 00 00 00 ];
179 interrupts = <32 0x8 33 0x8 34 0x8>;
180 interrupt-parent = <&ipic>;
181 phy-handle = < &phy1 >;
184 #address-cells = <1>;
186 compatible = "fsl,gianfar-mdio";
188 phy1: ethernet-phy@1 {
189 interrupt-parent = <&ipic>;
190 interrupts = <17 0x8>;
192 device_type = "ethernet-phy";
194 phy2: ethernet-phy@2 {
195 interrupt-parent = <&ipic>;
196 interrupts = <19 0x8>;
198 device_type = "ethernet-phy";
202 device_type = "tbi-phy";
207 enet1: ethernet@25000 {
208 #address-cells = <1>;
211 device_type = "network";
213 compatible = "gianfar";
214 reg = <0x25000 0x1000>;
215 ranges = <0x0 0x25000 0x1000>;
216 local-mac-address = [ 00 00 00 00 00 00 ];
217 interrupts = <35 0x8 36 0x8 37 0x8>;
218 interrupt-parent = <&ipic>;
219 phy-handle = < &phy2 >;
222 #address-cells = <1>;
224 compatible = "fsl,gianfar-tbi";
228 device_type = "tbi-phy";
233 serial0: serial@4500 {
235 device_type = "serial";
236 compatible = "fsl,ns16550", "ns16550";
237 reg = <0x4500 0x100>;
238 clock-frequency = <133333333>;
239 interrupts = <9 0x8>;
240 interrupt-parent = <&ipic>;
243 serial1: serial@4600 {
245 device_type = "serial";
246 compatible = "fsl,ns16550", "ns16550";
247 reg = <0x4600 0x100>;
248 clock-frequency = <133333333>;
249 interrupts = <10 0x8>;
250 interrupt-parent = <&ipic>;
255 compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
257 interrupts = <74 0x8>;
258 interrupt-parent = <&ipic>;
263 compatible = "fsl,mpc8308-gtm", "fsl,gtm";
265 interrupts = <90 8 78 8 84 8 72 8>;
266 interrupt-parent = <&ipic>;
267 clock-frequency = <133333333>;
271 * interrupts cell = <intr #, sense>
272 * sense values match linux IORESOURCE_IRQ_* defines:
273 * sense == 8: Level, low assertion
274 * sense == 2: Edge, high-to-low change
276 ipic: interrupt-controller@700 {
277 compatible = "fsl,ipic";
278 interrupt-controller;
279 #address-cells = <0>;
280 #interrupt-cells = <2>;
282 device_type = "ipic";
286 compatible = "fsl,ipic-msi";
288 msi-available-ranges = <0x0 0x100>;
289 interrupts = < 0x43 0x8
297 interrupt-parent = < &ipic >;
301 compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma";
302 reg = <0x2c000 0x1800>;
305 interrupt-parent = < &ipic >;
310 pci0: pcie@e0009000 {
311 #address-cells = <3>;
313 #interrupt-cells = <1>;
315 compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
316 reg = <0xe0009000 0x00001000
317 0xb0000000 0x01000000>;
318 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
319 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
321 interrupt-map-mask = <0 0 0 0>;
322 interrupt-map = <0 0 0 0 &ipic 1 8>;
323 interrupts = <0x1 0x8>;
324 interrupt-parent = <&ipic>;
325 clock-frequency = <0>;
328 #address-cells = <3>;
332 ranges = <0x02000000 0 0xa0000000
333 0x02000000 0 0xa0000000
335 0x01000000 0 0x00000000
336 0x01000000 0 0x00000000