2 * MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
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39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x800000>;
50 reg = <0x20000 0x30000>;
51 label = "diagnostic-nor";
56 reg = <0x200000 0x200000>;
62 reg = <0x400000 0x380000>;
67 reg = <0x780000 0x80000>;
75 enet0: ethernet@24000 {
78 phy-connection-type = "rgmii-id";
82 phy0: ethernet-phy@0 {
83 interrupts = <10 1 0 0>;
85 device_type = "ethernet-phy";
87 phy1: ethernet-phy@1 {
88 interrupts = <10 1 0 0>;
90 device_type = "ethernet-phy";
93 sgmii_phy0: sgmii-phy@0 {
94 interrupts = <6 1 0 0>;
97 sgmii_phy1: sgmii-phy@1 {
98 interrupts = <6 1 0 0>;
104 device_type = "tbi-phy";
108 enet2: ethernet@26000 {
109 phy-handle = <&phy1>;
110 tbi-handle = <&tbi1>;
111 phy-connection-type = "rgmii-id";
117 device_type = "tbi-phy";
124 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
127 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
128 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
129 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
130 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
133 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
136 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
137 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
139 // IDSEL 0x1f IDE/SATA
140 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
141 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
146 reg = <0x0 0x0 0x0 0x0 0x0>;
148 #address-cells = <3>;
149 ranges = <0x2000000 0x0 0xb0000000
150 0x2000000 0x0 0xb0000000
158 #interrupt-cells = <2>;
160 #address-cells = <2>;
161 reg = <0xf000 0x0 0x0 0x0 0x0>;
162 ranges = <0x1 0x0 0x1000000 0x0 0x0
164 interrupt-parent = <&i8259>;
166 i8259: interrupt-controller@20 {
170 interrupt-controller;
171 device_type = "interrupt-controller";
172 #address-cells = <0>;
173 #interrupt-cells = <2>;
174 compatible = "chrp,iic";
175 interrupts = <9 2 0 0>;
176 interrupt-parent = <&mpic>;
181 #address-cells = <1>;
182 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
183 interrupts = <1 3 12 3>;
189 compatible = "pnpPNP,303";
194 compatible = "pnpPNP,f03";
199 compatible = "pnpPNP,b00";
200 reg = <0x1 0x70 0x2>;
204 reg = <0x1 0x400 0x80>;