2 * P1022 DS Device Tree Source stub (no addresses or top-level ranges)
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39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x8000000>;
45 reg = <0x0 0x03000000>;
46 label = "ramdisk-nor";
51 reg = <0x03000000 0x00e00000>;
52 label = "diagnostic-nor";
57 reg = <0x03e00000 0x00200000>;
63 reg = <0x04000000 0x00400000>;
69 reg = <0x04400000 0x03b00000>;
74 reg = <0x07f00000 0x00080000>;
80 reg = <0x07f80000 0x00080000>;
89 compatible = "fsl,elbc-fcm-nand";
90 reg = <0x2 0x0 0x40000>;
93 reg = <0x0 0x02000000>;
94 label = "u-boot-nand";
99 reg = <0x02000000 0x10000000>;
100 label = "jffs2-nand";
104 reg = <0x12000000 0x10000000>;
105 label = "ramdisk-nand";
110 reg = <0x22000000 0x04000000>;
111 label = "kernel-nand";
115 reg = <0x26000000 0x01000000>;
121 reg = <0x27000000 0x19000000>;
122 label = "reserved-nand";
127 compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
129 interrupt-parent = <&mpic>;
131 * IRQ8 is generated if the "EVENT" switch is pressed
132 * and PX_CTL[EVESEL] is set to 00.
134 interrupts = <8 0 0 0>;
141 compatible = "wlf,wm8776";
144 * clock-frequency will be set by U-Boot if
145 * the clock is enabled.
149 compatible = "dallas,ds1339";
153 compatible = "adi,adt7461";
160 #address-cells = <1>;
162 compatible = "spansion,s25sl12801";
164 spi-max-frequency = <40000000>; /* input clock */
167 label = "u-boot-spi";
168 reg = <0x00000000 0x00100000>;
172 label = "kernel-spi";
173 reg = <0x00100000 0x00500000>;
178 reg = <0x00600000 0x00100000>;
182 label = "file system-spi";
183 reg = <0x00700000 0x00900000>;
189 fsl,mode = "i2s-slave";
190 codec-handle = <&wm8776>;
191 fsl,ssi-asynchronous;
203 phy0: ethernet-phy@0 {
204 interrupts = <3 1 0 0>;
207 phy1: ethernet-phy@1 {
208 interrupts = <9 1 0 0>;
212 device_type = "tbi-phy";
218 phy-handle = <&phy0>;
219 phy-connection-type = "rgmii-id";
223 phy-handle = <&phy1>;
224 phy-connection-type = "rgmii-id";