2 * PPA8548 Device Tree Source (36-bit address map)
3 * Copyright 2013 Prodrive B.V.
6 * MPC8548 CDS Device Tree Source (36-bit address map)
7 * Copyright 2012 Freescale Semiconductor Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 /include/ "fsl/mpc8548si-pre.dtsi"
19 compatible = "ppa8548";
22 interrupt-parent = <&mpic>;
25 device_type = "memory";
26 reg = <0 0 0x0 0x40000000>;
29 lbc: localbus@fe0005000 {
30 reg = <0xf 0xe0005000 0 0x1000>;
31 ranges = <0x0 0x0 0xf 0xff800000 0x00800000>;
34 soc: soc8548@fe0000000 {
35 ranges = <0 0xf 0xe0000000 0x100000>;
39 /* ppa8548 board doesn't support PCI */
44 /* ppa8548 board doesn't support PCI */
48 pci2: pcie@fe000a000 {
49 /* ppa8548 board doesn't support PCI */
53 rio: rapidio@fe00c0000 {
54 reg = <0xf 0xe00c0000 0x0 0x11000>;
56 ranges = <0x0 0x0 0x0 0x80000000 0x0 0x40000000>;
65 compatible = "cfi-flash";
66 reg = <0x0 0x0 0x00800000>;
76 reg = <0x7A0000 0x20000>;
82 reg = <0x7C0000 0x40000>;
92 compatible = "intersil,isl1208";
101 * Only ethernet controller @25000 and @26000 are used.
102 * Use alias enet2 and enet3 for the remainig controllers,
103 * to stay compatible with mpc8548si-pre.dtsi.
105 enet2: ethernet@24000 {
110 phy0: ethernet-phy@0 {
111 interrupts = <7 1 0 0>;
113 device_type = "ethernet-phy";
115 phy1: ethernet-phy@1 {
116 interrupts = <8 1 0 0>;
118 device_type = "ethernet-phy";
122 device_type = "tbi-phy";
126 enet0: ethernet@25000 {
127 tbi-handle = <&tbi1>;
128 phy-handle = <&phy0>;
134 device_type = "tbi-phy";
138 enet1: ethernet@26000 {
139 tbi-handle = <&tbi2>;
140 phy-handle = <&phy1>;
146 device_type = "tbi-phy";
150 enet3: ethernet@27000 {
157 device_type = "tbi-phy";
166 /include/ "fsl/mpc8548si-post.dtsi"