2 * Common prep/pmac/chrp boot and setup code.
5 #include <linux/module.h>
6 #include <linux/string.h>
7 #include <linux/sched.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/reboot.h>
11 #include <linux/delay.h>
12 #include <linux/initrd.h>
13 #include <linux/tty.h>
14 #include <linux/bootmem.h>
15 #include <linux/seq_file.h>
16 #include <linux/root_dev.h>
17 #include <linux/cpu.h>
18 #include <linux/console.h>
19 #include <linux/memblock.h>
23 #include <asm/processor.h>
24 #include <asm/pgtable.h>
25 #include <asm/setup.h>
28 #include <asm/cputable.h>
29 #include <asm/bootx.h>
30 #include <asm/btext.h>
31 #include <asm/machdep.h>
32 #include <asm/uaccess.h>
33 #include <asm/pmac_feature.h>
34 #include <asm/sections.h>
35 #include <asm/nvram.h>
38 #include <asm/serial.h>
40 #include <asm/mmu_context.h>
41 #include <asm/epapr_hcalls.h>
47 extern void bootx_init(unsigned long r4
, unsigned long phys
);
50 EXPORT_SYMBOL_GPL(boot_cpuid
);
52 EXPORT_SYMBOL_GPL(boot_cpuid_phys
);
54 int smp_hw_index
[NR_CPUS
];
56 unsigned long ISA_DMA_THRESHOLD
;
57 unsigned int DMA_MODE_READ
;
58 unsigned int DMA_MODE_WRITE
;
60 #ifdef CONFIG_VGA_CONSOLE
61 unsigned long vgacon_remap_base
;
62 EXPORT_SYMBOL(vgacon_remap_base
);
66 * These are used in binfmt_elf.c to put aux entries on the stack
67 * for each elf executable being started.
74 * We're called here very early in the boot. We determine the machine
75 * type and call the appropriate low-level setup functions.
76 * -- Cort <cort@fsmlabs.com>
78 * Note that the kernel may be running at an address which is different
79 * from the address that it was linked at, so we must use RELOC/PTRRELOC
80 * to access static data (including strings). -- paulus
82 notrace
unsigned long __init
early_init(unsigned long dt_ptr
)
84 unsigned long offset
= reloc_offset();
85 struct cpu_spec
*spec
;
87 /* First zero the BSS -- use memset_io, some platforms don't have
89 memset_io((void __iomem
*)PTRRELOC(&__bss_start
), 0,
90 __bss_stop
- __bss_start
);
93 * Identify the CPU type and fix up code sections
94 * that depend on which cpu we have.
96 spec
= identify_cpu(offset
, mfspr(SPRN_PVR
));
98 do_feature_fixups(spec
->cpu_features
,
99 PTRRELOC(&__start___ftr_fixup
),
100 PTRRELOC(&__stop___ftr_fixup
));
102 do_feature_fixups(spec
->mmu_features
,
103 PTRRELOC(&__start___mmu_ftr_fixup
),
104 PTRRELOC(&__stop___mmu_ftr_fixup
));
106 do_lwsync_fixups(spec
->cpu_features
,
107 PTRRELOC(&__start___lwsync_fixup
),
108 PTRRELOC(&__stop___lwsync_fixup
));
112 return KERNELBASE
+ offset
;
117 * Find out what kind of machine we're on and save any data we need
118 * from the early boot process (devtree is copied on pmac by prom_init()).
119 * This is called very early on the boot process, after a minimal
120 * MMU environment has been set up but before MMU_init is called.
122 notrace
void __init
machine_init(u64 dt_ptr
)
126 /* Enable early debugging if any specified (see udbg.h) */
129 /* Do some early initialization based on the flat device tree */
130 early_init_devtree(__va(dt_ptr
));
132 epapr_paravirt_early_init();
138 setup_kdump_trampoline();
141 if (cpu_has_feature(CPU_FTR_CAN_DOZE
) ||
142 cpu_has_feature(CPU_FTR_CAN_NAP
))
143 ppc_md
.power_save
= ppc6xx_idle
;
147 if (cpu_has_feature(CPU_FTR_CAN_DOZE
) ||
148 cpu_has_feature(CPU_FTR_CAN_NAP
))
149 ppc_md
.power_save
= e500_idle
;
152 ppc_md
.progress("id mach(): done", 0x200);
155 /* Checks "l2cr=xxxx" command-line option */
156 int __init
ppc_setup_l2cr(char *str
)
158 if (cpu_has_feature(CPU_FTR_L2CR
)) {
159 unsigned long val
= simple_strtoul(str
, NULL
, 0);
160 printk(KERN_INFO
"l2cr set to %lx\n", val
);
161 _set_L2CR(0); /* force invalidate by disable cache */
162 _set_L2CR(val
); /* and enable it */
166 __setup("l2cr=", ppc_setup_l2cr
);
168 /* Checks "l3cr=xxxx" command-line option */
169 int __init
ppc_setup_l3cr(char *str
)
171 if (cpu_has_feature(CPU_FTR_L3CR
)) {
172 unsigned long val
= simple_strtoul(str
, NULL
, 0);
173 printk(KERN_INFO
"l3cr set to %lx\n", val
);
174 _set_L3CR(val
); /* and enable it */
178 __setup("l3cr=", ppc_setup_l3cr
);
180 #ifdef CONFIG_GENERIC_NVRAM
182 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
183 unsigned char nvram_read_byte(int addr
)
185 if (ppc_md
.nvram_read_val
)
186 return ppc_md
.nvram_read_val(addr
);
189 EXPORT_SYMBOL(nvram_read_byte
);
191 void nvram_write_byte(unsigned char val
, int addr
)
193 if (ppc_md
.nvram_write_val
)
194 ppc_md
.nvram_write_val(addr
, val
);
196 EXPORT_SYMBOL(nvram_write_byte
);
198 ssize_t
nvram_get_size(void)
200 if (ppc_md
.nvram_size
)
201 return ppc_md
.nvram_size();
204 EXPORT_SYMBOL(nvram_get_size
);
206 void nvram_sync(void)
208 if (ppc_md
.nvram_sync
)
211 EXPORT_SYMBOL(nvram_sync
);
213 #endif /* CONFIG_NVRAM */
215 int __init
ppc_init(void)
217 /* clear the progress line */
219 ppc_md
.progress(" ", 0xffff);
221 /* call platform init */
222 if (ppc_md
.init
!= NULL
) {
228 arch_initcall(ppc_init
);
230 static void __init
irqstack_early_init(void)
234 /* interrupt stacks must be in lowmem, we get that for free on ppc32
235 * as the memblock is limited to lowmem by default */
236 for_each_possible_cpu(i
) {
237 softirq_ctx
[i
] = (struct thread_info
*)
238 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
239 hardirq_ctx
[i
] = (struct thread_info
*)
240 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
244 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
245 static void __init
exc_lvl_early_init(void)
247 unsigned int i
, hw_cpu
;
249 /* interrupt stacks must be in lowmem, we get that for free on ppc32
250 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
251 for_each_possible_cpu(i
) {
252 hw_cpu
= get_hard_smp_processor_id(i
);
253 critirq_ctx
[hw_cpu
] = (struct thread_info
*)
254 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
256 dbgirq_ctx
[hw_cpu
] = (struct thread_info
*)
257 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
258 mcheckirq_ctx
[hw_cpu
] = (struct thread_info
*)
259 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
264 #define exc_lvl_early_init()
267 /* Warning, IO base is not yet inited */
268 void __init
setup_arch(char **cmdline_p
)
270 *cmdline_p
= cmd_line
;
272 /* so udelay does something sensible, assume <= 1000 bogomips */
273 loops_per_jiffy
= 500000000 / HZ
;
275 unflatten_device_tree();
278 if (ppc_md
.init_early
)
281 find_legacy_serial_ports();
283 smp_setup_cpu_maps();
285 /* Register early console */
286 register_early_udbg_console();
291 * Set cache line size based on type of cpu as a default.
292 * Systems with OF can look in the properties on the cpu node(s)
293 * for a possibly more accurate value.
295 dcache_bsize
= cur_cpu_spec
->dcache_bsize
;
296 icache_bsize
= cur_cpu_spec
->icache_bsize
;
298 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE
))
299 ucache_bsize
= icache_bsize
= dcache_bsize
;
301 /* reboot on panic */
307 init_mm
.start_code
= (unsigned long)_stext
;
308 init_mm
.end_code
= (unsigned long) _etext
;
309 init_mm
.end_data
= (unsigned long) _edata
;
310 init_mm
.brk
= klimit
;
312 exc_lvl_early_init();
314 irqstack_early_init();
316 /* set up the bootmem stuff with available memory */
318 if ( ppc_md
.progress
) ppc_md
.progress("setup_arch: bootmem", 0x3eab);
320 #ifdef CONFIG_DUMMY_CONSOLE
321 conswitchp
= &dummy_con
;
324 if (ppc_md
.setup_arch
)
326 if ( ppc_md
.progress
) ppc_md
.progress("arch: exit", 0x3eab);
330 /* Initialize the MMU context management stuff */