3 * Common boot and setup code.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
15 #include <linux/export.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/seq_file.h>
24 #include <linux/ioport.h>
25 #include <linux/console.h>
26 #include <linux/utsname.h>
27 #include <linux/tty.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/bootmem.h>
35 #include <linux/pci.h>
36 #include <linux/lockdep.h>
37 #include <linux/memblock.h>
38 #include <linux/hugetlb.h>
41 #include <asm/kdump.h>
43 #include <asm/processor.h>
44 #include <asm/pgtable.h>
47 #include <asm/machdep.h>
50 #include <asm/cputable.h>
51 #include <asm/sections.h>
52 #include <asm/btext.h>
53 #include <asm/nvram.h>
54 #include <asm/setup.h>
56 #include <asm/iommu.h>
57 #include <asm/serial.h>
58 #include <asm/cache.h>
61 #include <asm/firmware.h>
64 #include <asm/kexec.h>
65 #include <asm/mmu_context.h>
66 #include <asm/code-patching.h>
67 #include <asm/kvm_ppc.h>
68 #include <asm/hugetlb.h>
69 #include <asm/epapr_hcalls.h>
74 #define DBG(fmt...) udbg_printf(fmt)
80 int spinning_secondaries
;
83 /* Pick defaults since we might want to patch instructions
84 * before we've read this from the device tree.
86 struct ppc64_caches ppc64_caches
= {
92 EXPORT_SYMBOL_GPL(ppc64_caches
);
95 * These are used in binfmt_elf.c to put aux entries on the stack
96 * for each elf executable being started.
104 static char *smt_enabled_cmdline
;
106 /* Look for ibm,smt-enabled OF option */
107 static void check_smt_enabled(void)
109 struct device_node
*dn
;
110 const char *smt_option
;
112 /* Default to enabling all threads */
113 smt_enabled_at_boot
= threads_per_core
;
115 /* Allow the command line to overrule the OF option */
116 if (smt_enabled_cmdline
) {
117 if (!strcmp(smt_enabled_cmdline
, "on"))
118 smt_enabled_at_boot
= threads_per_core
;
119 else if (!strcmp(smt_enabled_cmdline
, "off"))
120 smt_enabled_at_boot
= 0;
125 rc
= strict_strtol(smt_enabled_cmdline
, 10, &smt
);
127 smt_enabled_at_boot
=
128 min(threads_per_core
, (int)smt
);
131 dn
= of_find_node_by_path("/options");
133 smt_option
= of_get_property(dn
, "ibm,smt-enabled",
137 if (!strcmp(smt_option
, "on"))
138 smt_enabled_at_boot
= threads_per_core
;
139 else if (!strcmp(smt_option
, "off"))
140 smt_enabled_at_boot
= 0;
148 /* Look for smt-enabled= cmdline option */
149 static int __init
early_smt_enabled(char *p
)
151 smt_enabled_cmdline
= p
;
154 early_param("smt-enabled", early_smt_enabled
);
157 #define check_smt_enabled()
158 #endif /* CONFIG_SMP */
160 /** Fix up paca fields required for the boot cpu */
161 static void fixup_boot_paca(void)
163 /* The boot cpu is started */
164 get_paca()->cpu_start
= 1;
165 /* Allow percpu accesses to work until we setup percpu data */
166 get_paca()->data_offset
= 0;
170 * Early initialization entry point. This is called by head.S
171 * with MMU translation disabled. We rely on the "feature" of
172 * the CPU that ignores the top 2 bits of the address in real
173 * mode so we can access kernel globals normally provided we
174 * only toy with things in the RMO region. From here, we do
175 * some early parsing of the device-tree to setup out MEMBLOCK
176 * data structures, and allocate & initialize the hash table
177 * and segment tables so we can start running with translation
180 * It is this function which will call the probe() callback of
181 * the various platform types and copy the matching one to the
182 * global ppc_md structure. Your platform can eventually do
183 * some very early initializations from the probe() routine, but
184 * this is not recommended, be very careful as, for example, the
185 * device-tree is not accessible via normal means at this point.
188 void __init
early_setup(unsigned long dt_ptr
)
190 static __initdata
struct paca_struct boot_paca
;
192 /* -------- printk is _NOT_ safe to use here ! ------- */
194 /* Identify CPU type */
195 identify_cpu(0, mfspr(SPRN_PVR
));
197 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
198 initialise_paca(&boot_paca
, 0);
199 setup_paca(&boot_paca
);
202 /* Initialize lockdep early or else spinlocks will blow */
205 /* -------- printk is now safe to use ------- */
207 /* Enable early debugging if any specified (see udbg.h) */
210 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr
);
213 * Do early initialization using the flattened device
214 * tree, such as retrieving the physical memory map or
215 * calculating/retrieving the hash table size.
217 early_init_devtree(__va(dt_ptr
));
219 epapr_paravirt_early_init();
221 /* Now we know the logical id of our boot cpu, setup the paca. */
222 setup_paca(&paca
[boot_cpuid
]);
225 /* Probe the machine type */
228 setup_kdump_trampoline();
230 DBG("Found, Initializing memory management...\n");
232 /* Initialize the hash table or TLB handling */
238 * Reserve any gigantic pages requested on the command line.
239 * memblock needs to have been initialized by the time this is
240 * called since this will reserve memory.
242 reserve_hugetlb_gpages();
244 DBG(" <- early_setup()\n");
246 #ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
248 * This needs to be done *last* (after the above DBG() even)
250 * Right after we return from this function, we turn on the MMU
251 * which means the real-mode access trick that btext does will
252 * no longer work, it needs to switch to using a real MMU
253 * mapping. This call will ensure that it does
256 #endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */
260 void early_setup_secondary(void)
262 /* Mark interrupts enabled in PACA */
263 get_paca()->soft_enabled
= 0;
265 /* Initialize the hash table or TLB handling */
266 early_init_mmu_secondary();
269 #endif /* CONFIG_SMP */
271 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
272 void smp_release_cpus(void)
277 DBG(" -> smp_release_cpus()\n");
279 /* All secondary cpus are spinning on a common spinloop, release them
280 * all now so they can start to spin on their individual paca
281 * spinloops. For non SMP kernels, the secondary cpus never get out
282 * of the common spinloop.
285 ptr
= (unsigned long *)((unsigned long)&__secondary_hold_spinloop
287 *ptr
= __pa(generic_secondary_smp_init
);
289 /* And wait a bit for them to catch up */
290 for (i
= 0; i
< 100000; i
++) {
293 if (spinning_secondaries
== 0)
297 DBG("spinning_secondaries = %d\n", spinning_secondaries
);
299 DBG(" <- smp_release_cpus()\n");
301 #endif /* CONFIG_SMP || CONFIG_KEXEC */
304 * Initialize some remaining members of the ppc64_caches and systemcfg
306 * (at least until we get rid of them completely). This is mostly some
307 * cache informations about the CPU that will be used by cache flush
308 * routines and/or provided to userland
310 static void __init
initialize_cache_info(void)
312 struct device_node
*np
;
313 unsigned long num_cpus
= 0;
315 DBG(" -> initialize_cache_info()\n");
317 for_each_node_by_type(np
, "cpu") {
321 * We're assuming *all* of the CPUs have the same
322 * d-cache and i-cache sizes... -Peter
325 const __be32
*sizep
, *lsizep
;
329 lsize
= cur_cpu_spec
->dcache_bsize
;
330 sizep
= of_get_property(np
, "d-cache-size", NULL
);
332 size
= be32_to_cpu(*sizep
);
333 lsizep
= of_get_property(np
, "d-cache-block-size",
335 /* fallback if block size missing */
337 lsizep
= of_get_property(np
,
341 lsize
= be32_to_cpu(*lsizep
);
342 if (sizep
== NULL
|| lsizep
== NULL
)
343 DBG("Argh, can't find dcache properties ! "
344 "sizep: %p, lsizep: %p\n", sizep
, lsizep
);
346 ppc64_caches
.dsize
= size
;
347 ppc64_caches
.dline_size
= lsize
;
348 ppc64_caches
.log_dline_size
= __ilog2(lsize
);
349 ppc64_caches
.dlines_per_page
= PAGE_SIZE
/ lsize
;
352 lsize
= cur_cpu_spec
->icache_bsize
;
353 sizep
= of_get_property(np
, "i-cache-size", NULL
);
355 size
= be32_to_cpu(*sizep
);
356 lsizep
= of_get_property(np
, "i-cache-block-size",
359 lsizep
= of_get_property(np
,
363 lsize
= be32_to_cpu(*lsizep
);
364 if (sizep
== NULL
|| lsizep
== NULL
)
365 DBG("Argh, can't find icache properties ! "
366 "sizep: %p, lsizep: %p\n", sizep
, lsizep
);
368 ppc64_caches
.isize
= size
;
369 ppc64_caches
.iline_size
= lsize
;
370 ppc64_caches
.log_iline_size
= __ilog2(lsize
);
371 ppc64_caches
.ilines_per_page
= PAGE_SIZE
/ lsize
;
375 DBG(" <- initialize_cache_info()\n");
380 * Do some initial setup of the system. The parameters are those which
381 * were passed in from the bootloader.
383 void __init
setup_system(void)
385 DBG(" -> setup_system()\n");
387 /* Apply the CPUs-specific and firmware specific fixups to kernel
388 * text (nop out sections not relevant to this CPU or this firmware)
390 do_feature_fixups(cur_cpu_spec
->cpu_features
,
391 &__start___ftr_fixup
, &__stop___ftr_fixup
);
392 do_feature_fixups(cur_cpu_spec
->mmu_features
,
393 &__start___mmu_ftr_fixup
, &__stop___mmu_ftr_fixup
);
394 do_feature_fixups(powerpc_firmware_features
,
395 &__start___fw_ftr_fixup
, &__stop___fw_ftr_fixup
);
396 do_lwsync_fixups(cur_cpu_spec
->cpu_features
,
397 &__start___lwsync_fixup
, &__stop___lwsync_fixup
);
401 * Unflatten the device-tree passed by prom_init or kexec
403 unflatten_device_tree();
406 * Fill the ppc64_caches & systemcfg structures with informations
407 * retrieved from the device-tree.
409 initialize_cache_info();
411 #ifdef CONFIG_PPC_RTAS
413 * Initialize RTAS if available
416 #endif /* CONFIG_PPC_RTAS */
419 * Check if we have an initrd provided via the device-tree
424 * Do some platform specific early initializations, that includes
425 * setting up the hash table pointers. It also sets up some interrupt-mapping
426 * related options that will be used by finish_device_tree()
428 if (ppc_md
.init_early
)
432 * We can discover serial ports now since the above did setup the
433 * hash table management for us, thus ioremap works. We do that early
434 * so that further code can be debugged
436 find_legacy_serial_ports();
439 * Register early console
441 register_early_udbg_console();
448 smp_setup_cpu_maps();
452 /* Release secondary cpus out of their spinloops at 0x60 now that
453 * we can map physical -> logical CPU ids
458 printk("Starting Linux PPC64 %s\n", init_utsname()->version
);
460 printk("-----------------------------------------------------\n");
461 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size
);
462 printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size());
463 if (ppc64_caches
.dline_size
!= 0x80)
464 printk("ppc64_caches.dcache_line_size = 0x%x\n",
465 ppc64_caches
.dline_size
);
466 if (ppc64_caches
.iline_size
!= 0x80)
467 printk("ppc64_caches.icache_line_size = 0x%x\n",
468 ppc64_caches
.iline_size
);
469 #ifdef CONFIG_PPC_STD_MMU_64
471 printk("htab_address = 0x%p\n", htab_address
);
472 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask
);
473 #endif /* CONFIG_PPC_STD_MMU_64 */
474 if (PHYSICAL_START
> 0)
475 printk("physical_start = 0x%llx\n",
476 (unsigned long long)PHYSICAL_START
);
477 printk("-----------------------------------------------------\n");
479 DBG(" <- setup_system()\n");
482 /* This returns the limit below which memory accesses to the linear
483 * mapping are guarnateed not to cause a TLB or SLB miss. This is
484 * used to allocate interrupt or emergency stacks for which our
485 * exception entry path doesn't deal with being interrupted.
487 static u64
safe_stack_limit(void)
489 #ifdef CONFIG_PPC_BOOK3E
490 /* Freescale BookE bolts the entire linear mapping */
491 if (mmu_has_feature(MMU_FTR_TYPE_FSL_E
))
492 return linear_map_top
;
493 /* Other BookE, we assume the first GB is bolted */
496 /* BookS, the first segment is bolted */
497 if (mmu_has_feature(MMU_FTR_1T_SEGMENT
))
498 return 1UL << SID_SHIFT_1T
;
499 return 1UL << SID_SHIFT
;
503 static void __init
irqstack_early_init(void)
505 u64 limit
= safe_stack_limit();
509 * Interrupt stacks must be in the first segment since we
510 * cannot afford to take SLB misses on them.
512 for_each_possible_cpu(i
) {
513 softirq_ctx
[i
] = (struct thread_info
*)
514 __va(memblock_alloc_base(THREAD_SIZE
,
515 THREAD_SIZE
, limit
));
516 hardirq_ctx
[i
] = (struct thread_info
*)
517 __va(memblock_alloc_base(THREAD_SIZE
,
518 THREAD_SIZE
, limit
));
522 #ifdef CONFIG_PPC_BOOK3E
523 static void __init
exc_lvl_early_init(void)
525 extern unsigned int interrupt_base_book3e
;
526 extern unsigned int exc_debug_debug_book3e
;
530 for_each_possible_cpu(i
) {
531 critirq_ctx
[i
] = (struct thread_info
*)
532 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
533 dbgirq_ctx
[i
] = (struct thread_info
*)
534 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
535 mcheckirq_ctx
[i
] = (struct thread_info
*)
536 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
539 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC
))
540 patch_branch(&interrupt_base_book3e
+ (0x040 / 4) + 1,
541 (unsigned long)&exc_debug_debug_book3e
, 0);
544 #define exc_lvl_early_init()
548 * Stack space used when we detect a bad kernel stack pointer, and
549 * early in SMP boots before relocation is enabled.
551 static void __init
emergency_stack_init(void)
557 * Emergency stacks must be under 256MB, we cannot afford to take
558 * SLB misses on them. The ABI also requires them to be 128-byte
561 * Since we use these as temporary stacks during secondary CPU
562 * bringup, we need to get at them in real mode. This means they
563 * must also be within the RMO region.
565 limit
= min(safe_stack_limit(), ppc64_rma_size
);
567 for_each_possible_cpu(i
) {
569 sp
= memblock_alloc_base(THREAD_SIZE
, THREAD_SIZE
, limit
);
571 paca
[i
].emergency_sp
= __va(sp
);
576 * Called into from start_kernel this initializes bootmem, which is used
577 * to manage page allocation until mem_init is called.
579 void __init
setup_arch(char **cmdline_p
)
581 ppc64_boot_msg(0x12, "Setup Arch");
583 *cmdline_p
= cmd_line
;
586 * Set cache line size based on type of cpu as a default.
587 * Systems with OF can look in the properties on the cpu node(s)
588 * for a possibly more accurate value.
590 dcache_bsize
= ppc64_caches
.dline_size
;
591 icache_bsize
= ppc64_caches
.iline_size
;
593 /* reboot on panic */
599 init_mm
.start_code
= (unsigned long)_stext
;
600 init_mm
.end_code
= (unsigned long) _etext
;
601 init_mm
.end_data
= (unsigned long) _edata
;
602 init_mm
.brk
= klimit
;
603 #ifdef CONFIG_PPC_64K_PAGES
604 init_mm
.context
.pte_frag
= NULL
;
606 irqstack_early_init();
607 exc_lvl_early_init();
608 emergency_stack_init();
610 #ifdef CONFIG_PPC_STD_MMU_64
613 /* set up the bootmem stuff with available memory */
617 #ifdef CONFIG_DUMMY_CONSOLE
618 conswitchp
= &dummy_con
;
621 if (ppc_md
.setup_arch
)
626 /* Initialize the MMU context management stuff */
629 /* Interrupt code needs to be 64K-aligned */
630 if ((unsigned long)_stext
& 0xffff)
631 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
632 (unsigned long)_stext
);
634 ppc64_boot_msg(0x15, "Setup Done");
638 /* ToDo: do something useful if ppc_md is not yet setup. */
639 #define PPC64_LINUX_FUNCTION 0x0f000000
640 #define PPC64_IPL_MESSAGE 0xc0000000
641 #define PPC64_TERM_MESSAGE 0xb0000000
643 static void ppc64_do_msg(unsigned int src
, const char *msg
)
645 if (ppc_md
.progress
) {
648 sprintf(buf
, "%08X\n", src
);
649 ppc_md
.progress(buf
, 0);
650 snprintf(buf
, 128, "%s", msg
);
651 ppc_md
.progress(buf
, 0);
655 /* Print a boot progress message. */
656 void ppc64_boot_msg(unsigned int src
, const char *msg
)
658 ppc64_do_msg(PPC64_LINUX_FUNCTION
|PPC64_IPL_MESSAGE
|src
, msg
);
659 printk("[boot]%04x %s\n", src
, msg
);
663 #define PCPU_DYN_SIZE ()
665 static void * __init
pcpu_fc_alloc(unsigned int cpu
, size_t size
, size_t align
)
667 return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu
)), size
, align
,
668 __pa(MAX_DMA_ADDRESS
));
671 static void __init
pcpu_fc_free(void *ptr
, size_t size
)
673 free_bootmem(__pa(ptr
), size
);
676 static int pcpu_cpu_distance(unsigned int from
, unsigned int to
)
678 if (cpu_to_node(from
) == cpu_to_node(to
))
679 return LOCAL_DISTANCE
;
681 return REMOTE_DISTANCE
;
684 unsigned long __per_cpu_offset
[NR_CPUS
] __read_mostly
;
685 EXPORT_SYMBOL(__per_cpu_offset
);
687 void __init
setup_per_cpu_areas(void)
689 const size_t dyn_size
= PERCPU_MODULE_RESERVE
+ PERCPU_DYNAMIC_RESERVE
;
696 * Linear mapping is one of 4K, 1M and 16M. For 4K, no need
697 * to group units. For larger mappings, use 1M atom which
698 * should be large enough to contain a number of units.
700 if (mmu_linear_psize
== MMU_PAGE_4K
)
701 atom_size
= PAGE_SIZE
;
705 rc
= pcpu_embed_first_chunk(0, dyn_size
, atom_size
, pcpu_cpu_distance
,
706 pcpu_fc_alloc
, pcpu_fc_free
);
708 panic("cannot initialize percpu area (err=%d)", rc
);
710 delta
= (unsigned long)pcpu_base_addr
- (unsigned long)__per_cpu_start
;
711 for_each_possible_cpu(cpu
) {
712 __per_cpu_offset
[cpu
] = delta
+ pcpu_unit_offsets
[cpu
];
713 paca
[cpu
].data_offset
= __per_cpu_offset
[cpu
];
719 #if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO)
720 struct ppc_pci_io ppc_pci_io
;
721 EXPORT_SYMBOL(ppc_pci_io
);