?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
x86/efi: Enforce CONFIG_RELOCATABLE for EFI boot stub
[linux/fpc-iii.git] / arch / powerpc / kvm / booke.c
blob17722d82f1d1f500bd5579f544cf29b18e6cbd80
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
22 */
23
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/kvm_host.h>
27 #include <linux/gfp.h>
28 #include <linux/module.h>
29 #include <linux/vmalloc.h>
30 #include <linux/fs.h>
31
32 #include <asm/cputable.h>
33 #include <asm/uaccess.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/cacheflush.h>
36 #include <asm/dbell.h>
37 #include <asm/hw_irq.h>
38 #include <asm/irq.h>
39 #include <asm/time.h>
40
41 #include "timing.h"
42 #include "booke.h"
43 #include "trace.h"
44
45 unsigned long kvmppc_booke_handlers;
46
47 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
48 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
49
50 struct kvm_stats_debugfs_item debugfs_entries[] = {
51 { "mmio", VCPU_STAT(mmio_exits) },
52 { "dcr", VCPU_STAT(dcr_exits) },
53 { "sig", VCPU_STAT(signal_exits) },
54 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
55 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
56 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
57 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
58 { "sysc", VCPU_STAT(syscall_exits) },
59 { "isi", VCPU_STAT(isi_exits) },
60 { "dsi", VCPU_STAT(dsi_exits) },
61 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
62 { "dec", VCPU_STAT(dec_exits) },
63 { "ext_intr", VCPU_STAT(ext_intr_exits) },
64 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
65 { "doorbell", VCPU_STAT(dbell_exits) },
66 { "guest doorbell", VCPU_STAT(gdbell_exits) },
67 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
68 { NULL }
69 };
70
71 /* TODO: use vcpu_printf() */
72 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
73 {
74 int i;
75
76 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
77 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
78 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
79 vcpu->arch.shared->srr1);
80
81 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
82
83 for (i = 0; i < 32; i += 4) {
84 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
85 kvmppc_get_gpr(vcpu, i),
86 kvmppc_get_gpr(vcpu, i+1),
87 kvmppc_get_gpr(vcpu, i+2),
88 kvmppc_get_gpr(vcpu, i+3));
89 }
90 }
91
92 #ifdef CONFIG_SPE
93 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
94 {
95 preempt_disable();
96 enable_kernel_spe();
97 kvmppc_save_guest_spe(vcpu);
98 vcpu->arch.shadow_msr &= ~MSR_SPE;
99 preempt_enable();
100 }
101
102 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
103 {
104 preempt_disable();
105 enable_kernel_spe();
106 kvmppc_load_guest_spe(vcpu);
107 vcpu->arch.shadow_msr |= MSR_SPE;
108 preempt_enable();
109 }
110
111 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
112 {
113 if (vcpu->arch.shared->msr & MSR_SPE) {
114 if (!(vcpu->arch.shadow_msr & MSR_SPE))
115 kvmppc_vcpu_enable_spe(vcpu);
116 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
117 kvmppc_vcpu_disable_spe(vcpu);
118 }
119 }
120 #else
121 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
122 {
123 }
124 #endif
125
126 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
127 {
128 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
129 /* We always treat the FP bit as enabled from the host
130 perspective, so only need to adjust the shadow MSR */
131 vcpu->arch.shadow_msr &= ~MSR_FP;
132 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
133 #endif
134 }
135
136 /*
137 * Helper function for "full" MSR writes. No need to call this if only
138 * EE/CE/ME/DE/RI are changing.
139 */
140 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
141 {
142 u32 old_msr = vcpu->arch.shared->msr;
143
144 #ifdef CONFIG_KVM_BOOKE_HV
145 new_msr |= MSR_GS;
146 #endif
147
148 vcpu->arch.shared->msr = new_msr;
149
150 kvmppc_mmu_msr_notify(vcpu, old_msr);
151 kvmppc_vcpu_sync_spe(vcpu);
152 kvmppc_vcpu_sync_fpu(vcpu);
153 }
154
155 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
156 unsigned int priority)
157 {
158 trace_kvm_booke_queue_irqprio(vcpu, priority);
159 set_bit(priority, &vcpu->arch.pending_exceptions);
160 }
161
162 static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
163 ulong dear_flags, ulong esr_flags)
164 {
165 vcpu->arch.queued_dear = dear_flags;
166 vcpu->arch.queued_esr = esr_flags;
167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
168 }
169
170 static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
171 ulong dear_flags, ulong esr_flags)
172 {
173 vcpu->arch.queued_dear = dear_flags;
174 vcpu->arch.queued_esr = esr_flags;
175 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
176 }
177
178 static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
179 ulong esr_flags)
180 {
181 vcpu->arch.queued_esr = esr_flags;
182 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
183 }
184
185 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
186 ulong esr_flags)
187 {
188 vcpu->arch.queued_dear = dear_flags;
189 vcpu->arch.queued_esr = esr_flags;
190 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
191 }
192
193 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
194 {
195 vcpu->arch.queued_esr = esr_flags;
196 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
197 }
198
199 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
200 {
201 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
202 }
203
204 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
205 {
206 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
207 }
208
209 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
210 {
211 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
212 }
213
214 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
215 struct kvm_interrupt *irq)
216 {
217 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
218
219 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
220 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
221
222 kvmppc_booke_queue_irqprio(vcpu, prio);
223 }
224
225 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
226 {
227 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
228 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
229 }
230
231 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
232 {
233 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
234 }
235
236 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
237 {
238 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
239 }
240
241 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
242 {
243 #ifdef CONFIG_KVM_BOOKE_HV
244 mtspr(SPRN_GSRR0, srr0);
245 mtspr(SPRN_GSRR1, srr1);
246 #else
247 vcpu->arch.shared->srr0 = srr0;
248 vcpu->arch.shared->srr1 = srr1;
249 #endif
250 }
251
252 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
253 {
254 vcpu->arch.csrr0 = srr0;
255 vcpu->arch.csrr1 = srr1;
256 }
257
258 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
259 {
260 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
261 vcpu->arch.dsrr0 = srr0;
262 vcpu->arch.dsrr1 = srr1;
263 } else {
264 set_guest_csrr(vcpu, srr0, srr1);
265 }
266 }
267
268 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
269 {
270 vcpu->arch.mcsrr0 = srr0;
271 vcpu->arch.mcsrr1 = srr1;
272 }
273
274 static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
275 {
276 #ifdef CONFIG_KVM_BOOKE_HV
277 return mfspr(SPRN_GDEAR);
278 #else
279 return vcpu->arch.shared->dar;
280 #endif
281 }
282
283 static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
284 {
285 #ifdef CONFIG_KVM_BOOKE_HV
286 mtspr(SPRN_GDEAR, dear);
287 #else
288 vcpu->arch.shared->dar = dear;
289 #endif
290 }
291
292 static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
293 {
294 #ifdef CONFIG_KVM_BOOKE_HV
295 return mfspr(SPRN_GESR);
296 #else
297 return vcpu->arch.shared->esr;
298 #endif
299 }
300
301 static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
302 {
303 #ifdef CONFIG_KVM_BOOKE_HV
304 mtspr(SPRN_GESR, esr);
305 #else
306 vcpu->arch.shared->esr = esr;
307 #endif
308 }
309
310 static unsigned long get_guest_epr(struct kvm_vcpu *vcpu)
311 {
312 #ifdef CONFIG_KVM_BOOKE_HV
313 return mfspr(SPRN_GEPR);
314 #else
315 return vcpu->arch.epr;
316 #endif
317 }
318
319 /* Deliver the interrupt of the corresponding priority, if possible. */
320 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
321 unsigned int priority)
322 {
323 int allowed = 0;
324 ulong msr_mask = 0;
325 bool update_esr = false, update_dear = false, update_epr = false;
326 ulong crit_raw = vcpu->arch.shared->critical;
327 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
328 bool crit;
329 bool keep_irq = false;
330 enum int_class int_class;
331 ulong new_msr = vcpu->arch.shared->msr;
332
333 /* Truncate crit indicators in 32 bit mode */
334 if (!(vcpu->arch.shared->msr & MSR_SF)) {
335 crit_raw &= 0xffffffff;
336 crit_r1 &= 0xffffffff;
337 }
338
339 /* Critical section when crit == r1 */
340 crit = (crit_raw == crit_r1);
341 /* ... and we're in supervisor mode */
342 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
343
344 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
345 priority = BOOKE_IRQPRIO_EXTERNAL;
346 keep_irq = true;
347 }
348
349 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
350 update_epr = true;
351
352 switch (priority) {
353 case BOOKE_IRQPRIO_DTLB_MISS:
354 case BOOKE_IRQPRIO_DATA_STORAGE:
355 case BOOKE_IRQPRIO_ALIGNMENT:
356 update_dear = true;
357 /* fall through */
358 case BOOKE_IRQPRIO_INST_STORAGE:
359 case BOOKE_IRQPRIO_PROGRAM:
360 update_esr = true;
361 /* fall through */
362 case BOOKE_IRQPRIO_ITLB_MISS:
363 case BOOKE_IRQPRIO_SYSCALL:
364 case BOOKE_IRQPRIO_FP_UNAVAIL:
365 case BOOKE_IRQPRIO_SPE_UNAVAIL:
366 case BOOKE_IRQPRIO_SPE_FP_DATA:
367 case BOOKE_IRQPRIO_SPE_FP_ROUND:
368 case BOOKE_IRQPRIO_AP_UNAVAIL:
369 allowed = 1;
370 msr_mask = MSR_CE | MSR_ME | MSR_DE;
371 int_class = INT_CLASS_NONCRIT;
372 break;
373 case BOOKE_IRQPRIO_WATCHDOG:
374 case BOOKE_IRQPRIO_CRITICAL:
375 case BOOKE_IRQPRIO_DBELL_CRIT:
376 allowed = vcpu->arch.shared->msr & MSR_CE;
377 allowed = allowed && !crit;
378 msr_mask = MSR_ME;
379 int_class = INT_CLASS_CRIT;
380 break;
381 case BOOKE_IRQPRIO_MACHINE_CHECK:
382 allowed = vcpu->arch.shared->msr & MSR_ME;
383 allowed = allowed && !crit;
384 int_class = INT_CLASS_MC;
385 break;
386 case BOOKE_IRQPRIO_DECREMENTER:
387 case BOOKE_IRQPRIO_FIT:
388 keep_irq = true;
389 /* fall through */
390 case BOOKE_IRQPRIO_EXTERNAL:
391 case BOOKE_IRQPRIO_DBELL:
392 allowed = vcpu->arch.shared->msr & MSR_EE;
393 allowed = allowed && !crit;
394 msr_mask = MSR_CE | MSR_ME | MSR_DE;
395 int_class = INT_CLASS_NONCRIT;
396 break;
397 case BOOKE_IRQPRIO_DEBUG:
398 allowed = vcpu->arch.shared->msr & MSR_DE;
399 allowed = allowed && !crit;
400 msr_mask = MSR_ME;
401 int_class = INT_CLASS_CRIT;
402 break;
403 }
404
405 if (allowed) {
406 switch (int_class) {
407 case INT_CLASS_NONCRIT:
408 set_guest_srr(vcpu, vcpu->arch.pc,
409 vcpu->arch.shared->msr);
410 break;
411 case INT_CLASS_CRIT:
412 set_guest_csrr(vcpu, vcpu->arch.pc,
413 vcpu->arch.shared->msr);
414 break;
415 case INT_CLASS_DBG:
416 set_guest_dsrr(vcpu, vcpu->arch.pc,
417 vcpu->arch.shared->msr);
418 break;
419 case INT_CLASS_MC:
420 set_guest_mcsrr(vcpu, vcpu->arch.pc,
421 vcpu->arch.shared->msr);
422 break;
423 }
424
425 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
426 if (update_esr == true)
427 set_guest_esr(vcpu, vcpu->arch.queued_esr);
428 if (update_dear == true)
429 set_guest_dear(vcpu, vcpu->arch.queued_dear);
430 if (update_epr == true) {
431 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
432 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
433 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
434 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
435 kvmppc_mpic_set_epr(vcpu);
436 }
437 }
438
439 new_msr &= msr_mask;
440 #if defined(CONFIG_64BIT)
441 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
442 new_msr |= MSR_CM;
443 #endif
444 kvmppc_set_msr(vcpu, new_msr);
445
446 if (!keep_irq)
447 clear_bit(priority, &vcpu->arch.pending_exceptions);
448 }
449
450 #ifdef CONFIG_KVM_BOOKE_HV
451 /*
452 * If an interrupt is pending but masked, raise a guest doorbell
453 * so that we are notified when the guest enables the relevant
454 * MSR bit.
455 */
456 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
457 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
458 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
459 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
460 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
461 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
462 #endif
463
464 return allowed;
465 }
466
467 /*
468 * Return the number of jiffies until the next timeout. If the timeout is
469 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
470 * because the larger value can break the timer APIs.
471 */
472 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
473 {
474 u64 tb, wdt_tb, wdt_ticks = 0;
475 u64 nr_jiffies = 0;
476 u32 period = TCR_GET_WP(vcpu->arch.tcr);
477
478 wdt_tb = 1ULL << (63 - period);
479 tb = get_tb();
480 /*
481 * The watchdog timeout will hapeen when TB bit corresponding
482 * to watchdog will toggle from 0 to 1.
483 */
484 if (tb & wdt_tb)
485 wdt_ticks = wdt_tb;
486
487 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
488
489 /* Convert timebase ticks to jiffies */
490 nr_jiffies = wdt_ticks;
491
492 if (do_div(nr_jiffies, tb_ticks_per_jiffy))
493 nr_jiffies++;
494
495 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
496 }
497
498 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
499 {
500 unsigned long nr_jiffies;
501 unsigned long flags;
502
503 /*
504 * If TSR_ENW and TSR_WIS are not set then no need to exit to
505 * userspace, so clear the KVM_REQ_WATCHDOG request.
506 */
507 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
508 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
509
510 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
511 nr_jiffies = watchdog_next_timeout(vcpu);
512 /*
513 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
514 * then do not run the watchdog timer as this can break timer APIs.
515 */
516 if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
517 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
518 else
519 del_timer(&vcpu->arch.wdt_timer);
520 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
521 }
522
523 void kvmppc_watchdog_func(unsigned long data)
524 {
525 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
526 u32 tsr, new_tsr;
527 int final;
528
529 do {
530 new_tsr = tsr = vcpu->arch.tsr;
531 final = 0;
532
533 /* Time out event */
534 if (tsr & TSR_ENW) {
535 if (tsr & TSR_WIS)
536 final = 1;
537 else
538 new_tsr = tsr | TSR_WIS;
539 } else {
540 new_tsr = tsr | TSR_ENW;
541 }
542 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
543
544 if (new_tsr & TSR_WIS) {
545 smp_wmb();
546 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
547 kvm_vcpu_kick(vcpu);
548 }
549
550 /*
551 * If this is final watchdog expiry and some action is required
552 * then exit to userspace.
553 */
554 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
555 vcpu->arch.watchdog_enabled) {
556 smp_wmb();
557 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
558 kvm_vcpu_kick(vcpu);
559 }
560
561 /*
562 * Stop running the watchdog timer after final expiration to
563 * prevent the host from being flooded with timers if the
564 * guest sets a short period.
565 * Timers will resume when TSR/TCR is updated next time.
566 */
567 if (!final)
568 arm_next_watchdog(vcpu);
569 }
570
571 static void update_timer_ints(struct kvm_vcpu *vcpu)
572 {
573 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
574 kvmppc_core_queue_dec(vcpu);
575 else
576 kvmppc_core_dequeue_dec(vcpu);
577
578 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
579 kvmppc_core_queue_watchdog(vcpu);
580 else
581 kvmppc_core_dequeue_watchdog(vcpu);
582 }
583
584 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
585 {
586 unsigned long *pending = &vcpu->arch.pending_exceptions;
587 unsigned int priority;
588
589 priority = __ffs(*pending);
590 while (priority < BOOKE_IRQPRIO_MAX) {
591 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
592 break;
593
594 priority = find_next_bit(pending,
595 BITS_PER_BYTE * sizeof(*pending),
596 priority + 1);
597 }
598
599 /* Tell the guest about our interrupt status */
600 vcpu->arch.shared->int_pending = !!*pending;
601 }
602
603 /* Check pending exceptions and deliver one, if possible. */
604 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
605 {
606 int r = 0;
607 WARN_ON_ONCE(!irqs_disabled());
608
609 kvmppc_core_check_exceptions(vcpu);
610
611 if (vcpu->requests) {
612 /* Exception delivery raised request; start over */
613 return 1;
614 }
615
616 if (vcpu->arch.shared->msr & MSR_WE) {
617 local_irq_enable();
618 kvm_vcpu_block(vcpu);
619 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
620 local_irq_disable();
621
622 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
623 r = 1;
624 };
625
626 return r;
627 }
628
629 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
630 {
631 int r = 1; /* Indicate we want to get back into the guest */
632
633 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
634 update_timer_ints(vcpu);
635 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
636 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
637 kvmppc_core_flush_tlb(vcpu);
638 #endif
639
640 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
641 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
642 r = 0;
643 }
644
645 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
646 vcpu->run->epr.epr = 0;
647 vcpu->arch.epr_needed = true;
648 vcpu->run->exit_reason = KVM_EXIT_EPR;
649 r = 0;
650 }
651
652 return r;
653 }
654
655 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
656 {
657 int ret, s;
658 #ifdef CONFIG_PPC_FPU
659 unsigned int fpscr;
660 int fpexc_mode;
661 u64 fpr[32];
662 #endif
663
664 if (!vcpu->arch.sane) {
665 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
666 return -EINVAL;
667 }
668
669 local_irq_disable();
670 s = kvmppc_prepare_to_enter(vcpu);
671 if (s <= 0) {
672 local_irq_enable();
673 ret = s;
674 goto out;
675 }
676
677 #ifdef CONFIG_PPC_FPU
678 /* Save userspace FPU state in stack */
679 enable_kernel_fp();
680 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
681 fpscr = current->thread.fpscr.val;
682 fpexc_mode = current->thread.fpexc_mode;
683
684 /* Restore guest FPU state to thread */
685 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
686 current->thread.fpscr.val = vcpu->arch.fpscr;
687
688 /*
689 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
690 * as always using the FPU. Kernel usage of FP (via
691 * enable_kernel_fp()) in this thread must not occur while
692 * vcpu->fpu_active is set.
693 */
694 vcpu->fpu_active = 1;
695
696 kvmppc_load_guest_fp(vcpu);
697 #endif
698
699 kvmppc_fix_ee_before_entry();
700
701 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
702
703 /* No need for kvm_guest_exit. It's done in handle_exit.
704 We also get here with interrupts enabled. */
705
706 #ifdef CONFIG_PPC_FPU
707 kvmppc_save_guest_fp(vcpu);
708
709 vcpu->fpu_active = 0;
710
711 /* Save guest FPU state from thread */
712 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
713 vcpu->arch.fpscr = current->thread.fpscr.val;
714
715 /* Restore userspace FPU state from stack */
716 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
717 current->thread.fpscr.val = fpscr;
718 current->thread.fpexc_mode = fpexc_mode;
719 #endif
720
721 out:
722 vcpu->mode = OUTSIDE_GUEST_MODE;
723 return ret;
724 }
725
726 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
727 {
728 enum emulation_result er;
729
730 er = kvmppc_emulate_instruction(run, vcpu);
731 switch (er) {
732 case EMULATE_DONE:
733 /* don't overwrite subtypes, just account kvm_stats */
734 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
735 /* Future optimization: only reload non-volatiles if
736 * they were actually modified by emulation. */
737 return RESUME_GUEST_NV;
738
739 case EMULATE_DO_DCR:
740 run->exit_reason = KVM_EXIT_DCR;
741 return RESUME_HOST;
742
743 case EMULATE_FAIL:
744 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
745 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
746 /* For debugging, encode the failing instruction and
747 * report it to userspace. */
748 run->hw.hardware_exit_reason = ~0ULL << 32;
749 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
750 kvmppc_core_queue_program(vcpu, ESR_PIL);
751 return RESUME_HOST;
752
753 case EMULATE_EXIT_USER:
754 return RESUME_HOST;
755
756 default:
757 BUG();
758 }
759 }
760
761 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
762 {
763 ulong r1, ip, msr, lr;
764
765 asm("mr %0, 1" : "=r"(r1));
766 asm("mflr %0" : "=r"(lr));
767 asm("mfmsr %0" : "=r"(msr));
768 asm("bl 1f; 1: mflr %0" : "=r"(ip));
769
770 memset(regs, 0, sizeof(*regs));
771 regs->gpr[1] = r1;
772 regs->nip = ip;
773 regs->msr = msr;
774 regs->link = lr;
775 }
776
777 /*
778 * For interrupts needed to be handled by host interrupt handlers,
779 * corresponding host handler are called from here in similar way
780 * (but not exact) as they are called from low level handler
781 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
782 */
783 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
784 unsigned int exit_nr)
785 {
786 struct pt_regs regs;
787
788 switch (exit_nr) {
789 case BOOKE_INTERRUPT_EXTERNAL:
790 kvmppc_fill_pt_regs(&regs);
791 do_IRQ(&regs);
792 break;
793 case BOOKE_INTERRUPT_DECREMENTER:
794 kvmppc_fill_pt_regs(&regs);
795 timer_interrupt(&regs);
796 break;
797 #if defined(CONFIG_PPC_DOORBELL)
798 case BOOKE_INTERRUPT_DOORBELL:
799 kvmppc_fill_pt_regs(&regs);
800 doorbell_exception(&regs);
801 break;
802 #endif
803 case BOOKE_INTERRUPT_MACHINE_CHECK:
804 /* FIXME */
805 break;
806 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
807 kvmppc_fill_pt_regs(&regs);
808 performance_monitor_exception(&regs);
809 break;
810 case BOOKE_INTERRUPT_WATCHDOG:
811 kvmppc_fill_pt_regs(&regs);
812 #ifdef CONFIG_BOOKE_WDT
813 WatchdogException(&regs);
814 #else
815 unknown_exception(&regs);
816 #endif
817 break;
818 case BOOKE_INTERRUPT_CRITICAL:
819 unknown_exception(&regs);
820 break;
821 }
822 }
823
824 /**
825 * kvmppc_handle_exit
826 *
827 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
828 */
829 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
830 unsigned int exit_nr)
831 {
832 int r = RESUME_HOST;
833 int s;
834 int idx;
835
836 #ifdef CONFIG_PPC64
837 WARN_ON(local_paca->irq_happened != 0);
838 #endif
839
840 /*
841 * We enter with interrupts disabled in hardware, but
842 * we need to call hard_irq_disable anyway to ensure that
843 * the software state is kept in sync.
844 */
845 hard_irq_disable();
846
847 /* update before a new last_exit_type is rewritten */
848 kvmppc_update_timing_stats(vcpu);
849
850 /* restart interrupts if they were meant for the host */
851 kvmppc_restart_interrupt(vcpu, exit_nr);
852
853 local_irq_enable();
854
855 trace_kvm_exit(exit_nr, vcpu);
856 kvm_guest_exit();
857
858 run->exit_reason = KVM_EXIT_UNKNOWN;
859 run->ready_for_interrupt_injection = 1;
860
861 switch (exit_nr) {
862 case BOOKE_INTERRUPT_MACHINE_CHECK:
863 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
864 kvmppc_dump_vcpu(vcpu);
865 /* For debugging, send invalid exit reason to user space */
866 run->hw.hardware_exit_reason = ~1ULL << 32;
867 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
868 r = RESUME_HOST;
869 break;
870
871 case BOOKE_INTERRUPT_EXTERNAL:
872 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
873 r = RESUME_GUEST;
874 break;
875
876 case BOOKE_INTERRUPT_DECREMENTER:
877 kvmppc_account_exit(vcpu, DEC_EXITS);
878 r = RESUME_GUEST;
879 break;
880
881 case BOOKE_INTERRUPT_WATCHDOG:
882 r = RESUME_GUEST;
883 break;
884
885 case BOOKE_INTERRUPT_DOORBELL:
886 kvmppc_account_exit(vcpu, DBELL_EXITS);
887 r = RESUME_GUEST;
888 break;
889
890 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
891 kvmppc_account_exit(vcpu, GDBELL_EXITS);
892
893 /*
894 * We are here because there is a pending guest interrupt
895 * which could not be delivered as MSR_CE or MSR_ME was not
896 * set. Once we break from here we will retry delivery.
897 */
898 r = RESUME_GUEST;
899 break;
900
901 case BOOKE_INTERRUPT_GUEST_DBELL:
902 kvmppc_account_exit(vcpu, GDBELL_EXITS);
903
904 /*
905 * We are here because there is a pending guest interrupt
906 * which could not be delivered as MSR_EE was not set. Once
907 * we break from here we will retry delivery.
908 */
909 r = RESUME_GUEST;
910 break;
911
912 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
913 r = RESUME_GUEST;
914 break;
915
916 case BOOKE_INTERRUPT_HV_PRIV:
917 r = emulation_exit(run, vcpu);
918 break;
919
920 case BOOKE_INTERRUPT_PROGRAM:
921 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
922 /*
923 * Program traps generated by user-level software must
924 * be handled by the guest kernel.
925 *
926 * In GS mode, hypervisor privileged instructions trap
927 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
928 * actual program interrupts, handled by the guest.
929 */
930 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
931 r = RESUME_GUEST;
932 kvmppc_account_exit(vcpu, USR_PR_INST);
933 break;
934 }
935
936 r = emulation_exit(run, vcpu);
937 break;
938
939 case BOOKE_INTERRUPT_FP_UNAVAIL:
940 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
941 kvmppc_account_exit(vcpu, FP_UNAVAIL);
942 r = RESUME_GUEST;
943 break;
944
945 #ifdef CONFIG_SPE
946 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
947 if (vcpu->arch.shared->msr & MSR_SPE)
948 kvmppc_vcpu_enable_spe(vcpu);
949 else
950 kvmppc_booke_queue_irqprio(vcpu,
951 BOOKE_IRQPRIO_SPE_UNAVAIL);
952 r = RESUME_GUEST;
953 break;
954 }
955
956 case BOOKE_INTERRUPT_SPE_FP_DATA:
957 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
958 r = RESUME_GUEST;
959 break;
960
961 case BOOKE_INTERRUPT_SPE_FP_ROUND:
962 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
963 r = RESUME_GUEST;
964 break;
965 #else
966 case BOOKE_INTERRUPT_SPE_UNAVAIL:
967 /*
968 * Guest wants SPE, but host kernel doesn't support it. Send
969 * an "unimplemented operation" program check to the guest.
970 */
971 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
972 r = RESUME_GUEST;
973 break;
974
975 /*
976 * These really should never happen without CONFIG_SPE,
977 * as we should never enable the real MSR[SPE] in the guest.
978 */
979 case BOOKE_INTERRUPT_SPE_FP_DATA:
980 case BOOKE_INTERRUPT_SPE_FP_ROUND:
981 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
982 __func__, exit_nr, vcpu->arch.pc);
983 run->hw.hardware_exit_reason = exit_nr;
984 r = RESUME_HOST;
985 break;
986 #endif
987
988 case BOOKE_INTERRUPT_DATA_STORAGE:
989 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
990 vcpu->arch.fault_esr);
991 kvmppc_account_exit(vcpu, DSI_EXITS);
992 r = RESUME_GUEST;
993 break;
994
995 case BOOKE_INTERRUPT_INST_STORAGE:
996 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
997 kvmppc_account_exit(vcpu, ISI_EXITS);
998 r = RESUME_GUEST;
999 break;
1000
1001 case BOOKE_INTERRUPT_ALIGNMENT:
1002 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1003 vcpu->arch.fault_esr);
1004 r = RESUME_GUEST;
1005 break;
1006
1007 #ifdef CONFIG_KVM_BOOKE_HV
1008 case BOOKE_INTERRUPT_HV_SYSCALL:
1009 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1010 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1011 } else {
1012 /*
1013 * hcall from guest userspace -- send privileged
1014 * instruction program check.
1015 */
1016 kvmppc_core_queue_program(vcpu, ESR_PPR);
1017 }
1018
1019 r = RESUME_GUEST;
1020 break;
1021 #else
1022 case BOOKE_INTERRUPT_SYSCALL:
1023 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1024 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1025 /* KVM PV hypercalls */
1026 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1027 r = RESUME_GUEST;
1028 } else {
1029 /* Guest syscalls */
1030 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1031 }
1032 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1033 r = RESUME_GUEST;
1034 break;
1035 #endif
1036
1037 case BOOKE_INTERRUPT_DTLB_MISS: {
1038 unsigned long eaddr = vcpu->arch.fault_dear;
1039 int gtlb_index;
1040 gpa_t gpaddr;
1041 gfn_t gfn;
1042
1043 #ifdef CONFIG_KVM_E500V2
1044 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1045 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1046 kvmppc_map_magic(vcpu);
1047 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1048 r = RESUME_GUEST;
1049
1050 break;
1051 }
1052 #endif
1053
1054 /* Check the guest TLB. */
1055 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1056 if (gtlb_index < 0) {
1057 /* The guest didn't have a mapping for it. */
1058 kvmppc_core_queue_dtlb_miss(vcpu,
1059 vcpu->arch.fault_dear,
1060 vcpu->arch.fault_esr);
1061 kvmppc_mmu_dtlb_miss(vcpu);
1062 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1063 r = RESUME_GUEST;
1064 break;
1065 }
1066
1067 idx = srcu_read_lock(&vcpu->kvm->srcu);
1068
1069 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1070 gfn = gpaddr >> PAGE_SHIFT;
1071
1072 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1073 /* The guest TLB had a mapping, but the shadow TLB
1074 * didn't, and it is RAM. This could be because:
1075 * a) the entry is mapping the host kernel, or
1076 * b) the guest used a large mapping which we're faking
1077 * Either way, we need to satisfy the fault without
1078 * invoking the guest. */
1079 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1080 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1081 r = RESUME_GUEST;
1082 } else {
1083 /* Guest has mapped and accessed a page which is not
1084 * actually RAM. */
1085 vcpu->arch.paddr_accessed = gpaddr;
1086 vcpu->arch.vaddr_accessed = eaddr;
1087 r = kvmppc_emulate_mmio(run, vcpu);
1088 kvmppc_account_exit(vcpu, MMIO_EXITS);
1089 }
1090
1091 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1092 break;
1093 }
1094
1095 case BOOKE_INTERRUPT_ITLB_MISS: {
1096 unsigned long eaddr = vcpu->arch.pc;
1097 gpa_t gpaddr;
1098 gfn_t gfn;
1099 int gtlb_index;
1100
1101 r = RESUME_GUEST;
1102
1103 /* Check the guest TLB. */
1104 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1105 if (gtlb_index < 0) {
1106 /* The guest didn't have a mapping for it. */
1107 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1108 kvmppc_mmu_itlb_miss(vcpu);
1109 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1110 break;
1111 }
1112
1113 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1114
1115 idx = srcu_read_lock(&vcpu->kvm->srcu);
1116
1117 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1118 gfn = gpaddr >> PAGE_SHIFT;
1119
1120 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1121 /* The guest TLB had a mapping, but the shadow TLB
1122 * didn't. This could be because:
1123 * a) the entry is mapping the host kernel, or
1124 * b) the guest used a large mapping which we're faking
1125 * Either way, we need to satisfy the fault without
1126 * invoking the guest. */
1127 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1128 } else {
1129 /* Guest mapped and leaped at non-RAM! */
1130 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1131 }
1132
1133 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1134 break;
1135 }
1136
1137 case BOOKE_INTERRUPT_DEBUG: {
1138 u32 dbsr;
1139
1140 vcpu->arch.pc = mfspr(SPRN_CSRR0);
1141
1142 /* clear IAC events in DBSR register */
1143 dbsr = mfspr(SPRN_DBSR);
1144 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
1145 mtspr(SPRN_DBSR, dbsr);
1146
1147 run->exit_reason = KVM_EXIT_DEBUG;
1148 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1149 r = RESUME_HOST;
1150 break;
1151 }
1152
1153 default:
1154 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1155 BUG();
1156 }
1157
1158 /*
1159 * To avoid clobbering exit_reason, only check for signals if we
1160 * aren't already exiting to userspace for some other reason.
1161 */
1162 if (!(r & RESUME_HOST)) {
1163 local_irq_disable();
1164 s = kvmppc_prepare_to_enter(vcpu);
1165 if (s <= 0) {
1166 local_irq_enable();
1167 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1168 } else {
1169 kvmppc_fix_ee_before_entry();
1170 }
1171 }
1172
1173 return r;
1174 }
1175
1176 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1177 {
1178 u32 old_tsr = vcpu->arch.tsr;
1179
1180 vcpu->arch.tsr = new_tsr;
1181
1182 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1183 arm_next_watchdog(vcpu);
1184
1185 update_timer_ints(vcpu);
1186 }
1187
1188 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1189 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1190 {
1191 int i;
1192 int r;
1193
1194 vcpu->arch.pc = 0;
1195 vcpu->arch.shared->pir = vcpu->vcpu_id;
1196 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1197 kvmppc_set_msr(vcpu, 0);
1198
1199 #ifndef CONFIG_KVM_BOOKE_HV
1200 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
1201 vcpu->arch.shadow_pid = 1;
1202 vcpu->arch.shared->msr = 0;
1203 #endif
1204
1205 /* Eye-catching numbers so we know if the guest takes an interrupt
1206 * before it's programmed its own IVPR/IVORs. */
1207 vcpu->arch.ivpr = 0x55550000;
1208 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1209 vcpu->arch.ivor[i] = 0x7700 | i * 4;
1210
1211 kvmppc_init_timing_stats(vcpu);
1212
1213 r = kvmppc_core_vcpu_setup(vcpu);
1214 kvmppc_sanity_check(vcpu);
1215 return r;
1216 }
1217
1218 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1219 {
1220 /* setup watchdog timer once */
1221 spin_lock_init(&vcpu->arch.wdt_lock);
1222 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1223 (unsigned long)vcpu);
1224
1225 return 0;
1226 }
1227
1228 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1229 {
1230 del_timer_sync(&vcpu->arch.wdt_timer);
1231 }
1232
1233 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1234 {
1235 int i;
1236
1237 regs->pc = vcpu->arch.pc;
1238 regs->cr = kvmppc_get_cr(vcpu);
1239 regs->ctr = vcpu->arch.ctr;
1240 regs->lr = vcpu->arch.lr;
1241 regs->xer = kvmppc_get_xer(vcpu);
1242 regs->msr = vcpu->arch.shared->msr;
1243 regs->srr0 = vcpu->arch.shared->srr0;
1244 regs->srr1 = vcpu->arch.shared->srr1;
1245 regs->pid = vcpu->arch.pid;
1246 regs->sprg0 = vcpu->arch.shared->sprg0;
1247 regs->sprg1 = vcpu->arch.shared->sprg1;
1248 regs->sprg2 = vcpu->arch.shared->sprg2;
1249 regs->sprg3 = vcpu->arch.shared->sprg3;
1250 regs->sprg4 = vcpu->arch.shared->sprg4;
1251 regs->sprg5 = vcpu->arch.shared->sprg5;
1252 regs->sprg6 = vcpu->arch.shared->sprg6;
1253 regs->sprg7 = vcpu->arch.shared->sprg7;
1254
1255 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1256 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1257
1258 return 0;
1259 }
1260
1261 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1262 {
1263 int i;
1264
1265 vcpu->arch.pc = regs->pc;
1266 kvmppc_set_cr(vcpu, regs->cr);
1267 vcpu->arch.ctr = regs->ctr;
1268 vcpu->arch.lr = regs->lr;
1269 kvmppc_set_xer(vcpu, regs->xer);
1270 kvmppc_set_msr(vcpu, regs->msr);
1271 vcpu->arch.shared->srr0 = regs->srr0;
1272 vcpu->arch.shared->srr1 = regs->srr1;
1273 kvmppc_set_pid(vcpu, regs->pid);
1274 vcpu->arch.shared->sprg0 = regs->sprg0;
1275 vcpu->arch.shared->sprg1 = regs->sprg1;
1276 vcpu->arch.shared->sprg2 = regs->sprg2;
1277 vcpu->arch.shared->sprg3 = regs->sprg3;
1278 vcpu->arch.shared->sprg4 = regs->sprg4;
1279 vcpu->arch.shared->sprg5 = regs->sprg5;
1280 vcpu->arch.shared->sprg6 = regs->sprg6;
1281 vcpu->arch.shared->sprg7 = regs->sprg7;
1282
1283 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1284 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1285
1286 return 0;
1287 }
1288
1289 static void get_sregs_base(struct kvm_vcpu *vcpu,
1290 struct kvm_sregs *sregs)
1291 {
1292 u64 tb = get_tb();
1293
1294 sregs->u.e.features |= KVM_SREGS_E_BASE;
1295
1296 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1297 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1298 sregs->u.e.mcsr = vcpu->arch.mcsr;
1299 sregs->u.e.esr = get_guest_esr(vcpu);
1300 sregs->u.e.dear = get_guest_dear(vcpu);
1301 sregs->u.e.tsr = vcpu->arch.tsr;
1302 sregs->u.e.tcr = vcpu->arch.tcr;
1303 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1304 sregs->u.e.tb = tb;
1305 sregs->u.e.vrsave = vcpu->arch.vrsave;
1306 }
1307
1308 static int set_sregs_base(struct kvm_vcpu *vcpu,
1309 struct kvm_sregs *sregs)
1310 {
1311 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1312 return 0;
1313
1314 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1315 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1316 vcpu->arch.mcsr = sregs->u.e.mcsr;
1317 set_guest_esr(vcpu, sregs->u.e.esr);
1318 set_guest_dear(vcpu, sregs->u.e.dear);
1319 vcpu->arch.vrsave = sregs->u.e.vrsave;
1320 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1321
1322 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1323 vcpu->arch.dec = sregs->u.e.dec;
1324 kvmppc_emulate_dec(vcpu);
1325 }
1326
1327 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1328 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1329
1330 return 0;
1331 }
1332
1333 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1334 struct kvm_sregs *sregs)
1335 {
1336 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1337
1338 sregs->u.e.pir = vcpu->vcpu_id;
1339 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1340 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1341 sregs->u.e.decar = vcpu->arch.decar;
1342 sregs->u.e.ivpr = vcpu->arch.ivpr;
1343 }
1344
1345 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1346 struct kvm_sregs *sregs)
1347 {
1348 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1349 return 0;
1350
1351 if (sregs->u.e.pir != vcpu->vcpu_id)
1352 return -EINVAL;
1353
1354 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1355 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1356 vcpu->arch.decar = sregs->u.e.decar;
1357 vcpu->arch.ivpr = sregs->u.e.ivpr;
1358
1359 return 0;
1360 }
1361
1362 void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1363 {
1364 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1365
1366 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1367 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1368 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1369 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1370 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1371 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1372 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1373 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1374 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1375 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1376 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1377 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1378 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1379 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1380 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1381 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1382 }
1383
1384 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1385 {
1386 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1387 return 0;
1388
1389 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1390 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1391 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1392 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1393 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1394 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1395 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1396 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1397 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1398 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1399 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1400 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1401 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1402 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1403 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1404 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1405
1406 return 0;
1407 }
1408
1409 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1410 struct kvm_sregs *sregs)
1411 {
1412 sregs->pvr = vcpu->arch.pvr;
1413
1414 get_sregs_base(vcpu, sregs);
1415 get_sregs_arch206(vcpu, sregs);
1416 kvmppc_core_get_sregs(vcpu, sregs);
1417 return 0;
1418 }
1419
1420 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1421 struct kvm_sregs *sregs)
1422 {
1423 int ret;
1424
1425 if (vcpu->arch.pvr != sregs->pvr)
1426 return -EINVAL;
1427
1428 ret = set_sregs_base(vcpu, sregs);
1429 if (ret < 0)
1430 return ret;
1431
1432 ret = set_sregs_arch206(vcpu, sregs);
1433 if (ret < 0)
1434 return ret;
1435
1436 return kvmppc_core_set_sregs(vcpu, sregs);
1437 }
1438
1439 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1440 {
1441 int r = 0;
1442 union kvmppc_one_reg val;
1443 int size;
1444 long int i;
1445
1446 size = one_reg_size(reg->id);
1447 if (size > sizeof(val))
1448 return -EINVAL;
1449
1450 switch (reg->id) {
1451 case KVM_REG_PPC_IAC1:
1452 case KVM_REG_PPC_IAC2:
1453 case KVM_REG_PPC_IAC3:
1454 case KVM_REG_PPC_IAC4:
1455 i = reg->id - KVM_REG_PPC_IAC1;
1456 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac[i]);
1457 break;
1458 case KVM_REG_PPC_DAC1:
1459 case KVM_REG_PPC_DAC2:
1460 i = reg->id - KVM_REG_PPC_DAC1;
1461 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac[i]);
1462 break;
1463 case KVM_REG_PPC_EPR: {
1464 u32 epr = get_guest_epr(vcpu);
1465 val = get_reg_val(reg->id, epr);
1466 break;
1467 }
1468 #if defined(CONFIG_64BIT)
1469 case KVM_REG_PPC_EPCR:
1470 val = get_reg_val(reg->id, vcpu->arch.epcr);
1471 break;
1472 #endif
1473 case KVM_REG_PPC_TCR:
1474 val = get_reg_val(reg->id, vcpu->arch.tcr);
1475 break;
1476 case KVM_REG_PPC_TSR:
1477 val = get_reg_val(reg->id, vcpu->arch.tsr);
1478 break;
1479 case KVM_REG_PPC_DEBUG_INST:
1480 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV);
1481 break;
1482 default:
1483 r = kvmppc_get_one_reg(vcpu, reg->id, &val);
1484 break;
1485 }
1486
1487 if (r)
1488 return r;
1489
1490 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1491 r = -EFAULT;
1492
1493 return r;
1494 }
1495
1496 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1497 {
1498 int r = 0;
1499 union kvmppc_one_reg val;
1500 int size;
1501 long int i;
1502
1503 size = one_reg_size(reg->id);
1504 if (size > sizeof(val))
1505 return -EINVAL;
1506
1507 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1508 return -EFAULT;
1509
1510 switch (reg->id) {
1511 case KVM_REG_PPC_IAC1:
1512 case KVM_REG_PPC_IAC2:
1513 case KVM_REG_PPC_IAC3:
1514 case KVM_REG_PPC_IAC4:
1515 i = reg->id - KVM_REG_PPC_IAC1;
1516 vcpu->arch.dbg_reg.iac[i] = set_reg_val(reg->id, val);
1517 break;
1518 case KVM_REG_PPC_DAC1:
1519 case KVM_REG_PPC_DAC2:
1520 i = reg->id - KVM_REG_PPC_DAC1;
1521 vcpu->arch.dbg_reg.dac[i] = set_reg_val(reg->id, val);
1522 break;
1523 case KVM_REG_PPC_EPR: {
1524 u32 new_epr = set_reg_val(reg->id, val);
1525 kvmppc_set_epr(vcpu, new_epr);
1526 break;
1527 }
1528 #if defined(CONFIG_64BIT)
1529 case KVM_REG_PPC_EPCR: {
1530 u32 new_epcr = set_reg_val(reg->id, val);
1531 kvmppc_set_epcr(vcpu, new_epcr);
1532 break;
1533 }
1534 #endif
1535 case KVM_REG_PPC_OR_TSR: {
1536 u32 tsr_bits = set_reg_val(reg->id, val);
1537 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1538 break;
1539 }
1540 case KVM_REG_PPC_CLEAR_TSR: {
1541 u32 tsr_bits = set_reg_val(reg->id, val);
1542 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1543 break;
1544 }
1545 case KVM_REG_PPC_TSR: {
1546 u32 tsr = set_reg_val(reg->id, val);
1547 kvmppc_set_tsr(vcpu, tsr);
1548 break;
1549 }
1550 case KVM_REG_PPC_TCR: {
1551 u32 tcr = set_reg_val(reg->id, val);
1552 kvmppc_set_tcr(vcpu, tcr);
1553 break;
1554 }
1555 default:
1556 r = kvmppc_set_one_reg(vcpu, reg->id, &val);
1557 break;
1558 }
1559
1560 return r;
1561 }
1562
1563 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
1564 struct kvm_guest_debug *dbg)
1565 {
1566 return -EINVAL;
1567 }
1568
1569 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1570 {
1571 return -ENOTSUPP;
1572 }
1573
1574 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1575 {
1576 return -ENOTSUPP;
1577 }
1578
1579 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1580 struct kvm_translation *tr)
1581 {
1582 int r;
1583
1584 r = kvmppc_core_vcpu_translate(vcpu, tr);
1585 return r;
1586 }
1587
1588 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1589 {
1590 return -ENOTSUPP;
1591 }
1592
1593 void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
1594 struct kvm_memory_slot *dont)
1595 {
1596 }
1597
1598 int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
1599 unsigned long npages)
1600 {
1601 return 0;
1602 }
1603
1604 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1605 struct kvm_memory_slot *memslot,
1606 struct kvm_userspace_memory_region *mem)
1607 {
1608 return 0;
1609 }
1610
1611 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1612 struct kvm_userspace_memory_region *mem,
1613 const struct kvm_memory_slot *old)
1614 {
1615 }
1616
1617 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1618 {
1619 }
1620
1621 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1622 {
1623 #if defined(CONFIG_64BIT)
1624 vcpu->arch.epcr = new_epcr;
1625 #ifdef CONFIG_KVM_BOOKE_HV
1626 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1627 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
1628 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1629 #endif
1630 #endif
1631 }
1632
1633 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1634 {
1635 vcpu->arch.tcr = new_tcr;
1636 arm_next_watchdog(vcpu);
1637 update_timer_ints(vcpu);
1638 }
1639
1640 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1641 {
1642 set_bits(tsr_bits, &vcpu->arch.tsr);
1643 smp_wmb();
1644 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1645 kvm_vcpu_kick(vcpu);
1646 }
1647
1648 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1649 {
1650 clear_bits(tsr_bits, &vcpu->arch.tsr);
1651
1652 /*
1653 * We may have stopped the watchdog due to
1654 * being stuck on final expiration.
1655 */
1656 if (tsr_bits & (TSR_ENW | TSR_WIS))
1657 arm_next_watchdog(vcpu);
1658
1659 update_timer_ints(vcpu);
1660 }
1661
1662 void kvmppc_decrementer_func(unsigned long data)
1663 {
1664 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1665
1666 if (vcpu->arch.tcr & TCR_ARE) {
1667 vcpu->arch.dec = vcpu->arch.decar;
1668 kvmppc_emulate_dec(vcpu);
1669 }
1670
1671 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1672 }
1673
1674 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1675 {
1676 vcpu->cpu = smp_processor_id();
1677 current->thread.kvm_vcpu = vcpu;
1678 }
1679
1680 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1681 {
1682 current->thread.kvm_vcpu = NULL;
1683 vcpu->cpu = -1;
1684 }
1685
1686 int __init kvmppc_booke_init(void)
1687 {
1688 #ifndef CONFIG_KVM_BOOKE_HV
1689 unsigned long ivor[16];
1690 unsigned long *handler = kvmppc_booke_handler_addr;
1691 unsigned long max_ivor = 0;
1692 unsigned long handler_len;
1693 int i;
1694
1695 /* We install our own exception handlers by hijacking IVPR. IVPR must
1696 * be 16-bit aligned, so we need a 64KB allocation. */
1697 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1698 VCPU_SIZE_ORDER);
1699 if (!kvmppc_booke_handlers)
1700 return -ENOMEM;
1701
1702 /* XXX make sure our handlers are smaller than Linux's */
1703
1704 /* Copy our interrupt handlers to match host IVORs. That way we don't
1705 * have to swap the IVORs on every guest/host transition. */
1706 ivor[0] = mfspr(SPRN_IVOR0);
1707 ivor[1] = mfspr(SPRN_IVOR1);
1708 ivor[2] = mfspr(SPRN_IVOR2);
1709 ivor[3] = mfspr(SPRN_IVOR3);
1710 ivor[4] = mfspr(SPRN_IVOR4);
1711 ivor[5] = mfspr(SPRN_IVOR5);
1712 ivor[6] = mfspr(SPRN_IVOR6);
1713 ivor[7] = mfspr(SPRN_IVOR7);
1714 ivor[8] = mfspr(SPRN_IVOR8);
1715 ivor[9] = mfspr(SPRN_IVOR9);
1716 ivor[10] = mfspr(SPRN_IVOR10);
1717 ivor[11] = mfspr(SPRN_IVOR11);
1718 ivor[12] = mfspr(SPRN_IVOR12);
1719 ivor[13] = mfspr(SPRN_IVOR13);
1720 ivor[14] = mfspr(SPRN_IVOR14);
1721 ivor[15] = mfspr(SPRN_IVOR15);
1722
1723 for (i = 0; i < 16; i++) {
1724 if (ivor[i] > max_ivor)
1725 max_ivor = i;
1726
1727 handler_len = handler[i + 1] - handler[i];
1728 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1729 (void *)handler[i], handler_len);
1730 }
1731
1732 handler_len = handler[max_ivor + 1] - handler[max_ivor];
1733 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
1734 ivor[max_ivor] + handler_len);
1735 #endif /* !BOOKE_HV */
1736 return 0;
1737 }
1738
1739 void __exit kvmppc_booke_exit(void)
1740 {
1741 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1742 kvm_exit();
1743 }
Linux with added FPC-III support