2 * SMP support for PowerNV machines.
4 * Copyright 2011 IBM Corp.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/smp.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/init.h>
19 #include <linux/spinlock.h>
20 #include <linux/cpu.h>
25 #include <asm/machdep.h>
26 #include <asm/cputable.h>
27 #include <asm/firmware.h>
29 #include <asm/vdso_datapage.h>
30 #include <asm/cputhreads.h>
38 #define DBG(fmt...) udbg_printf(fmt)
43 static void pnv_smp_setup_cpu(int cpu
)
45 if (cpu
!= boot_cpuid
)
49 int pnv_smp_kick_cpu(int nr
)
51 unsigned int pcpu
= get_hard_smp_processor_id(nr
);
52 unsigned long start_here
= __pa(*((unsigned long *)
53 generic_secondary_smp_init
));
56 BUG_ON(nr
< 0 || nr
>= NR_CPUS
);
59 * If we already started or OPALv2 is not supported, we just
60 * kick the CPU via the PACA
62 if (paca
[nr
].cpu_start
|| !firmware_has_feature(FW_FEATURE_OPALv2
))
66 * At this point, the CPU can either be spinning on the way in
67 * from kexec or be inside OPAL waiting to be started for the
68 * first time. OPAL v3 allows us to query OPAL to know if it
69 * has the CPUs, so we do that
71 if (firmware_has_feature(FW_FEATURE_OPALv3
)) {
74 rc
= opal_query_cpu_status(pcpu
, &status
);
75 if (rc
!= OPAL_SUCCESS
) {
76 pr_warn("OPAL Error %ld querying CPU %d state\n",
82 * Already started, just kick it, probably coming from
85 if (status
== OPAL_THREAD_STARTED
)
89 * Available/inactive, let's kick it
91 if (status
== OPAL_THREAD_INACTIVE
) {
92 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n",
94 rc
= opal_start_cpu(pcpu
, start_here
);
95 if (rc
!= OPAL_SUCCESS
) {
96 pr_warn("OPAL Error %ld starting CPU %d\n",
102 * An unavailable CPU (or any other unknown status)
103 * shouldn't be started. It should also
104 * not be in the possible map but currently it can
107 pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
108 " (status %d)...\n", nr
, pcpu
, status
);
113 * On OPAL v2, we just kick it and hope for the best,
114 * we must not test the error from opal_start_cpu() or
115 * we would fail to get CPUs from kexec.
117 opal_start_cpu(pcpu
, start_here
);
120 return smp_generic_kick_cpu(nr
);
123 #ifdef CONFIG_HOTPLUG_CPU
125 static int pnv_smp_cpu_disable(void)
127 int cpu
= smp_processor_id();
129 /* This is identical to pSeries... might consolidate by
130 * moving migrate_irqs_away to a ppc_md with default to
131 * the generic fixup_irqs. --BenH.
133 set_cpu_online(cpu
, false);
134 vdso_data
->processorCount
--;
135 if (cpu
== boot_cpuid
)
136 boot_cpuid
= cpumask_any(cpu_online_mask
);
137 xics_migrate_irqs_away();
141 static void pnv_smp_cpu_kill_self(void)
145 /* Standard hot unplug procedure */
148 current
->active_mm
= NULL
; /* for sanity */
149 cpu
= smp_processor_id();
150 DBG("CPU%d offline\n", cpu
);
151 generic_set_cpu_dead(cpu
);
154 /* We don't want to take decrementer interrupts while we are offline,
155 * so clear LPCR:PECE1. We keep PECE2 enabled.
157 mtspr(SPRN_LPCR
, mfspr(SPRN_LPCR
) & ~(u64
)LPCR_PECE1
);
158 while (!generic_check_cpu_restart(cpu
)) {
160 if (!generic_check_cpu_restart(cpu
)) {
161 DBG("CPU%d Unexpected exit while offline !\n", cpu
);
162 /* We may be getting an IPI, so we re-enable
163 * interrupts to process it, it will be ignored
164 * since we aren't online (hopefully)
170 mtspr(SPRN_LPCR
, mfspr(SPRN_LPCR
) | LPCR_PECE1
);
171 DBG("CPU%d coming online...\n", cpu
);
174 #endif /* CONFIG_HOTPLUG_CPU */
176 static struct smp_ops_t pnv_smp_ops
= {
177 .message_pass
= smp_muxed_ipi_message_pass
,
178 .cause_ipi
= NULL
, /* Filled at runtime by xics_smp_probe() */
179 .probe
= xics_smp_probe
,
180 .kick_cpu
= pnv_smp_kick_cpu
,
181 .setup_cpu
= pnv_smp_setup_cpu
,
182 .cpu_bootable
= smp_generic_cpu_bootable
,
183 #ifdef CONFIG_HOTPLUG_CPU
184 .cpu_disable
= pnv_smp_cpu_disable
,
185 .cpu_die
= generic_cpu_die
,
186 #endif /* CONFIG_HOTPLUG_CPU */
189 /* This is called very early during platform setup_arch */
190 void __init
pnv_smp_init(void)
192 smp_ops
= &pnv_smp_ops
;
194 /* XXX We don't yet have a proper entry point from HAL, for
195 * now we rely on kexec-style entry from BML
198 #ifdef CONFIG_PPC_RTAS
199 /* Non-lpar has additional take/give timebase */
200 if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE
) {
201 smp_ops
->give_timebase
= rtas_give_timebase
;
202 smp_ops
->take_timebase
= rtas_take_timebase
;
204 #endif /* CONFIG_PPC_RTAS */
206 #ifdef CONFIG_HOTPLUG_CPU
207 ppc_md
.cpu_die
= pnv_smp_cpu_kill_self
;