2 *Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com), Gaisler Research
3 *Copyright (C) 2004 Stefan Holst (mail@s-holst.de), Uni-Stuttgart
4 *Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com),Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
7 #ifndef LEON_AMBA_H_INCLUDE
8 #define LEON_AMBA_H_INCLUDE
12 struct amba_prom_registers
{
13 unsigned int phys_addr
; /* The physical address of this register */
14 unsigned int reg_size
; /* How many bytes does this register take up? */
20 * The following defines the bits in the LEON UART Status Registers.
23 #define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
24 #define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
25 #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
26 #define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
27 #define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
28 #define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
29 #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
30 #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
33 * The following defines the bits in the LEON UART Ctrl Registers.
36 #define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
37 #define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
38 #define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
39 #define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter irq */
40 #define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
41 #define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
42 #define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
43 #define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
45 #define LEON3_GPTIMER_EN 1
46 #define LEON3_GPTIMER_RL 2
47 #define LEON3_GPTIMER_LD 4
48 #define LEON3_GPTIMER_IRQEN 8
49 #define LEON3_GPTIMER_SEPIRQ 8
50 #define LEON3_GPTIMER_TIMERS 0x7
52 #define LEON23_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */
53 /* 0 = hold scalar and counter */
54 #define LEON23_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */
56 #define LEON23_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */
58 #define LEON23_REG_TIMER_CONTROL_IQ 0x00000008 /* 1 = irq enable */
62 * The following defines the bits in the LEON PS/2 Status Registers.
65 #define LEON_REG_PS2_STATUS_DR 0x00000001 /* Data Ready */
66 #define LEON_REG_PS2_STATUS_PE 0x00000002 /* Parity error */
67 #define LEON_REG_PS2_STATUS_FE 0x00000004 /* Framing error */
68 #define LEON_REG_PS2_STATUS_KI 0x00000008 /* Keyboard inhibit */
69 #define LEON_REG_PS2_STATUS_RF 0x00000010 /* RX buffer full */
70 #define LEON_REG_PS2_STATUS_TF 0x00000020 /* TX buffer full */
73 * The following defines the bits in the LEON PS/2 Ctrl Registers.
76 #define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */
77 #define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */
78 #define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive irq */
79 #define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit irq */
81 #define LEON3_IRQMPSTATUS_CPUNR 28
82 #define LEON3_IRQMPSTATUS_BROADCAST 27
84 #define GPTIMER_CONFIG_IRQNT(a) (((a) >> 3) & 0x1f)
85 #define GPTIMER_CONFIG_ISSEP(a) ((a) & (1 << 8))
86 #define GPTIMER_CONFIG_NTIMERS(a) ((a) & (0x7))
87 #define LEON3_GPTIMER_CTRL_PENDING 0x10
88 #define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7)
89 #define LEON3_GPTIMER_CTRL_ISPENDING(r) (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0)
93 struct leon3_irqctrl_regs_map
{
111 /* Extended IRQ registers */
112 u32 intid
[16]; /* 0xc0 */
113 u32 unused
[(0x1000-0x100)/4];
116 struct leon3_apbuart_regs_map
{
123 struct leon3_gptimerelem_regs_map
{
130 struct leon3_gptimer_regs_map
{
135 struct leon3_gptimerelem_regs_map e
[8];
139 * Types and structure used for AMBA Plug & Play bus scanning
142 #define AMBA_MAXAPB_DEVS 64
143 #define AMBA_MAXAPB_DEVS_PERBUS 16
145 struct amba_device_table
{
146 int devnr
; /* number of devices on AHB or APB bus */
147 unsigned int *addr
[16]; /* addresses to the devices configuration tables */
148 unsigned int allocbits
[1]; /* 0=unallocated, 1=allocated driver */
151 struct amba_apbslv_device_table
{
152 int devnr
; /* number of devices on AHB or APB bus */
153 unsigned int *addr
[AMBA_MAXAPB_DEVS
]; /* addresses to the devices configuration tables */
154 unsigned int apbmst
[AMBA_MAXAPB_DEVS
]; /* apb master if a entry is a apb slave */
155 unsigned int apbmstidx
[AMBA_MAXAPB_DEVS
]; /* apb master idx if a entry is a apb slave */
156 unsigned int allocbits
[4]; /* 0=unallocated, 1=allocated driver */
159 struct amba_confarea_type
{
160 struct amba_confarea_type
*next
;/* next bus in chain */
161 struct amba_device_table ahbmst
;
162 struct amba_device_table ahbslv
;
163 struct amba_apbslv_device_table apbslv
;
167 /* collect apb slaves */
168 struct amba_apb_device
{
169 unsigned int start
, irq
, bus_id
;
170 struct amba_confarea_type
*bus
;
173 /* collect ahb slaves */
174 struct amba_ahb_device
{
175 unsigned int start
[4], irq
, bus_id
;
176 struct amba_confarea_type
*bus
;
180 void _amba_init(struct device_node
*dp
, struct device_node
***nextp
);
182 extern unsigned long amba_system_id
;
183 extern struct leon3_irqctrl_regs_map
*leon3_irqctrl_regs
;
184 extern struct leon3_gptimer_regs_map
*leon3_gptimer_regs
;
185 extern struct amba_apb_device leon_percpu_timer_dev
[16];
186 extern int leondebug_irq_disable
;
187 extern int leon_debug_irqout
;
188 extern unsigned long leon3_gptimer_irq
;
189 extern unsigned int sparc_leon_eirq
;
191 #endif /* __ASSEMBLY__ */
193 #define LEON3_IO_AREA 0xfff00000
194 #define LEON3_CONF_AREA 0xff000
195 #define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)
197 #define LEON3_AHB_CONF_WORDS 8
198 #define LEON3_APB_CONF_WORDS 2
199 #define LEON3_AHB_MASTERS 16
200 #define LEON3_AHB_SLAVES 16
201 #define LEON3_APB_SLAVES 16
202 #define LEON3_APBUARTS 8
205 #define VENDOR_GAISLER 1
206 #define VENDOR_PENDER 2
208 #define VENDOR_OPENCORES 8
210 /* Gaisler Research device id's */
211 #define GAISLER_LEON3 0x003
212 #define GAISLER_LEON3DSU 0x004
213 #define GAISLER_ETHAHB 0x005
214 #define GAISLER_APBMST 0x006
215 #define GAISLER_AHBUART 0x007
216 #define GAISLER_SRCTRL 0x008
217 #define GAISLER_SDCTRL 0x009
218 #define GAISLER_APBUART 0x00C
219 #define GAISLER_IRQMP 0x00D
220 #define GAISLER_AHBRAM 0x00E
221 #define GAISLER_GPTIMER 0x011
222 #define GAISLER_PCITRG 0x012
223 #define GAISLER_PCISBRG 0x013
224 #define GAISLER_PCIFBRG 0x014
225 #define GAISLER_PCITRACE 0x015
226 #define GAISLER_PCIDMA 0x016
227 #define GAISLER_AHBTRACE 0x017
228 #define GAISLER_ETHDSU 0x018
229 #define GAISLER_PIOPORT 0x01A
230 #define GAISLER_GRGPIO 0x01A
231 #define GAISLER_AHBJTAG 0x01c
232 #define GAISLER_ETHMAC 0x01D
233 #define GAISLER_AHB2AHB 0x020
234 #define GAISLER_USBDC 0x021
235 #define GAISLER_ATACTRL 0x024
236 #define GAISLER_DDRSPA 0x025
237 #define GAISLER_USBEHC 0x026
238 #define GAISLER_USBUHC 0x027
239 #define GAISLER_I2CMST 0x028
240 #define GAISLER_SPICTRL 0x02D
241 #define GAISLER_DDR2SPA 0x02E
242 #define GAISLER_SPIMCTRL 0x045
243 #define GAISLER_LEON4 0x048
244 #define GAISLER_LEON4DSU 0x049
245 #define GAISLER_AHBSTAT 0x052
246 #define GAISLER_FTMCTRL 0x054
247 #define GAISLER_KBD 0x060
248 #define GAISLER_VGA 0x061
249 #define GAISLER_SVGA 0x063
250 #define GAISLER_GRSYSMON 0x066
251 #define GAISLER_GRACECTRL 0x067
253 #define GAISLER_L2TIME 0xffd /* internal device: leon2 timer */
254 #define GAISLER_L2C 0xffe /* internal device: leon2compat */
255 #define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */
258 #define AEROFLEX_UT699 0x0699
259 #define LEON4_NEXTREME1 0x0102
260 #define GAISLER_GR712RC 0x0712
262 #define amba_vendor(x) (((x) >> 24) & 0xff)
264 #define amba_device(x) (((x) >> 12) & 0xfff)