arch/sparc/kernel/unaligned_64.c

   1 /*
   2  * unaligned.c: Unaligned load/store trap handling with special
   3  *              cases for the kernel to do them more quickly.
   4  *
   5  * Copyright (C) 1996,2008 David S. Miller (davem@davemloft.net)
   6  * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
   7  */
   8
   9
  10 #include <linux/jiffies.h>
  11 #include <linux/kernel.h>
  12 #include <linux/sched.h>
  13 #include <linux/mm.h>
  14 #include <linux/module.h>
  15 #include <asm/asi.h>
  16 #include <asm/ptrace.h>
  17 #include <asm/pstate.h>
  18 #include <asm/processor.h>
  19 #include <asm/uaccess.h>
  20 #include <linux/smp.h>
  21 #include <linux/bitops.h>
  22 #include <linux/perf_event.h>
  23 #include <linux/ratelimit.h>
  24 #include <asm/fpumacro.h>
  25 #include <asm/cacheflush.h>
  26
  27 enum direction {
  28         load,    /* ld, ldd, ldh, ldsh */
  29         store,   /* st, std, sth, stsh */
  30         both,    /* Swap, ldstub, cas, ... */
  31         fpld,
  32         fpst,
  33         invalid,
  34 };
  35
  36 static inline enum direction decode_direction(unsigned int insn)
  37 {
  38         unsigned long tmp = (insn >> 21) & 1;
  39
  40         if (!tmp)
  41                 return load;
  42         else {
  43                 switch ((insn>>19)&0xf) {
  44                 case 15: /* swap* */
  45                         return both;
  46                 default:
  47                         return store;
  48                 }
  49         }
  50 }
  51
  52 /* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
  53 static inline int decode_access_size(struct pt_regs *regs, unsigned int insn)
  54 {
  55         unsigned int tmp;
  56
  57         tmp = ((insn >> 19) & 0xf);
  58         if (tmp == 11 || tmp == 14) /* ldx/stx */
  59                 return 8;
  60         tmp &= 3;
  61         if (!tmp)
  62                 return 4;
  63         else if (tmp == 3)
  64                 return 16;      /* ldd/std - Although it is actually 8 */
  65         else if (tmp == 2)
  66                 return 2;
  67         else {
  68                 printk("Impossible unaligned trap. insn=%08x\n", insn);
  69                 die_if_kernel("Byte sized unaligned access?!?!", regs);
  70
  71                 /* GCC should never warn that control reaches the end
  72                  * of this function without returning a value because
  73                  * die_if_kernel() is marked with attribute 'noreturn'.
  74                  * Alas, some versions do...
  75                  */
  76
  77                 return 0;
  78         }
  79 }
  80
  81 static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
  82 {
  83         if (insn & 0x800000) {
  84                 if (insn & 0x2000)
  85                         return (unsigned char)(regs->tstate >> 24);     /* %asi */
  86                 else
  87                         return (unsigned char)(insn >> 5);              /* imm_asi */
  88         } else
  89                 return ASI_P;
  90 }
  91
  92 /* 0x400000 = signed, 0 = unsigned */
  93 static inline int decode_signedness(unsigned int insn)
  94 {
  95         return (insn & 0x400000);
  96 }
  97
  98 static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
  99                                        unsigned int rd, int from_kernel)
 100 {
 101         if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
 102                 if (from_kernel != 0)
 103                         __asm__ __volatile__("flushw");
 104                 else
 105                         flushw_user();
 106         }
 107 }
 108
 109 static inline long sign_extend_imm13(long imm)
 110 {
 111         return imm << 51 >> 51;
 112 }
 113
 114 static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
 115 {
 116         unsigned long value, fp;
 117
 118         if (reg < 16)
 119                 return (!reg ? 0 : regs->u_regs[reg]);
 120
 121         fp = regs->u_regs[UREG_FP];
 122
 123         if (regs->tstate & TSTATE_PRIV) {
 124                 struct reg_window *win;
 125                 win = (struct reg_window *)(fp + STACK_BIAS);
 126                 value = win->locals[reg - 16];
 127         } else if (!test_thread_64bit_stack(fp)) {
 128                 struct reg_window32 __user *win32;
 129                 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
 130                 get_user(value, &win32->locals[reg - 16]);
 131         } else {
 132                 struct reg_window __user *win;
 133                 win = (struct reg_window __user *)(fp + STACK_BIAS);
 134                 get_user(value, &win->locals[reg - 16]);
 135         }
 136         return value;
 137 }
 138
 139 static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
 140 {
 141         unsigned long fp;
 142
 143         if (reg < 16)
 144                 return &regs->u_regs[reg];
 145
 146         fp = regs->u_regs[UREG_FP];
 147
 148         if (regs->tstate & TSTATE_PRIV) {
 149                 struct reg_window *win;
 150                 win = (struct reg_window *)(fp + STACK_BIAS);
 151                 return &win->locals[reg - 16];
 152         } else if (!test_thread_64bit_stack(fp)) {
 153                 struct reg_window32 *win32;
 154                 win32 = (struct reg_window32 *)((unsigned long)((u32)fp));
 155                 return (unsigned long *)&win32->locals[reg - 16];
 156         } else {
 157                 struct reg_window *win;
 158                 win = (struct reg_window *)(fp + STACK_BIAS);
 159                 return &win->locals[reg - 16];
 160         }
 161 }
 162
 163 unsigned long compute_effective_address(struct pt_regs *regs,
 164                                         unsigned int insn, unsigned int rd)
 165 {
 166         int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
 167         unsigned int rs1 = (insn >> 14) & 0x1f;
 168         unsigned int rs2 = insn & 0x1f;
 169         unsigned long addr;
 170
 171         if (insn & 0x2000) {
 172                 maybe_flush_windows(rs1, 0, rd, from_kernel);
 173                 addr = (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
 174         } else {
 175                 maybe_flush_windows(rs1, rs2, rd, from_kernel);
 176                 addr = (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
 177         }
 178
 179         if (!from_kernel && test_thread_flag(TIF_32BIT))
 180                 addr &= 0xffffffff;
 181
 182         return addr;
 183 }
 184
 185 /* This is just to make gcc think die_if_kernel does return... */
 186 static void __used unaligned_panic(char *str, struct pt_regs *regs)
 187 {
 188         die_if_kernel(str, regs);
 189 }
 190
 191 extern int do_int_load(unsigned long *dest_reg, int size,
 192                        unsigned long *saddr, int is_signed, int asi);
 193
 194 extern int __do_int_store(unsigned long *dst_addr, int size,
 195                           unsigned long src_val, int asi);
 196
 197 static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
 198                                struct pt_regs *regs, int asi, int orig_asi)
 199 {
 200         unsigned long zero = 0;
 201         unsigned long *src_val_p = &zero;
 202         unsigned long src_val;
 203
 204         if (size == 16) {
 205                 size = 8;
 206                 zero = (((long)(reg_num ?
 207                         (unsigned)fetch_reg(reg_num, regs) : 0)) << 32) |
 208                         (unsigned)fetch_reg(reg_num + 1, regs);
 209         } else if (reg_num) {
 210                 src_val_p = fetch_reg_addr(reg_num, regs);
 211         }
 212         src_val = *src_val_p;
 213         if (unlikely(asi != orig_asi)) {
 214                 switch (size) {
 215                 case 2:
 216                         src_val = swab16(src_val);
 217                         break;
 218                 case 4:
 219                         src_val = swab32(src_val);
 220                         break;
 221                 case 8:
 222                         src_val = swab64(src_val);
 223                         break;
 224                 case 16:
 225                 default:
 226                         BUG();
 227                         break;
 228                 }
 229         }
 230         return __do_int_store(dst_addr, size, src_val, asi);
 231 }
 232
 233 static inline void advance(struct pt_regs *regs)
 234 {
 235         regs->tpc   = regs->tnpc;
 236         regs->tnpc += 4;
 237         if (test_thread_flag(TIF_32BIT)) {
 238                 regs->tpc &= 0xffffffff;
 239                 regs->tnpc &= 0xffffffff;
 240         }
 241 }
 242
 243 static inline int floating_point_load_or_store_p(unsigned int insn)
 244 {
 245         return (insn >> 24) & 1;
 246 }
 247
 248 static inline int ok_for_kernel(unsigned int insn)
 249 {
 250         return !floating_point_load_or_store_p(insn);
 251 }
 252
 253 static void kernel_mna_trap_fault(int fixup_tstate_asi)
 254 {
 255         struct pt_regs *regs = current_thread_info()->kern_una_regs;
 256         unsigned int insn = current_thread_info()->kern_una_insn;
 257         const struct exception_table_entry *entry;
 258
 259         entry = search_exception_tables(regs->tpc);
 260         if (!entry) {
 261                 unsigned long address;
 262
 263                 address = compute_effective_address(regs, insn,
 264                                                     ((insn >> 25) & 0x1f));
 265                 if (address < PAGE_SIZE) {
 266                         printk(KERN_ALERT "Unable to handle kernel NULL "
 267                                "pointer dereference in mna handler");
 268                 } else
 269                         printk(KERN_ALERT "Unable to handle kernel paging "
 270                                "request in mna handler");
 271                 printk(KERN_ALERT " at virtual address %016lx\n",address);
 272                 printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
 273                         (current->mm ? CTX_HWBITS(current->mm->context) :
 274                         CTX_HWBITS(current->active_mm->context)));
 275                 printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
 276                         (current->mm ? (unsigned long) current->mm->pgd :
 277                         (unsigned long) current->active_mm->pgd));
 278                 die_if_kernel("Oops", regs);
 279                 /* Not reached */
 280         }
 281         regs->tpc = entry->fixup;
 282         regs->tnpc = regs->tpc + 4;
 283
 284         if (fixup_tstate_asi) {
 285                 regs->tstate &= ~TSTATE_ASI;
 286                 regs->tstate |= (ASI_AIUS << 24UL);
 287         }
 288 }
 289
 290 static void log_unaligned(struct pt_regs *regs)
 291 {
 292         static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
 293
 294         if (__ratelimit(&ratelimit)) {
 295                 printk("Kernel unaligned access at TPC[%lx] %pS\n",
 296                        regs->tpc, (void *) regs->tpc);
 297         }
 298 }
 299
 300 asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
 301 {
 302         enum direction dir = decode_direction(insn);
 303         int size = decode_access_size(regs, insn);
 304         int orig_asi, asi;
 305
 306         current_thread_info()->kern_una_regs = regs;
 307         current_thread_info()->kern_una_insn = insn;
 308
 309         orig_asi = asi = decode_asi(insn, regs);
 310
 311         /* If this is a {get,put}_user() on an unaligned userspace pointer,
 312          * just signal a fault and do not log the event.
 313          */
 314         if (asi == ASI_AIUS) {
 315                 kernel_mna_trap_fault(0);
 316                 return;
 317         }
 318
 319         log_unaligned(regs);
 320
 321         if (!ok_for_kernel(insn) || dir == both) {
 322                 printk("Unsupported unaligned load/store trap for kernel "
 323                        "at <%016lx>.\n", regs->tpc);
 324                 unaligned_panic("Kernel does fpu/atomic "
 325                                 "unaligned load/store.", regs);
 326
 327                 kernel_mna_trap_fault(0);
 328         } else {
 329                 unsigned long addr, *reg_addr;
 330                 int err;
 331
 332                 addr = compute_effective_address(regs, insn,
 333                                                  ((insn >> 25) & 0x1f));
 334                 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
 335                 switch (asi) {
 336                 case ASI_NL:
 337                 case ASI_AIUPL:
 338                 case ASI_AIUSL:
 339                 case ASI_PL:
 340                 case ASI_SL:
 341                 case ASI_PNFL:
 342                 case ASI_SNFL:
 343                         asi &= ~0x08;
 344                         break;
 345                 }
 346                 switch (dir) {
 347                 case load:
 348                         reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
 349                         err = do_int_load(reg_addr, size,
 350                                           (unsigned long *) addr,
 351                                           decode_signedness(insn), asi);
 352                         if (likely(!err) && unlikely(asi != orig_asi)) {
 353                                 unsigned long val_in = *reg_addr;
 354                                 switch (size) {
 355                                 case 2:
 356                                         val_in = swab16(val_in);
 357                                         break;
 358                                 case 4:
 359                                         val_in = swab32(val_in);
 360                                         break;
 361                                 case 8:
 362                                         val_in = swab64(val_in);
 363                                         break;
 364                                 case 16:
 365                                 default:
 366                                         BUG();
 367                                         break;
 368                                 }
 369                                 *reg_addr = val_in;
 370                         }
 371                         break;
 372
 373                 case store:
 374                         err = do_int_store(((insn>>25)&0x1f), size,
 375                                            (unsigned long *) addr, regs,
 376                                            asi, orig_asi);
 377                         break;
 378
 379                 default:
 380                         panic("Impossible kernel unaligned trap.");
 381                         /* Not reached... */
 382                 }
 383                 if (unlikely(err))
 384                         kernel_mna_trap_fault(1);
 385                 else
 386                         advance(regs);
 387         }
 388 }
 389
 390 int handle_popc(u32 insn, struct pt_regs *regs)
 391 {
 392         int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
 393         int ret, rd = ((insn >> 25) & 0x1f);
 394         u64 value;
 395
 396         perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
 397         if (insn & 0x2000) {
 398                 maybe_flush_windows(0, 0, rd, from_kernel);
 399                 value = sign_extend_imm13(insn);
 400         } else {
 401                 maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
 402                 value = fetch_reg(insn & 0x1f, regs);
 403         }
 404         ret = hweight64(value);
 405         if (rd < 16) {
 406                 if (rd)
 407                         regs->u_regs[rd] = ret;
 408         } else {
 409                 unsigned long fp = regs->u_regs[UREG_FP];
 410
 411                 if (!test_thread_64bit_stack(fp)) {
 412                         struct reg_window32 __user *win32;
 413                         win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
 414                         put_user(ret, &win32->locals[rd - 16]);
 415                 } else {
 416                         struct reg_window __user *win;
 417                         win = (struct reg_window __user *)(fp + STACK_BIAS);
 418                         put_user(ret, &win->locals[rd - 16]);
 419                 }
 420         }
 421         advance(regs);
 422         return 1;
 423 }
 424
 425 extern void do_fpother(struct pt_regs *regs);
 426 extern void do_privact(struct pt_regs *regs);
 427 extern void spitfire_data_access_exception(struct pt_regs *regs,
 428                                            unsigned long sfsr,
 429                                            unsigned long sfar);
 430 extern void sun4v_data_access_exception(struct pt_regs *regs,
 431                                         unsigned long addr,
 432                                         unsigned long type_ctx);
 433
 434 int handle_ldf_stq(u32 insn, struct pt_regs *regs)
 435 {
 436         unsigned long addr = compute_effective_address(regs, insn, 0);
 437         int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
 438         struct fpustate *f = FPUSTATE;
 439         int asi = decode_asi(insn, regs);
 440         int flag = (freg < 32) ? FPRS_DL : FPRS_DU;
 441
 442         perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
 443
 444         save_and_clear_fpu();
 445         current_thread_info()->xfsr[0] &= ~0x1c000;
 446         if (freg & 3) {
 447                 current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
 448                 do_fpother(regs);
 449                 return 0;
 450         }
 451         if (insn & 0x200000) {
 452                 /* STQ */
 453                 u64 first = 0, second = 0;
 454
 455                 if (current_thread_info()->fpsaved[0] & flag) {
 456                         first = *(u64 *)&f->regs[freg];
 457                         second = *(u64 *)&f->regs[freg+2];
 458                 }
 459                 if (asi < 0x80) {
 460                         do_privact(regs);
 461                         return 1;
 462                 }
 463                 switch (asi) {
 464                 case ASI_P:
 465                 case ASI_S: break;
 466                 case ASI_PL:
 467                 case ASI_SL:
 468                         {
 469                                 /* Need to convert endians */
 470                                 u64 tmp = __swab64p(&first);
 471
 472                                 first = __swab64p(&second);
 473                                 second = tmp;
 474                                 break;
 475                         }
 476                 default:
 477                         if (tlb_type == hypervisor)
 478                                 sun4v_data_access_exception(regs, addr, 0);
 479                         else
 480                                 spitfire_data_access_exception(regs, 0, addr);
 481                         return 1;
 482                 }
 483                 if (put_user (first >> 32, (u32 __user *)addr) ||
 484                     __put_user ((u32)first, (u32 __user *)(addr + 4)) ||
 485                     __put_user (second >> 32, (u32 __user *)(addr + 8)) ||
 486                     __put_user ((u32)second, (u32 __user *)(addr + 12))) {
 487                         if (tlb_type == hypervisor)
 488                                 sun4v_data_access_exception(regs, addr, 0);
 489                         else
 490                                 spitfire_data_access_exception(regs, 0, addr);
 491                         return 1;
 492                 }
 493         } else {
 494                 /* LDF, LDDF, LDQF */
 495                 u32 data[4] __attribute__ ((aligned(8)));
 496                 int size, i;
 497                 int err;
 498
 499                 if (asi < 0x80) {
 500                         do_privact(regs);
 501                         return 1;
 502                 } else if (asi > ASI_SNFL) {
 503                         if (tlb_type == hypervisor)
 504                                 sun4v_data_access_exception(regs, addr, 0);
 505                         else
 506                                 spitfire_data_access_exception(regs, 0, addr);
 507                         return 1;
 508                 }
 509                 switch (insn & 0x180000) {
 510                 case 0x000000: size = 1; break;
 511                 case 0x100000: size = 4; break;
 512                 default: size = 2; break;
 513                 }
 514                 for (i = 0; i < size; i++)
 515                         data[i] = 0;
 516
 517                 err = get_user (data[0], (u32 __user *) addr);
 518                 if (!err) {
 519                         for (i = 1; i < size; i++)
 520                                 err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
 521                 }
 522                 if (err && !(asi & 0x2 /* NF */)) {
 523                         if (tlb_type == hypervisor)
 524                                 sun4v_data_access_exception(regs, addr, 0);
 525                         else
 526                                 spitfire_data_access_exception(regs, 0, addr);
 527                         return 1;
 528                 }
 529                 if (asi & 0x8) /* Little */ {
 530                         u64 tmp;
 531
 532                         switch (size) {
 533                         case 1: data[0] = le32_to_cpup(data + 0); break;
 534                         default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
 535                                 break;
 536                         case 4: tmp = le64_to_cpup((u64 *)(data + 0));
 537                                 *(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
 538                                 *(u64 *)(data + 2) = tmp;
 539                                 break;
 540                         }
 541                 }
 542                 if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
 543                         current_thread_info()->fpsaved[0] = FPRS_FEF;
 544                         current_thread_info()->gsr[0] = 0;
 545                 }
 546                 if (!(current_thread_info()->fpsaved[0] & flag)) {
 547                         if (freg < 32)
 548                                 memset(f->regs, 0, 32*sizeof(u32));
 549                         else
 550                                 memset(f->regs+32, 0, 32*sizeof(u32));
 551                 }
 552                 memcpy(f->regs + freg, data, size * 4);
 553                 current_thread_info()->fpsaved[0] |= flag;
 554         }
 555         advance(regs);
 556         return 1;
 557 }
 558
 559 void handle_ld_nf(u32 insn, struct pt_regs *regs)
 560 {
 561         int rd = ((insn >> 25) & 0x1f);
 562         int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
 563         unsigned long *reg;
 564
 565         perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
 566
 567         maybe_flush_windows(0, 0, rd, from_kernel);
 568         reg = fetch_reg_addr(rd, regs);
 569         if (from_kernel || rd < 16) {
 570                 reg[0] = 0;
 571                 if ((insn & 0x780000) == 0x180000)
 572                         reg[1] = 0;
 573         } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
 574                 put_user(0, (int __user *) reg);
 575                 if ((insn & 0x780000) == 0x180000)
 576                         put_user(0, ((int __user *) reg) + 1);
 577         } else {
 578                 put_user(0, (unsigned long __user *) reg);
 579                 if ((insn & 0x780000) == 0x180000)
 580                         put_user(0, (unsigned long __user *) reg + 1);
 581         }
 582         advance(regs);
 583 }
 584
 585 void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
 586 {
 587         unsigned long pc = regs->tpc;
 588         unsigned long tstate = regs->tstate;
 589         u32 insn;
 590         u64 value;
 591         u8 freg;
 592         int flag;
 593         struct fpustate *f = FPUSTATE;
 594
 595         if (tstate & TSTATE_PRIV)
 596                 die_if_kernel("lddfmna from kernel", regs);
 597         perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
 598         if (test_thread_flag(TIF_32BIT))
 599                 pc = (u32)pc;
 600         if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
 601                 int asi = decode_asi(insn, regs);
 602                 u32 first, second;
 603                 int err;
 604
 605                 if ((asi > ASI_SNFL) ||
 606                     (asi < ASI_P))
 607                         goto daex;
 608                 first = second = 0;
 609                 err = get_user(first, (u32 __user *)sfar);
 610                 if (!err)
 611                         err = get_user(second, (u32 __user *)(sfar + 4));
 612                 if (err) {
 613                         if (!(asi & 0x2))
 614                                 goto daex;
 615                         first = second = 0;
 616                 }
 617                 save_and_clear_fpu();
 618                 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
 619                 value = (((u64)first) << 32) | second;
 620                 if (asi & 0x8) /* Little */
 621                         value = __swab64p(&value);
 622                 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
 623                 if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
 624                         current_thread_info()->fpsaved[0] = FPRS_FEF;
 625                         current_thread_info()->gsr[0] = 0;
 626                 }
 627                 if (!(current_thread_info()->fpsaved[0] & flag)) {
 628                         if (freg < 32)
 629                                 memset(f->regs, 0, 32*sizeof(u32));
 630                         else
 631                                 memset(f->regs+32, 0, 32*sizeof(u32));
 632                 }
 633                 *(u64 *)(f->regs + freg) = value;
 634                 current_thread_info()->fpsaved[0] |= flag;
 635         } else {
 636 daex:
 637                 if (tlb_type == hypervisor)
 638                         sun4v_data_access_exception(regs, sfar, sfsr);
 639                 else
 640                         spitfire_data_access_exception(regs, sfsr, sfar);
 641                 return;
 642         }
 643         advance(regs);
 644 }
 645
 646 void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
 647 {
 648         unsigned long pc = regs->tpc;
 649         unsigned long tstate = regs->tstate;
 650         u32 insn;
 651         u64 value;
 652         u8 freg;
 653         int flag;
 654         struct fpustate *f = FPUSTATE;
 655
 656         if (tstate & TSTATE_PRIV)
 657                 die_if_kernel("stdfmna from kernel", regs);
 658         perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
 659         if (test_thread_flag(TIF_32BIT))
 660                 pc = (u32)pc;
 661         if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
 662                 int asi = decode_asi(insn, regs);
 663                 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
 664                 value = 0;
 665                 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
 666                 if ((asi > ASI_SNFL) ||
 667                     (asi < ASI_P))
 668                         goto daex;
 669                 save_and_clear_fpu();
 670                 if (current_thread_info()->fpsaved[0] & flag)
 671                         value = *(u64 *)&f->regs[freg];
 672                 switch (asi) {
 673                 case ASI_P:
 674                 case ASI_S: break;
 675                 case ASI_PL:
 676                 case ASI_SL:
 677                         value = __swab64p(&value); break;
 678                 default: goto daex;
 679                 }
 680                 if (put_user (value >> 32, (u32 __user *) sfar) ||
 681                     __put_user ((u32)value, (u32 __user *)(sfar + 4)))
 682                         goto daex;
 683         } else {
 684 daex:
 685                 if (tlb_type == hypervisor)
 686                         sun4v_data_access_exception(regs, sfar, sfsr);
 687                 else
 688                         spitfire_data_access_exception(regs, sfsr, sfar);
 689                 return;
 690         }
 691         advance(regs);
 692 }