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Merge tag 'for-linus-20190706' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / atm / solos-pci.c
blob5c4c6eeb505c526f3c356d1664a7e3da027b939e
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
4 * Traverse Technologies -- http://www.traverse.com.au/
5 * Xrio Limited -- http://www.xrio.com/
6 *
7 * Copyright © 2008 Traverse Technologies
8 * Copyright © 2008 Intel Corporation
9 *
10 * Authors: Nathan Williams <nathan@traverse.com.au>
11 * David Woodhouse <dwmw2@infradead.org>
12 * Treker Chen <treker@xrio.com>
13 */
14
15 #define DEBUG
16 #define VERBOSE_DEBUG
17
18 #include <linux/interrupt.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/errno.h>
22 #include <linux/ioport.h>
23 #include <linux/types.h>
24 #include <linux/pci.h>
25 #include <linux/atm.h>
26 #include <linux/atmdev.h>
27 #include <linux/skbuff.h>
28 #include <linux/sysfs.h>
29 #include <linux/device.h>
30 #include <linux/kobject.h>
31 #include <linux/firmware.h>
32 #include <linux/ctype.h>
33 #include <linux/swab.h>
34 #include <linux/slab.h>
35
36 #define VERSION "1.04"
37 #define DRIVER_VERSION 0x01
38 #define PTAG "solos-pci"
39
40 #define CONFIG_RAM_SIZE 128
41 #define FLAGS_ADDR 0x7C
42 #define IRQ_EN_ADDR 0x78
43 #define FPGA_VER 0x74
44 #define IRQ_CLEAR 0x70
45 #define WRITE_FLASH 0x6C
46 #define PORTS 0x68
47 #define FLASH_BLOCK 0x64
48 #define FLASH_BUSY 0x60
49 #define FPGA_MODE 0x5C
50 #define FLASH_MODE 0x58
51 #define GPIO_STATUS 0x54
52 #define DRIVER_VER 0x50
53 #define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
54 #define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
55
56 #define DATA_RAM_SIZE 32768
57 #define BUF_SIZE 2048
58 #define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
59 /* Old boards use ATMEL AD45DB161D flash */
60 #define ATMEL_FPGA_PAGE 528 /* FPGA flash page size*/
61 #define ATMEL_SOLOS_PAGE 512 /* Solos flash page size*/
62 #define ATMEL_FPGA_BLOCK (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
63 #define ATMEL_SOLOS_BLOCK (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
64 /* Current boards use M25P/M25PE SPI flash */
65 #define SPI_FLASH_BLOCK (256 * 64)
66
67 #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
68 #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
69 #define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2)
70
71 #define RX_DMA_SIZE 2048
72
73 #define FPGA_VERSION(a,b) (((a) << 8) + (b))
74 #define LEGACY_BUFFERS 2
75 #define DMA_SUPPORTED 4
76
77 static int reset = 0;
78 static int atmdebug = 0;
79 static int firmware_upgrade = 0;
80 static int fpga_upgrade = 0;
81 static int db_firmware_upgrade = 0;
82 static int db_fpga_upgrade = 0;
83
84 struct pkt_hdr {
85 __le16 size;
86 __le16 vpi;
87 __le16 vci;
88 __le16 type;
89 };
90
91 struct solos_skb_cb {
92 struct atm_vcc *vcc;
93 uint32_t dma_addr;
94 };
95
96
97 #define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb)
98
99 #define PKT_DATA 0
100 #define PKT_COMMAND 1
101 #define PKT_POPEN 3
102 #define PKT_PCLOSE 4
103 #define PKT_STATUS 5
104
105 struct solos_card {
106 void __iomem *config_regs;
107 void __iomem *buffers;
108 int nr_ports;
109 int tx_mask;
110 struct pci_dev *dev;
111 struct atm_dev *atmdev[4];
112 struct tasklet_struct tlet;
113 spinlock_t tx_lock;
114 spinlock_t tx_queue_lock;
115 spinlock_t cli_queue_lock;
116 spinlock_t param_queue_lock;
117 struct list_head param_queue;
118 struct sk_buff_head tx_queue[4];
119 struct sk_buff_head cli_queue[4];
120 struct sk_buff *tx_skb[4];
121 struct sk_buff *rx_skb[4];
122 unsigned char *dma_bounce;
123 wait_queue_head_t param_wq;
124 wait_queue_head_t fw_wq;
125 int using_dma;
126 int dma_alignment;
127 int fpga_version;
128 int buffer_size;
129 int atmel_flash;
130 };
131
132
133 struct solos_param {
134 struct list_head list;
135 pid_t pid;
136 int port;
137 struct sk_buff *response;
138 };
139
140 #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
141
142 MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
143 MODULE_DESCRIPTION("Solos PCI driver");
144 MODULE_VERSION(VERSION);
145 MODULE_LICENSE("GPL");
146 MODULE_FIRMWARE("solos-FPGA.bin");
147 MODULE_FIRMWARE("solos-Firmware.bin");
148 MODULE_FIRMWARE("solos-db-FPGA.bin");
149 MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
150 MODULE_PARM_DESC(atmdebug, "Print ATM data");
151 MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
152 MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
153 MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade");
154 MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade");
155 module_param(reset, int, 0444);
156 module_param(atmdebug, int, 0644);
157 module_param(firmware_upgrade, int, 0444);
158 module_param(fpga_upgrade, int, 0444);
159 module_param(db_firmware_upgrade, int, 0444);
160 module_param(db_fpga_upgrade, int, 0444);
161
162 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
163 struct atm_vcc *vcc);
164 static uint32_t fpga_tx(struct solos_card *);
165 static irqreturn_t solos_irq(int irq, void *dev_id);
166 static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
167 static int atm_init(struct solos_card *, struct device *);
168 static void atm_remove(struct solos_card *);
169 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
170 static void solos_bh(unsigned long);
171 static int print_buffer(struct sk_buff *buf);
172
173 static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
174 {
175 if (vcc->pop)
176 vcc->pop(vcc, skb);
177 else
178 dev_kfree_skb_any(skb);
179 }
180
181 static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
182 char *buf)
183 {
184 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
185 struct solos_card *card = atmdev->dev_data;
186 struct solos_param prm;
187 struct sk_buff *skb;
188 struct pkt_hdr *header;
189 int buflen;
190
191 buflen = strlen(attr->attr.name) + 10;
192
193 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
194 if (!skb) {
195 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
196 return -ENOMEM;
197 }
198
199 header = skb_put(skb, sizeof(*header));
200
201 buflen = snprintf((void *)&header[1], buflen - 1,
202 "L%05d\n%s\n", current->pid, attr->attr.name);
203 skb_put(skb, buflen);
204
205 header->size = cpu_to_le16(buflen);
206 header->vpi = cpu_to_le16(0);
207 header->vci = cpu_to_le16(0);
208 header->type = cpu_to_le16(PKT_COMMAND);
209
210 prm.pid = current->pid;
211 prm.response = NULL;
212 prm.port = SOLOS_CHAN(atmdev);
213
214 spin_lock_irq(&card->param_queue_lock);
215 list_add(&prm.list, &card->param_queue);
216 spin_unlock_irq(&card->param_queue_lock);
217
218 fpga_queue(card, prm.port, skb, NULL);
219
220 wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
221
222 spin_lock_irq(&card->param_queue_lock);
223 list_del(&prm.list);
224 spin_unlock_irq(&card->param_queue_lock);
225
226 if (!prm.response)
227 return -EIO;
228
229 buflen = prm.response->len;
230 memcpy(buf, prm.response->data, buflen);
231 kfree_skb(prm.response);
232
233 return buflen;
234 }
235
236 static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
237 const char *buf, size_t count)
238 {
239 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
240 struct solos_card *card = atmdev->dev_data;
241 struct solos_param prm;
242 struct sk_buff *skb;
243 struct pkt_hdr *header;
244 int buflen;
245 ssize_t ret;
246
247 buflen = strlen(attr->attr.name) + 11 + count;
248
249 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
250 if (!skb) {
251 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
252 return -ENOMEM;
253 }
254
255 header = skb_put(skb, sizeof(*header));
256
257 buflen = snprintf((void *)&header[1], buflen - 1,
258 "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
259
260 skb_put(skb, buflen);
261 header->size = cpu_to_le16(buflen);
262 header->vpi = cpu_to_le16(0);
263 header->vci = cpu_to_le16(0);
264 header->type = cpu_to_le16(PKT_COMMAND);
265
266 prm.pid = current->pid;
267 prm.response = NULL;
268 prm.port = SOLOS_CHAN(atmdev);
269
270 spin_lock_irq(&card->param_queue_lock);
271 list_add(&prm.list, &card->param_queue);
272 spin_unlock_irq(&card->param_queue_lock);
273
274 fpga_queue(card, prm.port, skb, NULL);
275
276 wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
277
278 spin_lock_irq(&card->param_queue_lock);
279 list_del(&prm.list);
280 spin_unlock_irq(&card->param_queue_lock);
281
282 skb = prm.response;
283
284 if (!skb)
285 return -EIO;
286
287 buflen = skb->len;
288
289 /* Sometimes it has a newline, sometimes it doesn't. */
290 if (skb->data[buflen - 1] == '\n')
291 buflen--;
292
293 if (buflen == 2 && !strncmp(skb->data, "OK", 2))
294 ret = count;
295 else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
296 ret = -EIO;
297 else {
298 /* We know we have enough space allocated for this; we allocated
299 it ourselves */
300 skb->data[buflen] = 0;
301
302 dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
303 skb->data);
304 ret = -EIO;
305 }
306 kfree_skb(skb);
307
308 return ret;
309 }
310
311 static char *next_string(struct sk_buff *skb)
312 {
313 int i = 0;
314 char *this = skb->data;
315
316 for (i = 0; i < skb->len; i++) {
317 if (this[i] == '\n') {
318 this[i] = 0;
319 skb_pull(skb, i + 1);
320 return this;
321 }
322 if (!isprint(this[i]))
323 return NULL;
324 }
325 return NULL;
326 }
327
328 /*
329 * Status packet has fields separated by \n, starting with a version number
330 * for the information therein. Fields are....
331 *
332 * packet version
333 * RxBitRate (version >= 1)
334 * TxBitRate (version >= 1)
335 * State (version >= 1)
336 * LocalSNRMargin (version >= 1)
337 * LocalLineAttn (version >= 1)
338 */
339 static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
340 {
341 char *str, *state_str, *snr, *attn;
342 int ver, rate_up, rate_down, err;
343
344 if (!card->atmdev[port])
345 return -ENODEV;
346
347 str = next_string(skb);
348 if (!str)
349 return -EIO;
350
351 err = kstrtoint(str, 10, &ver);
352 if (err) {
353 dev_warn(&card->dev->dev, "Unexpected status interrupt version\n");
354 return err;
355 }
356 if (ver < 1) {
357 dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
358 ver);
359 return -EIO;
360 }
361
362 str = next_string(skb);
363 if (!str)
364 return -EIO;
365 if (!strcmp(str, "ERROR")) {
366 dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n",
367 port);
368 return 0;
369 }
370
371 err = kstrtoint(str, 10, &rate_down);
372 if (err)
373 return err;
374
375 str = next_string(skb);
376 if (!str)
377 return -EIO;
378 err = kstrtoint(str, 10, &rate_up);
379 if (err)
380 return err;
381
382 state_str = next_string(skb);
383 if (!state_str)
384 return -EIO;
385
386 /* Anything but 'Showtime' is down */
387 if (strcmp(state_str, "Showtime")) {
388 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST);
389 dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str);
390 return 0;
391 }
392
393 snr = next_string(skb);
394 if (!snr)
395 return -EIO;
396 attn = next_string(skb);
397 if (!attn)
398 return -EIO;
399
400 dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n",
401 port, state_str, rate_down/1000, rate_up/1000,
402 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
403
404 card->atmdev[port]->link_rate = rate_down / 424;
405 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND);
406
407 return 0;
408 }
409
410 static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
411 {
412 struct solos_param *prm;
413 unsigned long flags;
414 int cmdpid;
415 int found = 0, err;
416
417 if (skb->len < 7)
418 return 0;
419
420 if (skb->data[0] != 'L' || !isdigit(skb->data[1]) ||
421 !isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
422 !isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
423 skb->data[6] != '\n')
424 return 0;
425
426 err = kstrtoint(&skb->data[1], 10, &cmdpid);
427 if (err)
428 return err;
429
430 spin_lock_irqsave(&card->param_queue_lock, flags);
431 list_for_each_entry(prm, &card->param_queue, list) {
432 if (prm->port == port && prm->pid == cmdpid) {
433 prm->response = skb;
434 skb_pull(skb, 7);
435 wake_up(&card->param_wq);
436 found = 1;
437 break;
438 }
439 }
440 spin_unlock_irqrestore(&card->param_queue_lock, flags);
441 return found;
442 }
443
444 static ssize_t console_show(struct device *dev, struct device_attribute *attr,
445 char *buf)
446 {
447 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
448 struct solos_card *card = atmdev->dev_data;
449 struct sk_buff *skb;
450 unsigned int len;
451
452 spin_lock(&card->cli_queue_lock);
453 skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
454 spin_unlock(&card->cli_queue_lock);
455 if(skb == NULL)
456 return sprintf(buf, "No data.\n");
457
458 len = skb->len;
459 memcpy(buf, skb->data, len);
460
461 kfree_skb(skb);
462 return len;
463 }
464
465 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
466 {
467 struct sk_buff *skb;
468 struct pkt_hdr *header;
469
470 if (size > (BUF_SIZE - sizeof(*header))) {
471 dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n");
472 return 0;
473 }
474 skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
475 if (!skb) {
476 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
477 return 0;
478 }
479
480 header = skb_put(skb, sizeof(*header));
481
482 header->size = cpu_to_le16(size);
483 header->vpi = cpu_to_le16(0);
484 header->vci = cpu_to_le16(0);
485 header->type = cpu_to_le16(PKT_COMMAND);
486
487 skb_put_data(skb, buf, size);
488
489 fpga_queue(card, dev, skb, NULL);
490
491 return 0;
492 }
493
494 static ssize_t console_store(struct device *dev, struct device_attribute *attr,
495 const char *buf, size_t count)
496 {
497 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
498 struct solos_card *card = atmdev->dev_data;
499 int err;
500
501 err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
502
503 return err?:count;
504 }
505
506 struct geos_gpio_attr {
507 struct device_attribute attr;
508 int offset;
509 };
510
511 #define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset) \
512 struct geos_gpio_attr gpio_attr_##_name = { \
513 .attr = __ATTR(_name, _mode, _show, _store), \
514 .offset = _offset }
515
516 static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
517 const char *buf, size_t count)
518 {
519 struct pci_dev *pdev = to_pci_dev(dev);
520 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
521 struct solos_card *card = pci_get_drvdata(pdev);
522 uint32_t data32;
523
524 if (count != 1 && (count != 2 || buf[1] != '\n'))
525 return -EINVAL;
526
527 spin_lock_irq(&card->param_queue_lock);
528 data32 = ioread32(card->config_regs + GPIO_STATUS);
529 if (buf[0] == '1') {
530 data32 |= 1 << gattr->offset;
531 iowrite32(data32, card->config_regs + GPIO_STATUS);
532 } else if (buf[0] == '0') {
533 data32 &= ~(1 << gattr->offset);
534 iowrite32(data32, card->config_regs + GPIO_STATUS);
535 } else {
536 count = -EINVAL;
537 }
538 spin_unlock_irq(&card->param_queue_lock);
539 return count;
540 }
541
542 static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
543 char *buf)
544 {
545 struct pci_dev *pdev = to_pci_dev(dev);
546 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
547 struct solos_card *card = pci_get_drvdata(pdev);
548 uint32_t data32;
549
550 data32 = ioread32(card->config_regs + GPIO_STATUS);
551 data32 = (data32 >> gattr->offset) & 1;
552
553 return sprintf(buf, "%d\n", data32);
554 }
555
556 static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
557 char *buf)
558 {
559 struct pci_dev *pdev = to_pci_dev(dev);
560 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
561 struct solos_card *card = pci_get_drvdata(pdev);
562 uint32_t data32;
563
564 data32 = ioread32(card->config_regs + GPIO_STATUS);
565 switch (gattr->offset) {
566 case 0:
567 /* HardwareVersion */
568 data32 = data32 & 0x1F;
569 break;
570 case 1:
571 /* HardwareVariant */
572 data32 = (data32 >> 5) & 0x0F;
573 break;
574 }
575 return sprintf(buf, "%d\n", data32);
576 }
577
578 static DEVICE_ATTR_RW(console);
579
580
581 #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
582 #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
583
584 #include "solos-attrlist.c"
585
586 static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9);
587 static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10);
588 static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11);
589 static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12);
590 static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13);
591 static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14);
592 static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0);
593 static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1);
594 #undef SOLOS_ATTR_RO
595 #undef SOLOS_ATTR_RW
596
597 #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
598 #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
599
600 static struct attribute *solos_attrs[] = {
601 #include "solos-attrlist.c"
602 NULL
603 };
604
605 static const struct attribute_group solos_attr_group = {
606 .attrs = solos_attrs,
607 .name = "parameters",
608 };
609
610 static struct attribute *gpio_attrs[] = {
611 &gpio_attr_GPIO1.attr.attr,
612 &gpio_attr_GPIO2.attr.attr,
613 &gpio_attr_GPIO3.attr.attr,
614 &gpio_attr_GPIO4.attr.attr,
615 &gpio_attr_GPIO5.attr.attr,
616 &gpio_attr_PushButton.attr.attr,
617 &gpio_attr_HardwareVersion.attr.attr,
618 &gpio_attr_HardwareVariant.attr.attr,
619 NULL
620 };
621
622 static const struct attribute_group gpio_attr_group = {
623 .attrs = gpio_attrs,
624 .name = "gpio",
625 };
626
627 static int flash_upgrade(struct solos_card *card, int chip)
628 {
629 const struct firmware *fw;
630 const char *fw_name;
631 int blocksize = 0;
632 int numblocks = 0;
633 int offset;
634
635 switch (chip) {
636 case 0:
637 fw_name = "solos-FPGA.bin";
638 if (card->atmel_flash)
639 blocksize = ATMEL_FPGA_BLOCK;
640 else
641 blocksize = SPI_FLASH_BLOCK;
642 break;
643 case 1:
644 fw_name = "solos-Firmware.bin";
645 if (card->atmel_flash)
646 blocksize = ATMEL_SOLOS_BLOCK;
647 else
648 blocksize = SPI_FLASH_BLOCK;
649 break;
650 case 2:
651 if (card->fpga_version > LEGACY_BUFFERS){
652 fw_name = "solos-db-FPGA.bin";
653 if (card->atmel_flash)
654 blocksize = ATMEL_FPGA_BLOCK;
655 else
656 blocksize = SPI_FLASH_BLOCK;
657 } else {
658 dev_info(&card->dev->dev, "FPGA version doesn't support"
659 " daughter board upgrades\n");
660 return -EPERM;
661 }
662 break;
663 case 3:
664 if (card->fpga_version > LEGACY_BUFFERS){
665 fw_name = "solos-Firmware.bin";
666 if (card->atmel_flash)
667 blocksize = ATMEL_SOLOS_BLOCK;
668 else
669 blocksize = SPI_FLASH_BLOCK;
670 } else {
671 dev_info(&card->dev->dev, "FPGA version doesn't support"
672 " daughter board upgrades\n");
673 return -EPERM;
674 }
675 break;
676 default:
677 return -ENODEV;
678 }
679
680 if (request_firmware(&fw, fw_name, &card->dev->dev))
681 return -ENOENT;
682
683 dev_info(&card->dev->dev, "Flash upgrade starting\n");
684
685 /* New FPGAs require driver version before permitting flash upgrades */
686 iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
687
688 numblocks = fw->size / blocksize;
689 dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
690 dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
691
692 dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
693 iowrite32(1, card->config_regs + FPGA_MODE);
694 (void) ioread32(card->config_regs + FPGA_MODE);
695
696 /* Set mode to Chip Erase */
697 if(chip == 0 || chip == 2)
698 dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n");
699 if(chip == 1 || chip == 3)
700 dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n");
701 iowrite32((chip * 2), card->config_regs + FLASH_MODE);
702
703
704 iowrite32(1, card->config_regs + WRITE_FLASH);
705 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
706
707 for (offset = 0; offset < fw->size; offset += blocksize) {
708 int i;
709
710 /* Clear write flag */
711 iowrite32(0, card->config_regs + WRITE_FLASH);
712
713 /* Set mode to Block Write */
714 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
715 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
716
717 /* Copy block to buffer, swapping each 16 bits for Atmel flash */
718 for(i = 0; i < blocksize; i += 4) {
719 uint32_t word;
720 if (card->atmel_flash)
721 word = swahb32p((uint32_t *)(fw->data + offset + i));
722 else
723 word = *(uint32_t *)(fw->data + offset + i);
724 if(card->fpga_version > LEGACY_BUFFERS)
725 iowrite32(word, FLASH_BUF + i);
726 else
727 iowrite32(word, RX_BUF(card, 3) + i);
728 }
729
730 /* Specify block number and then trigger flash write */
731 iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
732 iowrite32(1, card->config_regs + WRITE_FLASH);
733 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
734 }
735
736 release_firmware(fw);
737 iowrite32(0, card->config_regs + WRITE_FLASH);
738 iowrite32(0, card->config_regs + FPGA_MODE);
739 iowrite32(0, card->config_regs + FLASH_MODE);
740 dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
741 return 0;
742 }
743
744 static irqreturn_t solos_irq(int irq, void *dev_id)
745 {
746 struct solos_card *card = dev_id;
747 int handled = 1;
748
749 iowrite32(0, card->config_regs + IRQ_CLEAR);
750
751 /* If we're up and running, just kick the tasklet to process TX/RX */
752 if (card->atmdev[0])
753 tasklet_schedule(&card->tlet);
754 else
755 wake_up(&card->fw_wq);
756
757 return IRQ_RETVAL(handled);
758 }
759
760 static void solos_bh(unsigned long card_arg)
761 {
762 struct solos_card *card = (void *)card_arg;
763 uint32_t card_flags;
764 uint32_t rx_done = 0;
765 int port;
766
767 /*
768 * Since fpga_tx() is going to need to read the flags under its lock,
769 * it can return them to us so that we don't have to hit PCI MMIO
770 * again for the same information
771 */
772 card_flags = fpga_tx(card);
773
774 for (port = 0; port < card->nr_ports; port++) {
775 if (card_flags & (0x10 << port)) {
776 struct pkt_hdr _hdr, *header;
777 struct sk_buff *skb;
778 struct atm_vcc *vcc;
779 int size;
780
781 if (card->using_dma) {
782 skb = card->rx_skb[port];
783 card->rx_skb[port] = NULL;
784
785 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr,
786 RX_DMA_SIZE, DMA_FROM_DEVICE);
787
788 header = (void *)skb->data;
789 size = le16_to_cpu(header->size);
790 skb_put(skb, size + sizeof(*header));
791 skb_pull(skb, sizeof(*header));
792 } else {
793 header = &_hdr;
794
795 rx_done |= 0x10 << port;
796
797 memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
798
799 size = le16_to_cpu(header->size);
800 if (size > (card->buffer_size - sizeof(*header))){
801 dev_warn(&card->dev->dev, "Invalid buffer size\n");
802 continue;
803 }
804
805 /* Use netdev_alloc_skb() because it adds NET_SKB_PAD of
806 * headroom, and ensures we can route packets back out an
807 * Ethernet interface (for example) without having to
808 * reallocate. Adding NET_IP_ALIGN also ensures that both
809 * PPPoATM and PPPoEoBR2684 packets end up aligned. */
810 skb = netdev_alloc_skb_ip_align(NULL, size + 1);
811 if (!skb) {
812 if (net_ratelimit())
813 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
814 continue;
815 }
816
817 memcpy_fromio(skb_put(skb, size),
818 RX_BUF(card, port) + sizeof(*header),
819 size);
820 }
821 if (atmdebug) {
822 dev_info(&card->dev->dev, "Received: port %d\n", port);
823 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
824 size, le16_to_cpu(header->vpi),
825 le16_to_cpu(header->vci));
826 print_buffer(skb);
827 }
828
829 switch (le16_to_cpu(header->type)) {
830 case PKT_DATA:
831 vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi),
832 le16_to_cpu(header->vci));
833 if (!vcc) {
834 if (net_ratelimit())
835 dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n",
836 le16_to_cpu(header->vpi), le16_to_cpu(header->vci),
837 port);
838 dev_kfree_skb_any(skb);
839 break;
840 }
841 atm_charge(vcc, skb->truesize);
842 vcc->push(vcc, skb);
843 atomic_inc(&vcc->stats->rx);
844 break;
845
846 case PKT_STATUS:
847 if (process_status(card, port, skb) &&
848 net_ratelimit()) {
849 dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port);
850 print_buffer(skb);
851 }
852 dev_kfree_skb_any(skb);
853 break;
854
855 case PKT_COMMAND:
856 default: /* FIXME: Not really, surely? */
857 if (process_command(card, port, skb))
858 break;
859 spin_lock(&card->cli_queue_lock);
860 if (skb_queue_len(&card->cli_queue[port]) > 10) {
861 if (net_ratelimit())
862 dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
863 port);
864 dev_kfree_skb_any(skb);
865 } else
866 skb_queue_tail(&card->cli_queue[port], skb);
867 spin_unlock(&card->cli_queue_lock);
868 break;
869 }
870 }
871 /* Allocate RX skbs for any ports which need them */
872 if (card->using_dma && card->atmdev[port] &&
873 !card->rx_skb[port]) {
874 /* Unlike the MMIO case (qv) we can't add NET_IP_ALIGN
875 * here; the FPGA can only DMA to addresses which are
876 * aligned to 4 bytes. */
877 struct sk_buff *skb = dev_alloc_skb(RX_DMA_SIZE);
878 if (skb) {
879 SKB_CB(skb)->dma_addr =
880 dma_map_single(&card->dev->dev, skb->data,
881 RX_DMA_SIZE, DMA_FROM_DEVICE);
882 iowrite32(SKB_CB(skb)->dma_addr,
883 card->config_regs + RX_DMA_ADDR(port));
884 card->rx_skb[port] = skb;
885 } else {
886 if (net_ratelimit())
887 dev_warn(&card->dev->dev, "Failed to allocate RX skb");
888
889 /* We'll have to try again later */
890 tasklet_schedule(&card->tlet);
891 }
892 }
893 }
894 if (rx_done)
895 iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
896
897 return;
898 }
899
900 static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
901 {
902 struct hlist_head *head;
903 struct atm_vcc *vcc = NULL;
904 struct sock *s;
905
906 read_lock(&vcc_sklist_lock);
907 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
908 sk_for_each(s, head) {
909 vcc = atm_sk(s);
910 if (vcc->dev == dev && vcc->vci == vci &&
911 vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE &&
912 test_bit(ATM_VF_READY, &vcc->flags))
913 goto out;
914 }
915 vcc = NULL;
916 out:
917 read_unlock(&vcc_sklist_lock);
918 return vcc;
919 }
920
921 static int popen(struct atm_vcc *vcc)
922 {
923 struct solos_card *card = vcc->dev->dev_data;
924 struct sk_buff *skb;
925 struct pkt_hdr *header;
926
927 if (vcc->qos.aal != ATM_AAL5) {
928 dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
929 vcc->qos.aal);
930 return -EINVAL;
931 }
932
933 skb = alloc_skb(sizeof(*header), GFP_KERNEL);
934 if (!skb) {
935 if (net_ratelimit())
936 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
937 return -ENOMEM;
938 }
939 header = skb_put(skb, sizeof(*header));
940
941 header->size = cpu_to_le16(0);
942 header->vpi = cpu_to_le16(vcc->vpi);
943 header->vci = cpu_to_le16(vcc->vci);
944 header->type = cpu_to_le16(PKT_POPEN);
945
946 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
947
948 set_bit(ATM_VF_ADDR, &vcc->flags);
949 set_bit(ATM_VF_READY, &vcc->flags);
950
951 return 0;
952 }
953
954 static void pclose(struct atm_vcc *vcc)
955 {
956 struct solos_card *card = vcc->dev->dev_data;
957 unsigned char port = SOLOS_CHAN(vcc->dev);
958 struct sk_buff *skb, *tmpskb;
959 struct pkt_hdr *header;
960
961 /* Remove any yet-to-be-transmitted packets from the pending queue */
962 spin_lock(&card->tx_queue_lock);
963 skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) {
964 if (SKB_CB(skb)->vcc == vcc) {
965 skb_unlink(skb, &card->tx_queue[port]);
966 solos_pop(vcc, skb);
967 }
968 }
969 spin_unlock(&card->tx_queue_lock);
970
971 skb = alloc_skb(sizeof(*header), GFP_KERNEL);
972 if (!skb) {
973 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
974 return;
975 }
976 header = skb_put(skb, sizeof(*header));
977
978 header->size = cpu_to_le16(0);
979 header->vpi = cpu_to_le16(vcc->vpi);
980 header->vci = cpu_to_le16(vcc->vci);
981 header->type = cpu_to_le16(PKT_PCLOSE);
982
983 skb_get(skb);
984 fpga_queue(card, port, skb, NULL);
985
986 if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ))
987 dev_warn(&card->dev->dev,
988 "Timeout waiting for VCC close on port %d\n", port);
989
990 dev_kfree_skb(skb);
991
992 /* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the
993 tasklet has finished processing any incoming packets (and, more to
994 the point, using the vcc pointer). */
995 tasklet_unlock_wait(&card->tlet);
996
997 clear_bit(ATM_VF_ADDR, &vcc->flags);
998
999 return;
1000 }
1001
1002 static int print_buffer(struct sk_buff *buf)
1003 {
1004 int len,i;
1005 char msg[500];
1006 char item[10];
1007
1008 len = buf->len;
1009 for (i = 0; i < len; i++){
1010 if(i % 8 == 0)
1011 sprintf(msg, "%02X: ", i);
1012
1013 sprintf(item,"%02X ",*(buf->data + i));
1014 strcat(msg, item);
1015 if(i % 8 == 7) {
1016 sprintf(item, "\n");
1017 strcat(msg, item);
1018 printk(KERN_DEBUG "%s", msg);
1019 }
1020 }
1021 if (i % 8 != 0) {
1022 sprintf(item, "\n");
1023 strcat(msg, item);
1024 printk(KERN_DEBUG "%s", msg);
1025 }
1026 printk(KERN_DEBUG "\n");
1027
1028 return 0;
1029 }
1030
1031 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
1032 struct atm_vcc *vcc)
1033 {
1034 int old_len;
1035 unsigned long flags;
1036
1037 SKB_CB(skb)->vcc = vcc;
1038
1039 spin_lock_irqsave(&card->tx_queue_lock, flags);
1040 old_len = skb_queue_len(&card->tx_queue[port]);
1041 skb_queue_tail(&card->tx_queue[port], skb);
1042 if (!old_len)
1043 card->tx_mask |= (1 << port);
1044 spin_unlock_irqrestore(&card->tx_queue_lock, flags);
1045
1046 /* Theoretically we could just schedule the tasklet here, but
1047 that introduces latency we don't want -- it's noticeable */
1048 if (!old_len)
1049 fpga_tx(card);
1050 }
1051
1052 static uint32_t fpga_tx(struct solos_card *card)
1053 {
1054 uint32_t tx_pending, card_flags;
1055 uint32_t tx_started = 0;
1056 struct sk_buff *skb;
1057 struct atm_vcc *vcc;
1058 unsigned char port;
1059 unsigned long flags;
1060
1061 spin_lock_irqsave(&card->tx_lock, flags);
1062
1063 card_flags = ioread32(card->config_regs + FLAGS_ADDR);
1064 /*
1065 * The queue lock is required for _writing_ to tx_mask, but we're
1066 * OK to read it here without locking. The only potential update
1067 * that we could race with is in fpga_queue() where it sets a bit
1068 * for a new port... but it's going to call this function again if
1069 * it's doing that, anyway.
1070 */
1071 tx_pending = card->tx_mask & ~card_flags;
1072
1073 for (port = 0; tx_pending; tx_pending >>= 1, port++) {
1074 if (tx_pending & 1) {
1075 struct sk_buff *oldskb = card->tx_skb[port];
1076 if (oldskb) {
1077 dma_unmap_single(&card->dev->dev, SKB_CB(oldskb)->dma_addr,
1078 oldskb->len, DMA_TO_DEVICE);
1079 card->tx_skb[port] = NULL;
1080 }
1081 spin_lock(&card->tx_queue_lock);
1082 skb = skb_dequeue(&card->tx_queue[port]);
1083 if (!skb)
1084 card->tx_mask &= ~(1 << port);
1085 spin_unlock(&card->tx_queue_lock);
1086
1087 if (skb && !card->using_dma) {
1088 memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
1089 tx_started |= 1 << port;
1090 oldskb = skb; /* We're done with this skb already */
1091 } else if (skb && card->using_dma) {
1092 unsigned char *data = skb->data;
1093 if ((unsigned long)data & card->dma_alignment) {
1094 data = card->dma_bounce + (BUF_SIZE * port);
1095 memcpy(data, skb->data, skb->len);
1096 }
1097 SKB_CB(skb)->dma_addr = dma_map_single(&card->dev->dev, data,
1098 skb->len, DMA_TO_DEVICE);
1099 card->tx_skb[port] = skb;
1100 iowrite32(SKB_CB(skb)->dma_addr,
1101 card->config_regs + TX_DMA_ADDR(port));
1102 }
1103
1104 if (!oldskb)
1105 continue;
1106
1107 /* Clean up and free oldskb now it's gone */
1108 if (atmdebug) {
1109 struct pkt_hdr *header = (void *)oldskb->data;
1110 int size = le16_to_cpu(header->size);
1111
1112 skb_pull(oldskb, sizeof(*header));
1113 dev_info(&card->dev->dev, "Transmitted: port %d\n",
1114 port);
1115 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
1116 size, le16_to_cpu(header->vpi),
1117 le16_to_cpu(header->vci));
1118 print_buffer(oldskb);
1119 }
1120
1121 vcc = SKB_CB(oldskb)->vcc;
1122
1123 if (vcc) {
1124 atomic_inc(&vcc->stats->tx);
1125 solos_pop(vcc, oldskb);
1126 } else {
1127 dev_kfree_skb_irq(oldskb);
1128 wake_up(&card->param_wq);
1129 }
1130 }
1131 }
1132 /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */
1133 if (tx_started)
1134 iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
1135
1136 spin_unlock_irqrestore(&card->tx_lock, flags);
1137 return card_flags;
1138 }
1139
1140 static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
1141 {
1142 struct solos_card *card = vcc->dev->dev_data;
1143 struct pkt_hdr *header;
1144 int pktlen;
1145
1146 pktlen = skb->len;
1147 if (pktlen > (BUF_SIZE - sizeof(*header))) {
1148 dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
1149 solos_pop(vcc, skb);
1150 return 0;
1151 }
1152
1153 if (!skb_clone_writable(skb, sizeof(*header))) {
1154 int expand_by = 0;
1155 int ret;
1156
1157 if (skb_headroom(skb) < sizeof(*header))
1158 expand_by = sizeof(*header) - skb_headroom(skb);
1159
1160 ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
1161 if (ret) {
1162 dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
1163 solos_pop(vcc, skb);
1164 return ret;
1165 }
1166 }
1167
1168 header = skb_push(skb, sizeof(*header));
1169
1170 /* This does _not_ include the size of the header */
1171 header->size = cpu_to_le16(pktlen);
1172 header->vpi = cpu_to_le16(vcc->vpi);
1173 header->vci = cpu_to_le16(vcc->vci);
1174 header->type = cpu_to_le16(PKT_DATA);
1175
1176 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
1177
1178 return 0;
1179 }
1180
1181 static const struct atmdev_ops fpga_ops = {
1182 .open = popen,
1183 .close = pclose,
1184 .ioctl = NULL,
1185 .getsockopt = NULL,
1186 .setsockopt = NULL,
1187 .send = psend,
1188 .send_oam = NULL,
1189 .phy_put = NULL,
1190 .phy_get = NULL,
1191 .change_qos = NULL,
1192 .proc_read = NULL,
1193 .owner = THIS_MODULE
1194 };
1195
1196 static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
1197 {
1198 int err;
1199 uint16_t fpga_ver;
1200 uint8_t major_ver, minor_ver;
1201 uint32_t data32;
1202 struct solos_card *card;
1203
1204 card = kzalloc(sizeof(*card), GFP_KERNEL);
1205 if (!card)
1206 return -ENOMEM;
1207
1208 card->dev = dev;
1209 init_waitqueue_head(&card->fw_wq);
1210 init_waitqueue_head(&card->param_wq);
1211
1212 err = pci_enable_device(dev);
1213 if (err) {
1214 dev_warn(&dev->dev, "Failed to enable PCI device\n");
1215 goto out;
1216 }
1217
1218 err = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
1219 if (err) {
1220 dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
1221 goto out;
1222 }
1223
1224 err = pci_request_regions(dev, "solos");
1225 if (err) {
1226 dev_warn(&dev->dev, "Failed to request regions\n");
1227 goto out;
1228 }
1229
1230 card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
1231 if (!card->config_regs) {
1232 dev_warn(&dev->dev, "Failed to ioremap config registers\n");
1233 err = -ENOMEM;
1234 goto out_release_regions;
1235 }
1236 card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
1237 if (!card->buffers) {
1238 dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
1239 err = -ENOMEM;
1240 goto out_unmap_config;
1241 }
1242
1243 if (reset) {
1244 iowrite32(1, card->config_regs + FPGA_MODE);
1245 ioread32(card->config_regs + FPGA_MODE);
1246
1247 iowrite32(0, card->config_regs + FPGA_MODE);
1248 ioread32(card->config_regs + FPGA_MODE);
1249 }
1250
1251 data32 = ioread32(card->config_regs + FPGA_VER);
1252 fpga_ver = (data32 & 0x0000FFFF);
1253 major_ver = ((data32 & 0xFF000000) >> 24);
1254 minor_ver = ((data32 & 0x00FF0000) >> 16);
1255 card->fpga_version = FPGA_VERSION(major_ver,minor_ver);
1256 if (card->fpga_version > LEGACY_BUFFERS)
1257 card->buffer_size = BUF_SIZE;
1258 else
1259 card->buffer_size = OLD_BUF_SIZE;
1260 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
1261 major_ver, minor_ver, fpga_ver);
1262
1263 if (fpga_ver < 37 && (fpga_upgrade || firmware_upgrade ||
1264 db_fpga_upgrade || db_firmware_upgrade)) {
1265 dev_warn(&dev->dev,
1266 "FPGA too old; cannot upgrade flash. Use JTAG.\n");
1267 fpga_upgrade = firmware_upgrade = 0;
1268 db_fpga_upgrade = db_firmware_upgrade = 0;
1269 }
1270
1271 /* Stopped using Atmel flash after 0.03-38 */
1272 if (fpga_ver < 39)
1273 card->atmel_flash = 1;
1274 else
1275 card->atmel_flash = 0;
1276
1277 data32 = ioread32(card->config_regs + PORTS);
1278 card->nr_ports = (data32 & 0x000000FF);
1279
1280 if (card->fpga_version >= DMA_SUPPORTED) {
1281 pci_set_master(dev);
1282 card->using_dma = 1;
1283 if (1) { /* All known FPGA versions so far */
1284 card->dma_alignment = 3;
1285 card->dma_bounce = kmalloc_array(card->nr_ports,
1286 BUF_SIZE, GFP_KERNEL);
1287 if (!card->dma_bounce) {
1288 dev_warn(&card->dev->dev, "Failed to allocate DMA bounce buffers\n");
1289 err = -ENOMEM;
1290 /* Fallback to MMIO doesn't work */
1291 goto out_unmap_both;
1292 }
1293 }
1294 } else {
1295 card->using_dma = 0;
1296 /* Set RX empty flag for all ports */
1297 iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
1298 }
1299
1300 pci_set_drvdata(dev, card);
1301
1302 tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
1303 spin_lock_init(&card->tx_lock);
1304 spin_lock_init(&card->tx_queue_lock);
1305 spin_lock_init(&card->cli_queue_lock);
1306 spin_lock_init(&card->param_queue_lock);
1307 INIT_LIST_HEAD(&card->param_queue);
1308
1309 err = request_irq(dev->irq, solos_irq, IRQF_SHARED,
1310 "solos-pci", card);
1311 if (err) {
1312 dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
1313 goto out_unmap_both;
1314 }
1315
1316 iowrite32(1, card->config_regs + IRQ_EN_ADDR);
1317
1318 if (fpga_upgrade)
1319 flash_upgrade(card, 0);
1320
1321 if (firmware_upgrade)
1322 flash_upgrade(card, 1);
1323
1324 if (db_fpga_upgrade)
1325 flash_upgrade(card, 2);
1326
1327 if (db_firmware_upgrade)
1328 flash_upgrade(card, 3);
1329
1330 err = atm_init(card, &dev->dev);
1331 if (err)
1332 goto out_free_irq;
1333
1334 if (card->fpga_version >= DMA_SUPPORTED &&
1335 sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group))
1336 dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n");
1337
1338 return 0;
1339
1340 out_free_irq:
1341 iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1342 free_irq(dev->irq, card);
1343 tasklet_kill(&card->tlet);
1344
1345 out_unmap_both:
1346 kfree(card->dma_bounce);
1347 pci_iounmap(dev, card->buffers);
1348 out_unmap_config:
1349 pci_iounmap(dev, card->config_regs);
1350 out_release_regions:
1351 pci_release_regions(dev);
1352 out:
1353 kfree(card);
1354 return err;
1355 }
1356
1357 static int atm_init(struct solos_card *card, struct device *parent)
1358 {
1359 int i;
1360
1361 for (i = 0; i < card->nr_ports; i++) {
1362 struct sk_buff *skb;
1363 struct pkt_hdr *header;
1364
1365 skb_queue_head_init(&card->tx_queue[i]);
1366 skb_queue_head_init(&card->cli_queue[i]);
1367
1368 card->atmdev[i] = atm_dev_register("solos-pci", parent, &fpga_ops, -1, NULL);
1369 if (!card->atmdev[i]) {
1370 dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
1371 atm_remove(card);
1372 return -ENODEV;
1373 }
1374 if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
1375 dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
1376 if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group))
1377 dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i);
1378
1379 dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
1380
1381 card->atmdev[i]->ci_range.vpi_bits = 8;
1382 card->atmdev[i]->ci_range.vci_bits = 16;
1383 card->atmdev[i]->dev_data = card;
1384 card->atmdev[i]->phy_data = (void *)(unsigned long)i;
1385 atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_FOUND);
1386
1387 skb = alloc_skb(sizeof(*header), GFP_KERNEL);
1388 if (!skb) {
1389 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n");
1390 continue;
1391 }
1392
1393 header = skb_put(skb, sizeof(*header));
1394
1395 header->size = cpu_to_le16(0);
1396 header->vpi = cpu_to_le16(0);
1397 header->vci = cpu_to_le16(0);
1398 header->type = cpu_to_le16(PKT_STATUS);
1399
1400 fpga_queue(card, i, skb, NULL);
1401 }
1402 return 0;
1403 }
1404
1405 static void atm_remove(struct solos_card *card)
1406 {
1407 int i;
1408
1409 for (i = 0; i < card->nr_ports; i++) {
1410 if (card->atmdev[i]) {
1411 struct sk_buff *skb;
1412
1413 dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
1414
1415 sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group);
1416 atm_dev_deregister(card->atmdev[i]);
1417
1418 skb = card->rx_skb[i];
1419 if (skb) {
1420 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr,
1421 RX_DMA_SIZE, DMA_FROM_DEVICE);
1422 dev_kfree_skb(skb);
1423 }
1424 skb = card->tx_skb[i];
1425 if (skb) {
1426 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr,
1427 skb->len, DMA_TO_DEVICE);
1428 dev_kfree_skb(skb);
1429 }
1430 while ((skb = skb_dequeue(&card->tx_queue[i])))
1431 dev_kfree_skb(skb);
1432
1433 }
1434 }
1435 }
1436
1437 static void fpga_remove(struct pci_dev *dev)
1438 {
1439 struct solos_card *card = pci_get_drvdata(dev);
1440
1441 /* Disable IRQs */
1442 iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1443
1444 /* Reset FPGA */
1445 iowrite32(1, card->config_regs + FPGA_MODE);
1446 (void)ioread32(card->config_regs + FPGA_MODE);
1447
1448 if (card->fpga_version >= DMA_SUPPORTED)
1449 sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group);
1450
1451 atm_remove(card);
1452
1453 free_irq(dev->irq, card);
1454 tasklet_kill(&card->tlet);
1455
1456 kfree(card->dma_bounce);
1457
1458 /* Release device from reset */
1459 iowrite32(0, card->config_regs + FPGA_MODE);
1460 (void)ioread32(card->config_regs + FPGA_MODE);
1461
1462 pci_iounmap(dev, card->buffers);
1463 pci_iounmap(dev, card->config_regs);
1464
1465 pci_release_regions(dev);
1466 pci_disable_device(dev);
1467
1468 kfree(card);
1469 }
1470
1471 static const struct pci_device_id fpga_pci_tbl[] = {
1472 { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1473 { 0, }
1474 };
1475
1476 MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
1477
1478 static struct pci_driver fpga_driver = {
1479 .name = "solos",
1480 .id_table = fpga_pci_tbl,
1481 .probe = fpga_probe,
1482 .remove = fpga_remove,
1483 };
1484
1485
1486 static int __init solos_pci_init(void)
1487 {
1488 BUILD_BUG_ON(sizeof(struct solos_skb_cb) > sizeof(((struct sk_buff *)0)->cb));
1489
1490 printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
1491 return pci_register_driver(&fpga_driver);
1492 }
1493
1494 static void __exit solos_pci_exit(void)
1495 {
1496 pci_unregister_driver(&fpga_driver);
1497 printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
1498 }
1499
1500 module_init(solos_pci_init);
1501 module_exit(solos_pci_exit);
Linux with added FPC-III support