2 * Platform driver for the Synopsys DesignWare DMA Controller
4 * Copyright (C) 2007-2008 Atmel Corporation
5 * Copyright (C) 2010-2011 ST Microelectronics
6 * Copyright (C) 2013 Intel Corporation
8 * Some parts of this driver are derived from the original dw_dmac.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/module.h>
16 #include <linux/device.h>
17 #include <linux/clk.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/platform_device.h>
20 #include <linux/dmaengine.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/of_dma.h>
24 #include <linux/acpi.h>
25 #include <linux/acpi_dma.h>
29 #define DRV_NAME "dw_dmac"
31 static struct dma_chan
*dw_dma_of_xlate(struct of_phandle_args
*dma_spec
,
34 struct dw_dma
*dw
= ofdma
->of_dma_data
;
35 struct dw_dma_slave slave
= {
36 .dma_dev
= dw
->dma
.dev
,
40 if (dma_spec
->args_count
!= 3)
43 slave
.src_id
= dma_spec
->args
[0];
44 slave
.dst_id
= dma_spec
->args
[0];
45 slave
.src_master
= dma_spec
->args
[1];
46 slave
.dst_master
= dma_spec
->args
[2];
48 if (WARN_ON(slave
.src_id
>= DW_DMA_MAX_NR_REQUESTS
||
49 slave
.dst_id
>= DW_DMA_MAX_NR_REQUESTS
||
50 slave
.src_master
>= dw
->nr_masters
||
51 slave
.dst_master
>= dw
->nr_masters
))
55 dma_cap_set(DMA_SLAVE
, cap
);
57 /* TODO: there should be a simpler way to do this */
58 return dma_request_channel(cap
, dw_dma_filter
, &slave
);
62 static bool dw_dma_acpi_filter(struct dma_chan
*chan
, void *param
)
64 struct acpi_dma_spec
*dma_spec
= param
;
65 struct dw_dma_slave slave
= {
66 .dma_dev
= dma_spec
->dev
,
67 .src_id
= dma_spec
->slave_id
,
68 .dst_id
= dma_spec
->slave_id
,
73 return dw_dma_filter(chan
, &slave
);
76 static void dw_dma_acpi_controller_register(struct dw_dma
*dw
)
78 struct device
*dev
= dw
->dma
.dev
;
79 struct acpi_dma_filter_info
*info
;
82 info
= devm_kzalloc(dev
, sizeof(*info
), GFP_KERNEL
);
86 dma_cap_zero(info
->dma_cap
);
87 dma_cap_set(DMA_SLAVE
, info
->dma_cap
);
88 info
->filter_fn
= dw_dma_acpi_filter
;
90 ret
= devm_acpi_dma_controller_register(dev
, acpi_dma_simple_xlate
,
93 dev_err(dev
, "could not register acpi_dma_controller\n");
95 #else /* !CONFIG_ACPI */
96 static inline void dw_dma_acpi_controller_register(struct dw_dma
*dw
) {}
97 #endif /* !CONFIG_ACPI */
100 static struct dw_dma_platform_data
*
101 dw_dma_parse_dt(struct platform_device
*pdev
)
103 struct device_node
*np
= pdev
->dev
.of_node
;
104 struct dw_dma_platform_data
*pdata
;
105 u32 tmp
, arr
[DW_DMA_MAX_NR_MASTERS
];
109 dev_err(&pdev
->dev
, "Missing DT data\n");
113 if (of_property_read_u32(np
, "dma-channels", &nr_channels
))
116 pdata
= devm_kzalloc(&pdev
->dev
, sizeof(*pdata
), GFP_KERNEL
);
120 pdata
->nr_channels
= nr_channels
;
122 if (of_property_read_bool(np
, "is_private"))
123 pdata
->is_private
= true;
125 if (!of_property_read_u32(np
, "chan_allocation_order", &tmp
))
126 pdata
->chan_allocation_order
= (unsigned char)tmp
;
128 if (!of_property_read_u32(np
, "chan_priority", &tmp
))
129 pdata
->chan_priority
= tmp
;
131 if (!of_property_read_u32(np
, "block_size", &tmp
))
132 pdata
->block_size
= tmp
;
134 if (!of_property_read_u32(np
, "dma-masters", &tmp
)) {
135 if (tmp
> DW_DMA_MAX_NR_MASTERS
)
138 pdata
->nr_masters
= tmp
;
141 if (!of_property_read_u32_array(np
, "data_width", arr
,
143 for (tmp
= 0; tmp
< pdata
->nr_masters
; tmp
++)
144 pdata
->data_width
[tmp
] = arr
[tmp
];
149 static inline struct dw_dma_platform_data
*
150 dw_dma_parse_dt(struct platform_device
*pdev
)
156 static int dw_probe(struct platform_device
*pdev
)
158 struct dw_dma_chip
*chip
;
159 struct device
*dev
= &pdev
->dev
;
160 struct resource
*mem
;
161 struct dw_dma_platform_data
*pdata
;
164 chip
= devm_kzalloc(dev
, sizeof(*chip
), GFP_KERNEL
);
168 chip
->irq
= platform_get_irq(pdev
, 0);
172 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
173 chip
->regs
= devm_ioremap_resource(dev
, mem
);
174 if (IS_ERR(chip
->regs
))
175 return PTR_ERR(chip
->regs
);
177 err
= dma_coerce_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
181 pdata
= dev_get_platdata(dev
);
183 pdata
= dw_dma_parse_dt(pdev
);
187 chip
->clk
= devm_clk_get(chip
->dev
, "hclk");
188 if (IS_ERR(chip
->clk
))
189 return PTR_ERR(chip
->clk
);
190 err
= clk_prepare_enable(chip
->clk
);
194 pm_runtime_enable(&pdev
->dev
);
196 err
= dw_dma_probe(chip
, pdata
);
198 goto err_dw_dma_probe
;
200 platform_set_drvdata(pdev
, chip
);
202 if (pdev
->dev
.of_node
) {
203 err
= of_dma_controller_register(pdev
->dev
.of_node
,
204 dw_dma_of_xlate
, chip
->dw
);
207 "could not register of_dma_controller\n");
210 if (ACPI_HANDLE(&pdev
->dev
))
211 dw_dma_acpi_controller_register(chip
->dw
);
216 pm_runtime_disable(&pdev
->dev
);
217 clk_disable_unprepare(chip
->clk
);
221 static int dw_remove(struct platform_device
*pdev
)
223 struct dw_dma_chip
*chip
= platform_get_drvdata(pdev
);
225 if (pdev
->dev
.of_node
)
226 of_dma_controller_free(pdev
->dev
.of_node
);
229 pm_runtime_disable(&pdev
->dev
);
230 clk_disable_unprepare(chip
->clk
);
235 static void dw_shutdown(struct platform_device
*pdev
)
237 struct dw_dma_chip
*chip
= platform_get_drvdata(pdev
);
240 * We have to call dw_dma_disable() to stop any ongoing transfer. On
241 * some platforms we can't do that since DMA device is powered off.
242 * Moreover we have no possibility to check if the platform is affected
243 * or not. That's why we call pm_runtime_get_sync() / pm_runtime_put()
244 * unconditionally. On the other hand we can't use
245 * pm_runtime_suspended() because runtime PM framework is not fully
246 * used by the driver.
248 pm_runtime_get_sync(chip
->dev
);
249 dw_dma_disable(chip
);
250 pm_runtime_put_sync_suspend(chip
->dev
);
252 clk_disable_unprepare(chip
->clk
);
256 static const struct of_device_id dw_dma_of_id_table
[] = {
257 { .compatible
= "snps,dma-spear1340" },
260 MODULE_DEVICE_TABLE(of
, dw_dma_of_id_table
);
264 static const struct acpi_device_id dw_dma_acpi_id_table
[] = {
268 MODULE_DEVICE_TABLE(acpi
, dw_dma_acpi_id_table
);
271 #ifdef CONFIG_PM_SLEEP
273 static int dw_suspend_late(struct device
*dev
)
275 struct platform_device
*pdev
= to_platform_device(dev
);
276 struct dw_dma_chip
*chip
= platform_get_drvdata(pdev
);
278 dw_dma_disable(chip
);
279 clk_disable_unprepare(chip
->clk
);
284 static int dw_resume_early(struct device
*dev
)
286 struct platform_device
*pdev
= to_platform_device(dev
);
287 struct dw_dma_chip
*chip
= platform_get_drvdata(pdev
);
289 clk_prepare_enable(chip
->clk
);
290 return dw_dma_enable(chip
);
293 #endif /* CONFIG_PM_SLEEP */
295 static const struct dev_pm_ops dw_dev_pm_ops
= {
296 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late
, dw_resume_early
)
299 static struct platform_driver dw_driver
= {
302 .shutdown
= dw_shutdown
,
305 .pm
= &dw_dev_pm_ops
,
306 .of_match_table
= of_match_ptr(dw_dma_of_id_table
),
307 .acpi_match_table
= ACPI_PTR(dw_dma_acpi_id_table
),
311 static int __init
dw_init(void)
313 return platform_driver_register(&dw_driver
);
315 subsys_initcall(dw_init
);
317 static void __exit
dw_exit(void)
319 platform_driver_unregister(&dw_driver
);
321 module_exit(dw_exit
);
323 MODULE_LICENSE("GPL v2");
324 MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
325 MODULE_ALIAS("platform:" DRV_NAME
);